Re: [PATCH] Fix reassoc range test vs. value ranges (PR tree-optimization/68671)

On Fri, 4 Dec 2015, Jakub Jelinek wrote: > On Fri, Dec 04, 2015 at 09:15:25AM +0100, Richard Biener wrote: > > > + modified one, up to and including last_bb, to be executed even if > > > + they would not be in the original program. If the value ranges of > > > + assignment lhs' in those bbs

[PATCH] Fix PR68636

When we compute excessive byte alignment get_pointer_alignment_1 may end up returning an alignment of zero due to overflow when multiplying with BITS_PER_UNIT. This in turn causes get_object_alignment to return a too conservative (byte) alignment. Fixed as follows. Bootstrapped and tested on

Re: [PATCH] Fix reassoc range test vs. value ranges (PR tree-optimization/68671)

On Fri, Dec 04, 2015 at 09:15:25AM +0100, Richard Biener wrote: > > +modified one, up to and including last_bb, to be executed even if > > +they would not be in the original program. If the value ranges of > > +assignment lhs' in those bbs were dependent on the conditions > > +

[PATCH] Fix PR67438

The following is the only way I currently see to fix PR67438, register pressure increase over a conditional due to a match pattern applying to ops with multiple uses. Bootstrapped and tested on x86_64-unknown-linux-gnu, applied. Richard. 2015-12-04 Richard Biener

Re: [PATCH] Fix reassoc range test vs. value ranges (PR tree-optimization/68671)

On Thu, 3 Dec 2015, Jakub Jelinek wrote: > Hi! > > As mentioned in the PR, maybe_optimize_range_tests considers basic blocks > with not just the final GIMPLE_COND (or for last_bb store feeding into PHI), > but also assign stmts that don't trap, don't have side-effects and where > the SSA_NAMEs

[PATCH, i386, PR68627] Prohibit AVX-512VL broadcasts generation on KNL.

Hello, Patch in the bottom fixes spec2k6/437.leslie3d illigal insn generation. The problem is that for AVX-512F broacasts are allowed to 512b registers only. [x|y]mm variants are AVX-512VL. Bootstrapped and regtested. I'll commit it into GCC main trunk on Monday if no objections. gcc/

Re: [ARM] Fix PR middle-end/65958

On 3 December 2015 at 12:17, Eric Botcazou wrote: >> I can understand this restriction, but... >> >> > + /* See the same assertion on PROBE_INTERVAL above. */ >> > + gcc_assert ((first % 4096) == 0); >> >> ... why isn't this a test that FIRST is aligned to

Re: [PATCH 2/2] [graphite] fix invalid bounds on array refs

On Thu, Dec 3, 2015 at 10:14 PM, Sebastian Pop wrote: > Richard Biener wrote: >> On Wed, Dec 2, 2015 at 10:36 PM, Sebastian Paul Pop >> wrote: >> > Do you recommend that we add a gcc_assert that min is always lower than >> > max? >> >> No, min can be one

Re: -fstrict-aliasing fixes 4/6: do not fiddle with flag_strict_aliasing when expanding debug locations

On Wed, 2 Dec 2015, Jakub Jelinek wrote: > On Wed, Dec 02, 2015 at 09:16:10PM +0100, Jan Hubicka wrote: > > * cfgexpand.c: Include alias.h > > Missing full stop at the end. > > > (expand_call_stmt, expand_debug_expr): Set no_new_alias_sets; > > do not fiddle with

[PATCH] Speedup bitmap_find_bit

This properly guards the bitmap_mem_desc.get_descriptor_for_instance call with GATHER_STATISTICS - the hashmap is globally initialized and thus a query isn't very well inline optimized even if the map is empty. Committed as obvious. Richard. 2015-12-04 Richard Biener

Re: [PATCH AArch64]Use aarch64_sync_memory_operand in atomic_store pattern

On 4 December 2015 at 03:34, Bin Cheng wrote: > 2015-12-01 Bin Cheng > > * config/aarch64/atomics.md (atomic_store): Use predicate > aarch64_sync_memory_operand. > OK /Marcus

Re: [PATCH] Handle OBJ_TYPE_REF in FRE

> Indeed we don't do code hoisting yet. Maybe one could trick PPRE > into doing it. > > Note that for OBJ_TYPE_REFs in calls you probably should better use > gimple_call_fntype instead of the type of the OBJ_TYPE_REF anyway > (well, fntype will be the method-type, not pointer-to-method-type). >

[PATCH][AArch64] Properly cost zero_extend+ashift forms of ubfi[xz]

Hi all, We don't handle properly the patterns for the [us]bfiz and [us]bfx instructions when they have an extend+ashift form. For example, the *_ashl pattern. This leads to rtx costs recuring into the extend and assigning a cost to these patterns that is too large. This patch fixes that

Re: [PATCH] Use ECF_MAY_BE_ALLOCA for __builtin_alloca_with_align (PR tree-optimization/68680)

On Thu, 3 Dec 2015, Jakub Jelinek wrote: > Hi! > > As mentioned in the PR, GCC 4.7+ seems to have regressed for > -fstack-protector*, functions containing VLAs and no other arrays are not > protected anymore. Before 4.7, VLAs were gimplified as __builtin_alloca > call, which sets

[PATCH] Fix PR68681

Writing reliable vectorizer testcases is hard - the following factors out target dependent defaults for tree-reassoc-width for gcc.dg/vect/pr45752.c Committed. Richard. 2015-12-04 Richard Biener PR testsuite/68681 * gcc.dg/vect/pr45752.c: Add --param

Re: PR c/68657 - Add missing 'Warning' flags to c-family/c.opt + java/lang.opt

And now with attached patch ... On Fri, Dec 04, 2015 at 10:59:29AM +0100, Tobias Burnus wrote: > A few warning options lack the 'Warning' flag, which since r228094 > (2015-09-24) > has the effect that -W(no-)error= doesn't work for them. Additionally, > --help=warnings doesn't work for them

Re: [PATCH] Use ECF_MAY_BE_ALLOCA for __builtin_alloca_with_align (PR tree-optimization/68680)

> Does the patch mean we inlined __builtin_alloca_with_align () > functions? We might run into the issue Eric fixed lately with > mixing alloca and VLAs (don't see the patch being committed though). But I'm about to do it (I was waiting for the approval of the aarch64 specific part). Note that

Re: [PATCH] Use ECF_MAY_BE_ALLOCA for __builtin_alloca_with_align (PR tree-optimization/68680)

On Fri, 4 Dec 2015, Jakub Jelinek wrote: > On Fri, Dec 04, 2015 at 10:30:38AM +0100, Richard Biener wrote: > > > The following patch has been bootstrapped/regtested on x86_64-linux and > > > i686-linux. > > > > The patch is ok - it looks like you could have removed the > > __builtin_alloca

Re: [RFA][PATCH] Run CFG cleanups after reassociation as needed

On Thu, Dec 3, 2015 at 6:54 PM, Jeff Law wrote: > This is something I noticed while working on fixing 67816. > > Essentially I was seeing trivially true or trivially false conditionals left > in the IL for DOM to clean up. > > While DOM can and will clean that crud up, but a

Re: [PATCH PR68542]

On Mon, Nov 30, 2015 at 2:11 PM, Yuri Rumyantsev wrote: > Hi All, > > Here is a patch for 481.wrf preformance regression for avx2 which is > sligthly modified mask store optimization. This transformation allows > perform unpredication for semi-hammock containing masked stores,

Re: [Patch, Contrib] Download ISL 0.15 by download_prerequisites

If there are no objections, I intent to commit the following patch tomorrow as obvious. Tobias On Tue, Oct 27, 2015 at 11:27:41AM +0100, Tobias Burnus wrote: > recently, support for ISL 0.15 was added to GCC and also > ftp://gcc.gnu.org/pub/gcc/infrastructure/ now contains ISL 0.15. > > Hence,

Re: [ARM] Fix PR middle-end/65958

> Looks ok to me. OK /Marcus Thanks. Testing was successful so I have installed it with a small change (s/ARITH_BASE/ARITH_FACTOR/, it's a bit more mathematically correct). -- Eric Botcazou

Re: [PATCH][PR tree-optimization/67816] Fix jump threading when DOM removes conditionals in jump threading path

On Thu, Dec 3, 2015 at 9:29 PM, Jeff Law wrote: > On 12/02/2015 08:35 AM, Richard Biener wrote: > >>> >>> The most interesting side effect, and one I haven't fully analyzed yet is >>> an >>> unexpected jump thread -- which I've traced back to differences in what >>> the >>> alias

Re: [PATCH 3b/4][AArch64] Add scheduling model for Exynos M1

Hi Evandro, On 03/12/15 20:58, Evandro Menezes wrote: On 11/20/2015 11:17 AM, James Greenhalgh wrote: On Tue, Nov 10, 2015 at 11:54:00AM -0600, Evandro Menezes wrote: 2015-11-10 Evandro Menezes gcc/ * config/aarch64/aarch64-cores.def: Use the Exynos

Re: [PATCH] Handle OBJ_TYPE_REF in FRE

On Fri, 4 Dec 2015, Jan Hubicka wrote: > > Indeed we don't do code hoisting yet. Maybe one could trick PPRE > > into doing it. > > > > Note that for OBJ_TYPE_REFs in calls you probably should better use > > gimple_call_fntype instead of the type of the OBJ_TYPE_REF anyway > > (well, fntype will

Re: [PATCH][ARM] PR target/68214: Delete IP-reg-clobbering call-through-mem patterns

On Fri, Dec 4, 2015 at 9:27 AM, Kyrill Tkachov wrote: > Hi all, > > The wrong-code in this PR occurs for pre-ARMv5 architectures with Thumb > interworking when trying > to use a static chain. Our output_call_mem function that outputs the > assembly for the call explicitly

Re: [PATCH] Fix missing range information for "%q+D" format code

On 12/03/2015 09:33 PM, David Malcolm wrote: The attached patch updates the handling of %q+D, simplifying the implementation, and ensuring that it retains the range information of the decl, giving: diagnostic-ranges-1.c:6:7: warning: unused variable ‘redundant’ [-Wunused-variable] int

Re: -fstrict-aliasing fixes 6/6: permit inlining of comdats

On Fri, 4 Dec 2015, Jan Hubicka wrote: > Hi, > this is the last patch of the series. It makes operand_equal_p to compare > alias sets even in !flag_strict_aliasing before inlining so inlining > !flag_strict_aliasing to flag_strict_aliasing is possible when callee is > merged comdat. I tried to

Re: Ping [PATCH] c++/42121 - diagnose invalid flexible array members

> The patch should bring C++ support for flexible array members closer > to C (most of the same constructs should be accepted and rejected). > The only C change in this patch is to include the size of excessively > large types in diagnostics (I found knowing the size helpful when > adding tests

[PATCH][ARM] PR target/68214: Delete IP-reg-clobbering call-through-mem patterns

Hi all, The wrong-code in this PR occurs for pre-ARMv5 architectures with Thumb interworking when trying to use a static chain. Our output_call_mem function that outputs the assembly for the call explicitly clobbers the IP register, which is also used as the static chain register. Richard

[DOC,PATCH] Mention clog10, clog10f an clog10l in Builtins section.

Hello. I noticed that Builtins section of documentation does not mention clog10{,f,l} functions. I've tried to write a patch, however I'm not sure how should be these functions described. Thanks, Martin >From 2cb8dfd30ac14e1de00f3788a0b6e55c6a7fa8b9 Mon Sep 17 00:00:00 2001 From: marxin

PR c/68657 - Add missing 'Warning' flags to c-family/c.opt + java/lang.opt

A few warning options lack the 'Warning' flag, which since r228094 (2015-09-24) has the effect that -W(no-)error= doesn't work for them. Additionally, --help=warnings doesn't work for them either. Successfully bootstrapped with c,c++,fortran,lto,go,objc,obj-c++,java on x86-64-gnu-linux & checked

Re: [PATCH] Use ECF_MAY_BE_ALLOCA for __builtin_alloca_with_align (PR tree-optimization/68680)

On Fri, Dec 04, 2015 at 10:30:38AM +0100, Richard Biener wrote: > > The following patch has been bootstrapped/regtested on x86_64-linux and > > i686-linux. > > The patch is ok - it looks like you could have removed the > __builtin_alloca strcmp with it though. Ok, will remove the strcmp then. >

Re: [PATCH] Handle OBJ_TYPE_REF in FRE

On Thu, 3 Dec 2015, Jan Hubicka wrote: > > >may lead to wrong code. > > > > Can you try generating a testcase? > > Because with equal vptr and voffset I can't see how that can happen > > unless some pass extracts information from the pointer types without > > sanity checking with the pointers

RE: Fix 61441 [ 1/5] Add REAL_VALUE_ISSIGNALING_NAN

Hi, > If you haven't set up write-access to the repository, please go ahead and get > that process started: > > https://www.gnu.org/software/gcc/svnwrite.html > > You can list me as your sponsor on the form. > > Once your account is set up, you can commit patches which have been > approved. >

Re: [PATCH 1/2] rs6000: Implement cstore for signed Pmode register compares

On Fri, Dec 4, 2015 at 9:34 AM, Segher Boessenkool wrote: > This implements cstore for the last case we do not yet handle, using > the superopt algo from the venerable CWG. The only integer cases we > do still not handle after this are for -m32 -mpowerpc64. Those

Re: [PATCH][GCC] Make stackalign test LTO proof

On 17/11/15 16:30, Andre Vieira wrote: On 17/11/15 12:29, Bernd Schmidt wrote: On 11/16/2015 04:48 PM, Andre Vieira wrote: On 16/11/15 15:34, Joern Wolfgang Rennecke wrote: I just happened to stumble on this problem with another port. The volatile & test solution doesn't work, though. What

Re: [PATCH][AArch64] Don't allow -mgeneral-regs-only to change the .arch assembler directives

On 04/12/15 14:40, Kyrill Tkachov wrote: Ping. This almost fell through the cracks. https://gcc.gnu.org/ml/gcc-patches/2015-10/msg00055.html Thanks, Kyrill On 01/10/15 14:00, Kyrill Tkachov wrote: Hi all, As part of the SWITCHABLE_TARGET work I inadvertently changed the behaviour of

Re: [PATCH] Avoid false vector mask conversion

On 02 Dec 16:27, Richard Biener wrote: > On Wed, Dec 2, 2015 at 4:24 PM, Ilya Enkovich wrote: > > > > The problem is that conversion is supposed to be handled by > > vectorizable_conversion, > > but it fails to because it is not actually a conversion. I suppose it > > may

Re: [PATCH][1/2] Fix PR68553

On 27/11/15 08:30, Richard Biener wrote: This is part 1 of a fix for PR68533 which shows that some targets cannot can_vec_perm_p on an identity permutation. I chose to fix this in the vectorizer by detecting the identity itself but with the current structure of vect_transform_slp_perm_load

Re: [PATCH 07/10] Fix g++.dg/template/ref3.C

On 12/03/2015 05:08 PM, David Malcolm wrote: On Thu, 2015-12-03 at 15:38 -0500, Jason Merrill wrote: On 12/03/2015 09:55 AM, David Malcolm wrote: Testcase g++.dg/template/ref3.C: 1// PR c++/28341 2 3template struct A {}; 4 5template

Re: [PATCH] S/390: Add -mbackchain options to fix test failure.

On 12/04/2015 02:23 AM, Dominik Vogt wrote: gcc/testsuite/ChangeLog * gcc.dg/Wframe-address.c: S/390 requires the -mbackchain option to access arbitrary stack frames. * gcc.dg/Wno-frame-address.c: Likewise. Applied. Thanks! -Andreas-

[PATCH 1/2] rs6000: Implement cstore for signed Pmode register compares

This implements cstore for the last case we do not yet handle, using the superopt algo from the venerable CWG. The only integer cases we do still not handle after this are for -m32 -mpowerpc64. Those case now generate a branch sequence, which is better than what we had before. Tested on

Re: [PATCH PR68542]

Hi Richard. Thanks a lot for your review. Below are my answers. You asked why I inserted additional check to ++ b/gcc/tree-ssa-forwprop.c @@ -373,6 +373,11 @@ combine_cond_expr_cond (gimple *stmt, enum tree_code code, tree type, gcc_assert (TREE_CODE_CLASS (code) == tcc_comparison); + /*

Re: [PATCH][1/2] Fix PR68553

On December 4, 2015 4:32:33 PM GMT+01:00, Alan Lawrence wrote: >On 27/11/15 08:30, Richard Biener wrote: >> >> This is part 1 of a fix for PR68533 which shows that some targets >> cannot can_vec_perm_p on an identity permutation. I chose to fix >> this in the vectorizer

[PATCH, PR67627][RFC] broken libatomic multilib parallel build

As described in pr other/67627, the all-multi target can be built in parallel with the %_.lo targets which generate make dependencies that are parsed during the build of all-multi. gcc -MD does not generate the makefile dependencies in an atomic way so make can fail if it concurrently parses

[Patch, Fortran] PR45859 - Permit array elements to coarray dummy arguments

This patch permits interface subroutine sub (x) real x(10)[*] end subroutine end interface real :: x(100)[*] call sub (x(10)) end where one passes an array element ("x(10)") of a contiguous array to a coarray dummy argument. That's permitted per interpretation

PING^2: [PATCH] X86: Optimize access to globals in PIE with copy reloc

PING. -- Forwarded message -- From: H.J. Lu Date: Mon, Oct 19, 2015 at 1:04 PM Subject: PING: [PATCH] X86: Optimize access to globals in PIE with copy reloc To: GCC Patches , Richard Biener , Jakub Jelinek

Re: Add fuzzing coverage support

On 12/04/2015 04:41 PM, Jakub Jelinek wrote: Hi! While this has been posted after stage1 closed and I'm not really happy that it missed the deadline, I'm willing to grant an exception, the patch is small enough that it is ok at this point of stage3. That said, next time please try to submit

Re: [testsuite][ARM target attributes] Fix effective_target tests

Ping? On 27 November 2015 at 14:00, Christophe Lyon wrote: > Hi, > > After the recent commits from Christian adding target attributes > support for ARM FPU settings, I've noticed that some of the tests > were failing because of incorrect assumptions wrt to the

Re: [PATCH, i386] Fix alignment check for AVX-512 masked store

Hi Ilya, On 02 Dec 16:51, Ilya Enkovich wrote: > Hi, > > This patch fixes wrong alignment check in _store_mask > pattern. Currently we check a register operand instead of a memory > one. This fixes segfault on 481.wrf compiled at -O3 for KNL target. > I bootstrapped and tested this patch on

[PATCH 02/10 v2] Fix g++.dg/cpp0x/nsdmi-template14.C (v2)

On Thu, 2015-12-03 at 17:17 -0500, Jason Merrill wrote: > On 12/03/2015 04:43 PM, David Malcolm wrote: > > On Thu, 2015-12-03 at 15:33 -0500, Jason Merrill wrote: > >> On 12/03/2015 09:55 AM, David Malcolm wrote: > >>> This patch adds bulletproofing to detect purged tokens, and avoid using > >>>

Re: [PATCH] enable loop fusion on isl-15

On 05/11/15 21:43, Sebastian Pop wrote: * graphite-optimize-isl.c (optimize_isl): Call isl_options_set_schedule_maximize_band_depth. * gcc.dg/graphite/fuse-1.c: New. * gcc.dg/graphite/fuse-2.c: New. * gcc.dg/graphite/interchange-13.c: Remove bogus check.

GCC 5.4 Status report (2015-12-04)

Status == The GCC 5 branch is open again for regression and documentation fixes. If nothing unusual happens you can expect GCC 5.4 somewhen closely before GCC 6 is released. Quality Data Priority # Change from last report ---

[HSA] Handle __builtin_{bzero,mempcpy}

Hello. The patch handles builtins mentioned in the email subject and was installed to the HSA branch. Thanks, Martin >From b56ba10d46c03cadfda16c6658dd3134f5da09f8 Mon Sep 17 00:00:00 2001 From: marxin Date: Thu, 3 Dec 2015 13:31:28 +0100 Subject: [PATCH 2/3] HSA: implement

[HSA] Fix emission of internal functions

Hello. Following patch handles just floating pointer internal functions and for the rest if displays warning message. Patch has been installed to the HSA branch. Thanks, Martin >From 5c6581d913c754e4e0a197e073bfa3c17c20b31f Mon Sep 17 00:00:00 2001 From: marxin Date: Fri, 4 Dec

[PATCH 2/2] rs6000: Clean up the cstore code a bit

"register_operand" was a bit confusing. Also some other minor cleanups. Tested on powerpc64-linux; okay for mainline? Segher 2015-12-04 Segher Boessenkool * (cstore4_unsigned): Use gpc_reg_operand instead of register_operand. Remove empty constraints. Use

Re: [PATCH 1/2] s/390: Implement "target" attribute.

On 12/04/2015 03:14 PM, Dominik Vogt wrote: > Next version of the patch with the changes discussed internally. > (Sorry for the version number; I now use my internam branch > numbers for sake of clarity.) Applied. Thanks! -Andreas-

Re: [PR64164] drop copyrename, integrate into expand

On Fri, Mar 27, 2015 at 03:04:05PM -0300, Alexandre Oliva wrote: > This patch reworks the out-of-ssa expander to enable coalescing of SSA > partitions that don't share the same base name. This is done only when > optimizing. > > The test we use to tell whether two partitions can be merged no

Re: Add fuzzing coverage support

Hi! While this has been posted after stage1 closed and I'm not really happy that it missed the deadline, I'm willing to grant an exception, the patch is small enough that it is ok at this point of stage3. That said, next time please try to submit new features in time. Are there any plans for

Re: [ARM] Fix PR middle-end/65958

> + (unspec_volatile:PTR [(match_operand:PTR 1 "register_operand" "0") > + (match_operand:PTR 2 "register_operand" "r")] > +UNSPEC_PROBE_STACK_RANGE))] Minor nit. Since this is used in an unspec_volatile, the name should be UNSPECV_ and

[PATCH, i386, AVX-512, PR68633] Fix order of operands in kunpck[bw,wd,dq] patterns.

Hello, Patch in the bottom fixes miscompare issue on Spec2k6/434.zeus. Bootstrapped & reg-tested. If no objections - I'll commit it into GCC main trunk on Monday. gcc/ PR target/68633 * config/i386/sse.md (define_insn "kunpckhi"): Fix operands order. (define_insn

[graphite] test needs pthreads

The recently added test graphite/id-28.c requires pthreads due to its use of -fcilkplus. Committed as obvious. nathan 2015-12-04 Nathan Sidwell * gcc.dg/graphite/id-28.c: Requires pthreads. Index: testsuite/gcc.dg/graphite/id-28.c

Re: [PATCH 1/2] s/390: Implement "target" attribute.

Next version of the patch with the changes discussed internally. (Sorry for the version number; I now use my internam branch numbers for sake of clarity.) Ciao Dominik ^_^ ^_^ -- Dominik Vogt IBM Germany gcc/ChangeLog * config/s390/s390.opt (s390_arch_string): Remove.

Re: [PATCH 2/2] rs6000: Clean up the cstore code a bit

On Fri, Dec 4, 2015 at 9:34 AM, Segher Boessenkool wrote: > "register_operand" was a bit confusing. Also some other minor cleanups. > > Tested on powerpc64-linux; okay for mainline? > > > Segher > > > 2015-12-04 Segher Boessenkool > > *

Re: [Patch, Fortran] PR45859 - Permit array elements to coarray dummy arguments

I pressed "Send" too early - as the testsuite fails unless the following patch is applied. I think I will just use this test case (with patch) instead of adding a new test-suite file. Required patch: --- a/gcc/testsuite/gfortran.dg/coarray_args_2.f90 +++

[PTX] prologue emission

The PTX backend has to emit PTX function prototypes and prologues in addition to the regular argument marshalling machinery. And of course these all have to agree with each other. The first two are done by two different pieces of code, This patch changes things so that prototype and prologue

Re: [PATCH][AArch64] Don't allow -mgeneral-regs-only to change the .arch assembler directives

Ping. This almost fell through the cracks. https://gcc.gnu.org/ml/gcc-patches/2015-10/msg00055.html Thanks, Kyrill On 01/10/15 14:00, Kyrill Tkachov wrote: Hi all, As part of the SWITCHABLE_TARGET work I inadvertently changed the behaviour of -mgeneral-regs-only with respect to the .arch

Re: [PATCH 2/2] s/390: Implement "target" attribute.

On 09/25/2015 04:02 PM, Dominik Vogt wrote: > On Fri, Sep 25, 2015 at 02:59:41PM +0100, Dominik Vogt wrote: >> The following set of two patches implements the function >> __attribute__ ((target("..."))) and the corresponding #pragma GCC >> target("...") on S/390. It comes with certain

Re: [PATCH 01/10] C++ FE: expression ranges v4

On 12/03/2015 09:55 AM, David Malcolm wrote: @@ -362,10 +362,11 @@ convert_to_real_1 (tree type, tree expr, bool fold_p) case REAL_TYPE: /* Ignore the conversion if we don't need to store intermediate results and neither type is a decimal float. */ - return build1

Re: [PATCH] Add XFAIL to g++.dg/template/ref3.C (PR c++/68699)

On 12/04/2015 11:45 AM, David Malcolm wrote: On Fri, 2015-12-04 at 11:01 -0500, Jason Merrill wrote: On 12/03/2015 05:08 PM, David Malcolm wrote: On Thu, 2015-12-03 at 15:38 -0500, Jason Merrill wrote: On 12/03/2015 09:55 AM, David Malcolm wrote: Testcase g++.dg/template/ref3.C: 1

Re: [PATCH] Use explicit UNKNOWN_LOCATION instead of input_location (which is line 1) for process_options diagnostics (PR c/68656)

On 12/04/2015 05:45 PM, Jakub Jelinek wrote: This patch fixes it to use explicit UNKNOWN_LOCATION, instead of explicit or implicit input_location, which for most of process_options is somewhere on line 1 of the main source file. Ok. Bernd

Re: [RFA][PATCH] Run CFG cleanups after reassociation as needed

On December 4, 2015 5:20:52 PM GMT+01:00, Jeff Law wrote: >On 12/04/2015 03:19 AM, Richard Biener wrote: >> On Thu, Dec 3, 2015 at 6:54 PM, Jeff Law wrote: >>> This is something I noticed while working on fixing 67816. >>> >>> Essentially I was seeing trivially

Re: [PATCH][GCC] Make stackalign test LTO proof

On 12/04/2015 04:18 PM, Andre Vieira wrote: Reworked following Joern's suggestion. Is this OK? Yes. Bernd

[patch] libstdc++/57060 cope with invalid thread IDs

This patch ensures that this_thread::get_id() returns a value that is distinct from the "not a thread" value, and avoids undefined behaviour in pthread_equal. Previously programs using glibc but not linking to libpthread would get the "not a thread" value for std::this_thread::get_id() in main.

Re: Add fuzzing coverage support

On Fri, Dec 04, 2015 at 06:32:38PM +0100, Dmitry Vyukov wrote: > +2015-12-04 Dmitry Vyukov > + > + * sancov.c: New file. > + * Makefile.in (OBJS): Add sancov.o. > + * invoke.texi (-fsanitize-coverage=trace-pc): Describe. > + * passes.def (sancov_pass): Add. >

Re: Ping [PATCH] c++/42121 - diagnose invalid flexible array members

On 12/03/2015 11:42 PM, Martin Sebor wrote: + if (next && TREE_CODE (next) == FIELD_DECL) This will break if there's a non-field between the array and the next field. @@ -4114,7 +4115,10 @@ walk_subobject_offsets (tree type, /* Avoid recursing into objects that are not

Re: [PATCH] Fix -Werror= handling for Joined warnings, add a few missing Warning keywords (PRs c/48088, c/68657)

On Fri, Dec 04, 2015 at 06:01:58PM +0100, Bernd Schmidt wrote: > I think marking stuff with Warning as appropriate qualifies as obvious. > > On 12/04/2015 05:37 PM, Jakub Jelinek wrote: > >+ /* If the switch takes an integer, convert it. */ > >+ if (arg &&

Re: [PATCH] S/390: Fix warning in "*movstr" pattern.

Version 6 with another fix. This should work now. Ciao Dominik ^_^ ^_^ -- Dominik Vogt IBM Germany gcc/ChangeLog * config/s390/s390.md ("movstr", "*movstr"): Fix warning. ("movstr"): New indirect expanders used by "movstr". gcc/testsuite/ChangeLog *

Re: S/390: Fix warnings in "*setmem_long..." patterns.

Version 5 with the latest requested changes. Seems to work now. I've dropped the extra patch and rather marked the failing tests as "xfail". Ciao Dominik ^_^ ^_^ -- Dominik Vogt IBM Germany gcc/ChangeLog * config/s390/s390.c (s390_expand_setmem): Use new expanders. *

Re: Add fuzzing coverage support

On Fri, Dec 4, 2015 at 2:41 PM, Jakub Jelinek wrote: > Hi! > > While this has been posted after stage1 closed and I'm not really happy > that it missed the deadline, I'm willing to grant an exception, the patch > is small enough that it is ok at this point of stage3. That said,

Re: Add fuzzing coverage support

On Fri, Dec 4, 2015 at 2:45 PM, Yury Gribov wrote: > On 12/04/2015 04:41 PM, Jakub Jelinek wrote: >> >> Hi! >> >> While this has been posted after stage1 closed and I'm not really happy >> that it missed the deadline, I'm willing to grant an exception, the patch >> is small

Re: [PATCH][1/2] Fix PR68553

On 04/12/15 16:04, Richard Biener wrote: > On December 4, 2015 4:32:33 PM GMT+01:00, Alan Lawrence > wrote: >> On 27/11/15 08:30, Richard Biener wrote: >>> >>> This is part 1 of a fix for PR68533 which shows that some targets >>> cannot can_vec_perm_p on an identity

Re: [PATCH] Do not sanitize left shifts for -fwrapv (PR68418)

On 25/11/2015 14:55, Paolo Bonzini wrote: > Left shifts into the sign bit is a kind of overflow, and the > standard chooses to treat left shifts of negative values the > same way. > > However, the -fwrapv option modifies the language to one where > integers are defined as two's

Re: [PATCH][PR tree-optimization/67816] Fix jump threading when DOM removes conditionals in jump threading path

On 12/04/2015 03:12 AM, Richard Biener wrote: On Thu, Dec 3, 2015 at 9:29 PM, Jeff Law wrote: On 12/02/2015 08:35 AM, Richard Biener wrote: The most interesting side effect, and one I haven't fully analyzed yet is an unexpected jump thread -- which I've traced back to

Commit: MSP430: Reduce number of multilibs

Hi Guys, I am applying the attached patch to reduce the number of multilibs for the MSP430 target. This is at the request of TI, on behalf of their customers, who complained that the toolchain was too large. The patch only affects MSP430 specific files, and parts of files. It does not

[PATCH] PPC sqrtf using rsqrtes (PR 68609)

The PowerPC port provides reciprocal sqrt but doesn't implement the extra incantation to utilize it for sqrtf. The current implementation re-associates terms in the N-R iteration to utilize one constant instead of two, but does not provide a pre-computed estimate multiplied by the source, which

Re: [PATCH] Handle OBJ_TYPE_REF in FRE

> On Fri, 4 Dec 2015, Jan Hubicka wrote: > > > > Indeed we don't do code hoisting yet. Maybe one could trick PPRE > > > into doing it. > > > > > > Note that for OBJ_TYPE_REFs in calls you probably should better use > > > gimple_call_fntype instead of the type of the OBJ_TYPE_REF anyway > > >

[PATCH] Use explicit UNKNOWN_LOCATION instead of input_location (which is line 1) for process_options diagnostics (PR c/68656)

Hi! As mentioned in the PR, the process_options diagnostics is about errors on the command line (incompatible options, unsupported options etc.), which aren't really related to any source code location. This patch fixes it to use explicit UNKNOWN_LOCATION, instead of explicit or implicit

Re: [PATCH] Fix -Werror= handling for Joined warnings, add a few missing Warning keywords (PRs c/48088, c/68657)

I think marking stuff with Warning as appropriate qualifies as obvious. On 12/04/2015 05:37 PM, Jakub Jelinek wrote: + /* If the switch takes an integer, convert it. */ + if (arg && cl_options[opt_index].cl_uinteger) + { + value = integral_argument (arg);

[PATCH, committed] Fix PR fortran/68684

I've committed the obvious patch after confirmation from the original author that it is correct. 2015-12-04 Steven G. Kargl PR fortran/68684 * resolve.c (resolve_lock_unlock_event): Fix logic faux pas. Index: resolve.c

Re: Ping [PATCH] c++/42121 - diagnose invalid flexible array members

On Thu, 3 Dec 2015, Martin Sebor wrote: > The only C change in this patch is to include the size of excessively > large types in diagnostics (I found knowing the size helpful when > adding tests and I think it might be helpful to others as well). I don't see what that C change has to do with

Re: [RFA][PATCH] Run CFG cleanups after reassociation as needed

On 12/04/2015 03:19 AM, Richard Biener wrote: On Thu, Dec 3, 2015 at 6:54 PM, Jeff Law wrote: This is something I noticed while working on fixing 67816. Essentially I was seeing trivially true or trivially false conditionals left in the IL for DOM to clean up. While DOM can

[PATCH] Add XFAIL to g++.dg/template/ref3.C (PR c++/68699)

On Fri, 2015-12-04 at 11:01 -0500, Jason Merrill wrote: > On 12/03/2015 05:08 PM, David Malcolm wrote: > > On Thu, 2015-12-03 at 15:38 -0500, Jason Merrill wrote: > >> On 12/03/2015 09:55 AM, David Malcolm wrote: > >>> Testcase g++.dg/template/ref3.C: > >>> > >>>1 // PR c++/28341 > >>>

[PATCH] Fix -Werror= handling for Joined warnings, add a few missing Warning keywords (PRs c/48088, c/68657)

Hi! GCC changed recently to disallow -Werror= on W options that don't have Warning keyword set on them, the following patch fixes 3 spots where Warning has been unintentionally omitted. The PR also mentions -Wpsabi, but I believe -Werror=psabi is not appropriate, because -Wpsabi is not really a

Re: -fstrict-aliasing fixes 6/6: permit inlining of comdats

> > I wonder if you can split out the re-naming at this stage. Further > comments below. OK, I will commit the renaming and ipa-icf fix separately. > > > Bootstrapped/regtested x86_64-linux, OK? > > > > I will work on some testcases for the ICF and fold-const that would lead > > to wrong code

[AArch64] Add register constraints to add3_pluslong

h64.md (add3_pluslong): Add register constraints. gcc/testsuite/ 2015-12-04 James Greenhalgh <james.greenha...@arm.com> * gcc.c-torture/compile/20151204.c: New. diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index 765df6a..79d1414 100644 --- a/gcc/co

Re: [AArch64] Add register constraints to add3_pluslong

nstraints. > > gcc/testsuite/ > > 2015-12-04 James Greenhalgh <james.greenha...@arm.com> > > * gcc.c-torture/compile/20151204.c: New. > +main(int argc, char** argv) Space before (. OK /M

[PATCH] Adjust vect-widen-mult-const-[su]16.c for r226675

Since r226675, we have been seeing these failures: FAIL: gcc.dg/vect/vect-widen-mult-const-s16.c -flto -ffat-lto-objects scan-tree-dump-times vect "pattern recognized" 2 FAIL: gcc.dg/vect/vect-widen-mult-const-s16.c scan-tree-dump-times vect "pattern recognized" 2 FAIL:

RE: [PATCH] enable loop fusion on isl-15

I would highly recommend updating the required version of ISL to isl-0.15: that would simplify the existing code, removing a lot of code under "#ifdef old ISL", and allow us to fully transition to schedule_trees instead of dealing with the old antiquated union_maps in the scheudler. The result is

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