Re: Simple bitop reassoc in match.pd

On Wed, 11 May 2016, Jeff Law wrote: On 05/11/2016 10:17 AM, Marc Glisse wrote: The transformation seems right to me, but we are then missing another transformation like ~X & Y -> X ^ Y when we know that X & ~Y is 0 (the 1 bits of X are included in those of Y). That may not be easy with the

Re: Allow embedded timestamps by C/C++ macros to be set externally (3)

Attaching the patch with all the issues addressed. On 16-05-10 13:32:03, Bernd Schmidt wrote: > Not sure %ld is always correct here. See below. Using %wd now > >diff --git a/gcc/gcc.c b/gcc/gcc.c > >index 1af5920..0b11cb5 100644 > >--- a/gcc/gcc.c > >+++ b/gcc/gcc.c > >@@ -403,6 +403,7 @@

[PATCH v3, rs6000] Add built-in support for new Power9 darn (deliver a random number) instruction

This patch adds built-in function support for the Power9 darn instruction. This patch differs from the v2 patch distributed on 5 May in the following ways: 1. Removed "darn" macro short-hand definitions from altivec.h 2. Removed extraneous assert in rs6000.c 3. Changed the attribute type for

Re: [PATCH, rs6000] Fix pr70963.c test case for older hardware

On Wed, May 11, 2016 at 02:45:32PM -0500, Bill Schmidt wrote: > When fixing PR70963, I introduced a test case that didn’t sufficiently > constrain > the target architecture. Although the built-ins I was testing are available > on any > platform supporting VSX, the use of vec_all_eq for vector

Re: [PATCH] Fix crash with --help=^ (PR driver/71063)

On Wed, May 11, 2016 at 10:40:36PM +0200, Marek Polacek wrote: > We crashed when given --help=^ and Kyrill explained why in the PR > (). The following > seems as good a fix as any, I think. > > Bootstrapped/regtested on x86_64-linux, ok for

Re: Simple bitop reassoc in match.pd

On Wed, 11 May 2016, Marc Glisse wrote: We could also use set_range_info and make simplify_conversion_using_ranges use get_range_info instead of get_value_range. Something like this seems to fix the testcase. I'll try to submit it properly, but I don't know when. (I also added the ~X

[PATCH] Fix crash with --help=^ (PR driver/71063)

We crashed when given --help=^ and Kyrill explained why in the PR (). The following seems as good a fix as any, I think. Bootstrapped/regtested on x86_64-linux, ok for trunk? 2016-05-11 Marek Polacek PR

Re: [C PATCH] PR43651: add warning for duplicate qualifier

On 05/10/2016 10:51 PM, Joseph Myers wrote: > On Sat, 9 Apr 2016, Mikhail Maltsev wrote: > >> gcc/c/ChangeLog: >> >> 2016-04-08 Mikhail Maltsev >> >> PR c/43651 >> * c-decl.c (declspecs_add_qual): Warn when -Wduplicate-decl-specifier >> is enabled.

[PATCH, rs6000] Fix pr70963.c test case for older hardware

Hi, When fixing PR70963, I introduced a test case that didn’t sufficiently constrain the target architecture. Although the built-ins I was testing are available on any platform supporting VSX, the use of vec_all_eq for vector double and vector long long requires at least a POWER8 target. This

[PATCH, testsuite]: Fix gcc.target/i386/sse-13.c failure with -fpic

Hello! A couple of testcases are missing dg-add-options bind_pic_locally directive. This is needed to avoid compilation failure with __always_inline__ attribute when "extern" and "__inline" are defined away. 2016-05-11 Uros Bizjak * gcc.target/i386/sse-13.c: Add

[PATCH, i386]: Use copy_to_suggested_reg in legitimize_pic_address some more

Hello! Patched gcc creates exactly the same RTL, so the comment does not apply anymore. Not to mention that gen_movsi should not operate on DImode values ... 2016-05-11 Uros Bizjak * config/i386/i386.c (legitimize_pic_address): Use copy_to_suggested_reg instead of

Re: Simple bitop reassoc in match.pd

On Wed, 11 May 2016, Jeff Law wrote: We could also simplify (int)(_Bool)x to x using VRP information that x is in [0, 1], but apparently when VRP replaces x==0 with y=x^1,(_Bool)y, it does not compute a range for the new variable y, and by the time the next VRP pass comes, it is too late.

PATCH: PR target/70738: Add -mgeneral-regs-only option

On Tue, May 10, 2016 at 1:02 PM, Sandra Loosemore wrote: > On 04/20/2016 07:42 AM, Koval, Julia wrote: >> >> diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi >> index a5a8b23..82de5bf 100644 >> --- a/gcc/doc/extend.texi >> +++ b/gcc/doc/extend.texi >> @@ -5263,6

Re: [C/C++ PATCH] Missing warning for contradictory attributes (PR c++/71024)

On 05/11/2016 06:38 PM, Marek Polacek wrote: I checked and we don't have a test testing all the contradicting attributes as in the new test. But with that added, we can do the following... Tested on x86_64-linux, ok for trunk? 2016-05-11 Marek Polacek *

Re: [C/C++ PATCH] Missing warning for contradictory attributes (PR c++/71024)

On Wed, May 11, 2016 at 04:56:05PM +0200, Bernd Schmidt wrote: > On 05/11/2016 03:59 PM, Marek Polacek wrote: > > The C++ FE was missing diagnostics e.g. when an "always_inline" on DECL was > > followed by DECL with the "noinline" attribute. The C FE already has code > > dealing with this, so I

Re: Simple bitop reassoc in match.pd

On 05/11/2016 10:17 AM, Marc Glisse wrote: The transformation seems right to me, but we are then missing another transformation like ~X & Y -> X ^ Y when we know that X & ~Y is 0 (the 1 bits of X are included in those of Y). That may not be easy with the limited bit tracking we have. A version

Re: Simple bitop reassoc in match.pd (was: Canonicalize X u< X to UNORDERED_EXPR)

On Wed, 11 May 2016, H.J. Lu wrote: * fold-const.c (fold_binary_loc) [(X ^ Y) & Y]: Remove and merge with... * match.pd ((X & Y) ^ Y): ... this. It caused: FAIL: gcc.dg/tree-ssa/vrp47.c scan-tree-dump-times vrp2 " & 1;" 0 on x86. Ah, yes, logical_op_short_circuit so I

Re: libgomp: Make GCC 5 OpenACC offloading executables work

Hi! On Wed, 11 May 2016 11:38:39 -0400, Nathan Sidwell wrote: > On 05/11/16 10:22, Bernd Schmidt wrote: > > On 05/11/2016 03:46 PM, Thomas Schwinge wrote: > >>> What we now got, doesn't work, for several reasons. GCC 5 OpenACC > >>> offloading executables will just run into

Re: [PATCH, DOC] Document ASAN_OPTIONS="halt_on_error" env variable.

On 05/11/2016 08:56 AM, Jakub Jelinek wrote: On Wed, May 11, 2016 at 04:47:46PM +0200, Martin Liška wrote: Thank you Jakub for the note. What about the second version of the patch? Thanks, Martin >From da688c187067dc5c475a4ab5b844c11c4bcd0494 Mon Sep 17 00:00:00 2001 From: marxin

Re: [PATCH][CilkPlus] Merge libcilkrts from upstream

On Wed, May 11, 2016 at 10:47:49 +0100, Ramana Radhakrishnan wrote: > > > I've looked at the generated code in more details, and for armv6 this > > generates > > mcr p15, 0, r0, c7, c10, 5 > > which is not what __cilkrts_fence uses currently (CP15DSB vs CP15DMB) > > Wow I hadn't noticed

[PTX] more test markup

I've applied this patch to markup some more tests on what they require. Two crash the PTX assembler, so skip those. nathan 2016-05-11 Nathan Sidwell * gcc.dg/pr68671.c: Xfail on PTX -- assembler crash. * gcc.c-torture/execute/pr68185.c: Likewise. * gcc.dg/ipa/pr70306.c:

Re: Re: [ARM] Enable __fp16 as a function parameter and return type.

On Wed, 11 May 2016, Tejas Belagod wrote: > AFAICS, I don't think it mandates a double-rounding behavior for double to > __fp16 conversions and I don't see a change in stand between the two versions > of ACLE on the behavior of __fp16. It's not a change between the two versions of ACLE. It's a

[PATCH] Respect --param ipa-max-agg-items=0

Hi, when analyzing PR 70646, I found out that --param ipa-max-agg-items=0 does not prevent creation of aggregate jump functions because it is checked only after the first such jump function is created. The following patch fixes that by checking the parameter before starting the whole analysis.

[PR 70646] Store size to inlining predicate conditions

Hi, PR 70646 takes place because inlining predicate evaluation does not check for memory access size when evaluating IS_NOT_CONSTANT conditions. This means that a smaller stored constant is evaluated as disproving an IS_NOT_CONSTANT condition even though that was meant for a larger memory read.

Re: libgomp: Make GCC 5 OpenACC offloading executables work

On 05/11/16 10:22, Bernd Schmidt wrote: On 05/11/2016 03:46 PM, Thomas Schwinge wrote: What we now got, doesn't work, for several reasons. GCC 5 OpenACC offloading executables will just run into SIGSEGV. I'm tempted to say, let's just wait until someone actually reports that in bugzilla.

Re: [PATCH, DOC] Document ASAN_OPTIONS="halt_on_error" env variable.

On Wed, May 11, 2016 at 04:47:46PM +0200, Martin Liška wrote: > Thank you Jakub for the note. What about the second version of the patch? > > Thanks, > Martin > >From da688c187067dc5c475a4ab5b844c11c4bcd0494 Mon Sep 17 00:00:00 2001 > From: marxin > Date: Wed, 11 May 2016

Re: Re: [ARM] Enable __fp16 as a function parameter and return type.

On 28/04/16 16:49, Joseph Myers wrote: On Thu, 28 Apr 2016, Matthew Wahab wrote: Hello, The ARM target supports the half-precision floating point type __fp16 but does not allow its use as a function return or parameter type. This patch removes that restriction and defines the ACLE macro

Re: [C/C++ PATCH] Missing warning for contradictory attributes (PR c++/71024)

On 05/11/2016 03:59 PM, Marek Polacek wrote: The C++ FE was missing diagnostics e.g. when an "always_inline" on DECL was followed by DECL with the "noinline" attribute. The C FE already has code dealing with this, so I factored it out to a common function. Bootstrapped/regtested on

Re: [PATCH, DOC] Document ASAN_OPTIONS="halt_on_error" env variable.

On 05/11/2016 04:20 PM, Jakub Jelinek wrote: > On Wed, May 11, 2016 at 04:13:27PM +0200, Martin Liška wrote: >> It's bit confusing for a use that -fsanitize-recover=address does not recover >> an instrumented binary. As a default value of halt_on_error is set to 0 for >> address sanitizer, >> the

[PATCH][ARM] PR target/71056: Don't use vectorized builtins when NEON is not available

Hi all, In this PR a NEON builtin is introduced during SLP vectorisation even when NEON is not available because arm_builtin_vectorized_function is missing an appropriate check in the BSWAP handling code. Then during expand when we try to expand the NEON builtin the code in

Re: [PATCH, DOC] Document ASAN_OPTIONS="halt_on_error" env variable.

On 05/11/2016 05:13 PM, Martin Liška wrote: Hello. It's bit confusing for a use that -fsanitize-recover=address does not recover an instrumented binary. As a default value of halt_on_error is set to 0 for address sanitizer, the binary fails on a first error. I'm the guy behind

Re: libgomp: Make GCC 5 OpenACC offloading executables work

On 05/11/2016 03:46 PM, Thomas Schwinge wrote: What we now got, doesn't work, for several reasons. GCC 5 OpenACC offloading executables will just run into SIGSEGV. I'm tempted to say, let's just wait until someone actually reports that in bugzilla. Offloading in gcc-5 was broken enough that

Re: [PATCH, DOC] Document ASAN_OPTIONS="halt_on_error" env variable.

On Wed, May 11, 2016 at 04:13:27PM +0200, Martin Liška wrote: > It's bit confusing for a use that -fsanitize-recover=address does not recover > an instrumented binary. As a default value of halt_on_error is set to 0 for > address sanitizer, > the binary fails on a first error. > > Following

Re: [PATCH] Apply fix for PR68463 to RS6000

Thomas, On 05/11/2016 09:13 AM, Thomas Schwinge wrote: Hi! On Tue, 10 May 2016 10:39:33 -0500, James Norris wrote: The fix for PR68463 (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68463) was missing code that prevented the fix from working on RS6000. The attached

Re: [PATCH 3/3] Enhance dumps of IVOPTS

On 05/10/2016 03:16 PM, Bin.Cheng wrote: > Another way is to remove the use of id for struct iv_inv_expr_ent once > for all. We can change iv_ca.used_inv_expr and cost_pair.inv_expr_id > to pointers, and rename iv_inv_expr_ent.id to count and use this to > record reference number in iv_ca. This

[PATCH, DOC] Document ASAN_OPTIONS="halt_on_error" env variable.

Hello. It's bit confusing for a use that -fsanitize-recover=address does not recover an instrumented binary. As a default value of halt_on_error is set to 0 for address sanitizer, the binary fails on a first error. Following patch attempts to explain the ENV variable. Ready for trunk? Thanks,

Re: [PATCH] Apply fix for PR68463 to RS6000

Hi! On Tue, 10 May 2016 10:39:33 -0500, James Norris wrote: > The fix for PR68463 (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68463) > was missing code that prevented the fix from working on RS6000. The > attached patch adds the missing code for RS6000. :-( Bah.

[PATCH] Fix PR71055

The following fixes PR71055. Bootstrapped and tested on x86_64-unknown-linux-gnu, applied. Richard. 2016-05-11 Richard Biener PR tree-optimization/71055 * tree-ssa-sccvn.c (vn_reference_lookup_3): When native-interpreting sth with precision not

[C/C++ PATCH] Missing warning for contradictory attributes (PR c++/71024)

The C++ FE was missing diagnostics e.g. when an "always_inline" on DECL was followed by DECL with the "noinline" attribute. The C FE already has code dealing with this, so I factored it out to a common function. Bootstrapped/regtested on x86_64-linux, ok for trunk? 2016-05-11 Marek Polacek

Re: "const" qualifier vs. OpenACC data/OpenMP map clauses

Hi! Ping. Or should I open a PR for that? On Fri, 15 Apr 2016 10:47:34 +0200, I wrote: > On Thu, 14 Apr 2016 14:21:33 -0700, Cesar Philippidis > wrote: > > This patch fixes a segfault in libgomp.oacc-fortran/non-scalar-data.f90. > > The problem here is that 'n' is a

[PATCH] Fix PR71057

The following fixes PR71057 Bootstrapped and tested on x86_64-unknown-linux-gnu, applied to trunk. Richard. 2016-05-11 Richard Biener PR debug/71057 * dwarf2out.c (retry_incomplete_types): Set early_dwarf. (dwarf2out_finish): Move

Re: Simple bitop reassoc in match.pd (was: Canonicalize X u< X to UNORDERED_EXPR)

On Mon, May 9, 2016 at 11:11 PM, Marc Glisse wrote: > On Fri, 6 May 2016, Marc Glisse wrote: > >> Here they are. I did (X) and (X)&(X). The next one would be >> ((X)), but at some point we have to defer to reassoc. >> >> I didn't add the convert?+tree_nop_conversion_p to the

Re: [PATCH] clean up insn-automata.c

On 05/11/2016 01:39 AM, Alexander Monakov wrote: On Wed, 30 Mar 2016, Bernd Schmidt wrote: On 03/25/2016 04:43 AM, Aldy Hernandez wrote: If Bernd is fine with this, I'm happy to retract my patch and any possible followups. I'm just interested in having no path causing a possible out of bounds

Re: libgomp: Make GCC 5 OpenACC offloading executables work

Hi! Ping. On Wed, 20 Apr 2016 13:35:28 +0200, I wrote: > On Mon, 28 Sep 2015 15:38:57 -0400, Nathan Sidwell wrote: > > On 09/24/15 04:40, Jakub Jelinek wrote: > > > Iff GCC 5 compiled offloaded OpenACC/PTX code will always do host fallback > > > anyway because of the

Re: libgomp: In OpenACC testing, cycle though $offload_targets, and by default only build for the offload target that we're actually going to test

Hi! Ping. On Mon, 02 May 2016 11:54:27 +0200, I wrote: > On Fri, 29 Apr 2016 09:43:41 +0200, Jakub Jelinek wrote: > > On Thu, Apr 28, 2016 at 12:43:43PM +0200, Thomas Schwinge wrote: > > > commit 3b521f3e35fdb4b320e95b5f6a82b8d89399481a > > > Author: Thomas Schwinge

Re: Splitting up gcc/omp-low.c?

Hi! Ping. On Tue, 03 May 2016 11:34:39 +0200, I wrote: > On Wed, 13 Apr 2016 18:01:09 +0200, I wrote: > > On Fri, 08 Apr 2016 11:36:03 +0200, I wrote: > > > On Thu, 10 Dec 2015 09:08:35 +0100, Jakub Jelinek > > > wrote: > > > > On Wed, Dec 09, 2015 at 06:23:22PM +0100, Bernd

[Patch ARM/AArch64 03/11] AdvSIMD tests: be more verbose.

It is useful to have more detailed information in the logs when checking validation results: instead of repeating the intrinsic name, we now print its return type too. 2016-05-02 Christophe Lyon * gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h (CHECK,

[Patch ARM/AArch64 04/11] Add forgotten vsliq_n_u64 test.

2016-05-02 Christophe Lyon * gcc.target/aarch64/advsimd-intrinsics/vsli_n.c: Add check for vsliq_n_u64. Change-Id: I90bb2b225ffd7bfd54a0827a0264ac20271f54f2 diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsli_n.c

[Patch ARM/AArch64 08/11] Add missing vstX_lane fp16 tests.

2016-05-02 Christophe Lyon * gcc.target/aarch64/advsimd-intrinsics/vstX_lane.c: Add fp16 tests. Change-Id: I64e30bc30a9a9cc5c47eff212e7d745bf3230fe7 diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vstX_lane.c

[Patch ARM/AArch64 05/11] Add missing vreinterpretq_p{8,16} tests.

2016-05-02 Christophe Lyon * gcc.target/aarch64/advsimd-intrinsics/vreinterpret.c: Add missing tests for vreinterpretq_p{8,16}. Change-Id: I7e9bb18c668c34685f12aa578868d7752232a96c diff --git

[Patch ARM/AArch64 07/11] Add missing vget_lane fp16 tests.

2016-05-02 Christophe Lyon * gcc.target/aarch64/advsimd-intrinsics/vget_lane.c: Add fp16 tests. Change-Id: I5fafd1e90baf09588ab9f5444817c74e7d865a20 diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vget_lane.c

[Patch ARM/AArch64 09/11] Add missing vrnd{,a,m,n,p,x} tests.

2016-05-02 Christophe Lyon * gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrnd.c: New. * gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndX.inc: New. * gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrnda.c: New. *

[Patch ARM/AArch64 02/11] We can remove useless #ifdefs from these tests: vmul, vshl and vtst.

2016-05-02 Christophe Lyon * gcc.target/aarch64/advsimd-intrinsics/vmul.c: Remove useless #ifdef. * gcc.target/aarch64/advsimd-intrinsics/vshl.c: Likewise. * gcc.target/aarch64/advsimd-intrinsics/vtst.c: Likewise. Change-Id:

[Patch ARM/AArch64 10/11] Add missing tests for intrinsics operating on poly64 and poly128 types.

2016-05-02 Christophe Lyon * gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h (result): Add poly64x1_t and poly64x2_t cases if supported. * gcc.target/aarch64/advsimd-intrinsics/compute-ref-data.h (buffer, buffer_pad, buffer_dup,

[Patch ARM/AArch64 06/11] Add missing vtst_p8 and vtstq_p8 tests.

2016-05-02 Christophe Lyon * gcc.target/aarch64/advsimd-intrinsics/vtst.c: Add tests for vtst_p8 and vtstq_p8. Change-Id: Id555a9b3214945506a106e2465b42d38bf76a3a7 diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vtst.c

[Patch ARM/AArch64 11/11] Add missing tests for vreinterpret, operating of fp16 type.

2016-05-04 Christophe Lyon * gcc.target/aarch64/advsimd-intrinsics/vreinterpret.c: Add fp16 tests. * gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p128.c: Likewise. * gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p64.c: Likewise.

[Patch ARM/AArch64 00/11][testsuite] AdvSIMD intrinsics update

Hi, A few months ago, we decided it was time to remove neon-testgen.ml and its generated tests. I did it, just to realize too late that some intrinsics were not covered anymore, so I reverted the removal. This patch series performs a little bit of cleanup and adds the missing tests to cover all

[Patch ARM/AArch64 01/11] Fix typo in vreinterpret.c test comment.

2016-05-02 Christophe Lyon * gcc.target/aarch64/advsimd-intrinsics/vreinterpret.c: Fix typo in comment. Change-Id: I7244c0dc0a5ab2dbcec65b40c050f72f92707139 diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vreinterpret.c

[committed] Fix up matmul in !$omp workshare (PR fortran/70855)

Hi! The parsing of !$omp workshare requires only small precise set of statements that can appear inside, which the inlining of matmul assign breaks. Fixed by disabling the inlining in !$omp workshare regions. Long term, it would be nice to inline those in !$omp workshare again and actually

Re: [PATCH] Fix PR70986

On Wed, 11 May 2016, Richard Biener wrote: > On Tue, 10 May 2016, Richard Biener wrote: > > > > > ifcvt is confused about fake edges not being loop exits which the > > following fixes. > > > > Bootstrap / regtest pending on x86_64-unknown-linux-gnu. > > Didn't fare well. The following patch

Re: [PATCH] Fix PR70986

On Tue, 10 May 2016, Richard Biener wrote: > > ifcvt is confused about fake edges not being loop exits which the > following fixes. > > Bootstrap / regtest pending on x86_64-unknown-linux-gnu. Didn't fare well. The following patch mitigates the issue as well but in the end make it just

Re: [PATCH] Introduce tests for -fsanitize=use-after-scope

On 05/06/2016 01:07 PM, Martin Liška wrote: > Hi. > > This is a new test coverage for the new sanitizer option. > > Martin Hello. This is second version of tests. I fixed a test where a variable overflowed and couple of tests were adopted from LLVM's testsuite (basically rewritten from

Re: [PATCH, RFC] Introduce -fsanitize=use-after-scope

On 05/06/2016 02:22 PM, Jakub Jelinek wrote: > On Fri, May 06, 2016 at 01:04:30PM +0200, Martin Liška wrote: >> I've started working on the patch couple of month go, basically after >> a brief discussion with Jakub on IRC. >> >> I'm sending the initial version which can successfully run

Re: [PATCH, PR middle-end/70807] Free dominance info in CSE pass

2016-05-11 15:45 GMT+03:00 H.J. Lu : > On Wed, May 11, 2016 at 2:26 AM, Ilya Enkovich wrote: >> 2016-05-10 21:13 GMT+03:00 H.J. Lu : >>> On Tue, May 10, 2016 at 9:19 AM, Ilya Enkovich >>> wrote: Hi,

Re: [PATCH, PR middle-end/70807] Free dominance info in CSE pass

On Wed, May 11, 2016 at 2:26 AM, Ilya Enkovich wrote: > 2016-05-10 21:13 GMT+03:00 H.J. Lu : >> On Tue, May 10, 2016 at 9:19 AM, Ilya Enkovich >> wrote: >>> Hi, >>> >>> Curretly CSE may modify CFG and leave invalid dominance

[PATCH] libstdc++/71049 fix --disable-libstdcxx-dual-abi bootstrap

The TM library support broke --disable-libstdcxx-dual-abi. This fixes it, by only defining the constructors for new strings when the dual ABI is active. PR libstdc++/71049 * src/c++11/cow-stdexcept.cc [!_GLIBCXX_USE_DUAL_ABI]: Don't define exception constructors with

Re: [SH][committed] Remove SH5 support in compiler

On Wed, 2016-05-04 at 00:42 +0200, Eric Botcazou wrote: > > Did that. Looks there are no changes after regeneration. > > Not in the libada directory: > > eric@polaris:~/svn/gcc/libada> svn info configure configure.ac > Path: configure > Name: configure > Working Copy Root Path:

Re: [PATCH 3/3] shrink-wrap: Remove complicated simple_return manipulations

On 09/05/16 16:08, Segher Boessenkool wrote: Hi Christophe, On Mon, May 09, 2016 at 03:54:26PM +0200, Christophe Lyon wrote: After this patch, I've noticed that gcc.target/arm/pr43920-2.c now fails at: /* { dg-final { scan-assembler-times "pop" 2 } } */ Before the patch, the generated code

RE: [ARM] mno-pic-data-is-text-relative & msingle-pic-base

> -Original Message- > From: Nathan Sidwell [mailto:nathanmsidw...@gmail.com] On Behalf Of > Nathan Sidwell > Sent: 09 May 2016 18:22 > To: Joey Ye; Richard Earnshaw; GCC Patches > Subject: Re: [ARM] mno-pic-data-is-text-relative & msingle-pic-base > > Joey, > > This patch will do what

Please update config.sub from GNU config

Hello, I'm currently working on port for new OS for both binutils and GCC. My patches depend on config.sub, which has been recently updated for Phoenix OS. Please synchronize, so I could test and send my patches here later on. Thanks, Jakub

Re: [PATCH 4/4] Initial version of RTL frontend

On 05/11/2016 01:06 PM, Ramana Radhakrishnan wrote: Is there any reason why this framework cannot be used to replace a large number of scan-assembler tests in various target testsuites which are essentially testing for either a peephole, a transformation or the register allocator eliminating

Re: [PATCH 4/4] Initial version of RTL frontend

On 10/05/16 19:20, Bernd Schmidt wrote: > On 05/10/2016 08:05 PM, Richard Biener wrote: >> On May 10, 2016 7:02:33 PM GMT+02:00, Jeff Law >> wrote: >>> Well, not if we take Bernd's idea and create a new backend for >>> testing purposes. If we want to know/test what reload's

Re: [PATCH] Preserve GCC 5 behavior for PR71002

On Tue, 10 May 2016, Jakub Jelinek wrote: > On Tue, May 10, 2016 at 10:18:59AM +0200, Richard Biener wrote: > > There are two options - not apply this folding if it doesn't preserve > > TBAA behavior (first patch) or preserve TBAA behavior by wrapping > > the base into a MEM_REF (which also

Re: [PATCH] [rtlfe] Barebones implementation of "__RTL"; next steps?

On Wed, May 11, 2016 at 3:31 AM, Trevor Saunders wrote: > On Tue, May 10, 2016 at 05:01:00PM -0400, David Malcolm wrote: >> [CCing Prasad since this may be useful for his gimple FE work, by >> replacing "rtl" with "gimple" in the patch] >> >> On Mon, 2016-05-09 at 11:44

Re: [PATCH] Fix PR71039

On May 11, 2016 11:36:11 AM GMT+02:00, Richard Biener wrote: >On Wed, 11 May 2016, Bernhard Reutner-Fischer wrote: > >> On May 10, 2016 3:07:12 PM GMT+02:00, Richard Biener > wrote: >> > >> >The following fixes PR71039 - we were failing to verify we can >>

Re: [PATCH][CilkPlus] Merge libcilkrts from upstream

> > I've looked at the generated code in more details, and for armv6 this > generates > mcr p15, 0, r0, c7, c10, 5 > which is not what __cilkrts_fence uses currently (CP15DSB vs CP15DMB) Wow I hadn't noticed that it was a DSB - DSB is way too heavy weight. Userland shouldn't need to use

Re: [patch] Tidy up RTL libfunc machinery

On Tue, May 10, 2016 at 10:12 PM, Eric Botcazou wrote: > Hi, > > this patch is aimed at cleaning up the mess with the RTL libfunc machinery. > > On the one hand you have comments like these in the RTL expander: > > /* It is incorrect to use the libcall calling conventions

Re: [PATCH] Fix PR71039

On Wed, 11 May 2016, Bernhard Reutner-Fischer wrote: > On May 10, 2016 3:07:12 PM GMT+02:00, Richard Biener > wrote: > > > >The following fixes PR71039 - we were failing to verify we can > >insert the lhs on the predecessor edges. > > > >Bootstrapped and tested on

Re: [PATCH, PR middle-end/70807] Free dominance info in CSE pass

2016-05-10 21:13 GMT+03:00 H.J. Lu : > On Tue, May 10, 2016 at 9:19 AM, Ilya Enkovich wrote: >> Hi, >> >> Curretly CSE may modify CFG and leave invalid dominance info. This patch >> improves track of CFG changes by CSE passes and frees dominance info

Re: [PATCH][CilkPlus] Merge libcilkrts from upstream

On 10 May 2016 at 21:24, Christophe Lyon wrote: > On 10 May 2016 at 19:18, Ilya Verbin wrote: >> On Tue, May 10, 2016 at 14:36:36 +0100, Ramana Radhakrishnan wrote: >>> On Tue, May 10, 2016 at 2:02 PM, Christophe Lyon >>>

Re: [PATCH][AArch64] Simplify ashl3 expander for SHORT modes

Ping. https://gcc.gnu.org/ml/gcc-patches/2016-04/msg01651.html Thanks, Kyrill On 27/04/16 15:10, Kyrill Tkachov wrote: Hi all, The ashl3 expander for QI and HI modes is needlessly obfuscated. The 2nd operand predicate accepts nonmemory_operand but the expand code FAILs if it's not a

Re: [PATCH][AArch64] Delete obsolete CC_ZESWP and CC_SESWP CC modes

Ping. https://gcc.gnu.org/ml/gcc-patches/2016-04/msg01652.html Thanks, Kyrill On 27/04/16 15:12, Kyrill Tkachov wrote: Hi all, The CC_ZESWP and CC_SESWP are not used anywhere and seem to be a remmant of some old code that was removed. The various compare+extend patterns in aarch64.md don't

Re: [PATCH][ARM] Fix costing of sign-extending load in rtx costs

Ping. https://gcc.gnu.org/ml/gcc-patches/2016-04/msg01655.html Thanks, Kyrill On 27/04/16 15:13, Kyrill Tkachov wrote: Hi all, Another costs issue that came out of the investigation for PR 65932 is that sign-extending loads get a higher cost than they should in the arm backend. The problem is

Re: [PATCH vs] Take known zero bits into account when checking extraction.

On Wed, May 11, 2016 at 10:40:11AM +0200, Bernd Schmidt wrote: > On 05/11/2016 09:42 AM, Dominik Vogt wrote: > >On Tue, May 10, 2016 at 05:05:06PM +0200, Bernd Schmidt wrote: > >>Earlier in the discussion you mentioned the intention to remove > >>these costs. Nothing else in the function does cost

Re: [PATCH] Fix PR71039

On May 10, 2016 3:07:12 PM GMT+02:00, Richard Biener wrote: > >The following fixes PR71039 - we were failing to verify we can >insert the lhs on the predecessor edges. > >Bootstrapped and tested on x86_64-unknown-linux-gnu, applied. >+ /* Verify if *idx is available at *DATA.

Re: [PATCH vs] Take known zero bits into account when checking extraction.

On 05/11/2016 09:42 AM, Dominik Vogt wrote: On Tue, May 10, 2016 at 05:05:06PM +0200, Bernd Schmidt wrote: Earlier in the discussion you mentioned the intention to remove these costs. Nothing else in the function does cost calculations - maybe you can try placing a gcc_unreachable into the case

Re: [PATCH 2/3] cfgcleanup: Fold jumps and conditional branches with returns

On 11 May 2016 at 01:26, Segher Boessenkool wrote: > On Tue, May 10, 2016 at 09:33:56PM +0200, Christophe Lyon wrote: >> This patch causes an ICE on gcc.dg/20010822-1.c for target arm-none-eabi >> --with-cpu=cortex-a9 > > That is PR71028, I sent a patch to fix it, will

Re: [PATCH, GCC] PR middle-end/55299, fold bitnot through ASR and rotates

On Tue, 10 May 2016, Mikhail Maltsev wrote: On 05/08/2016 10:57 PM, Marc Glisse wrote: On Sun, 8 May 2016, Mikhail Maltsev wrote: Hi! I decided to revive this patch: https://gcc.gnu.org/ml/gcc-patches/2015-06/msg00999.html. I addressed review comments about sign conversions. Bootstrapped

Re: [PATCH vs] Take known zero bits into account when checking extraction.

On Tue, May 10, 2016 at 05:05:06PM +0200, Bernd Schmidt wrote: > On 05/10/2016 03:06 PM, Dominik Vogt wrote: > >+ int cost_of_and; > >+ int cost_of_zero_ext; > >+ > >+ cost_of_and = rtx_cost (x, mode, in_code, 1, speed_p); > >+ cost_of_zero_ext =

Re: [PATCH 1/4, libgomp] Resolve deadlock on plugin exit (Ping x2)

Ping x2 On 2016/4/16 3:39 PM, Chung-Lin Tang wrote: > Ping. > > On 2016/3/21 06:21 PM, Chung-Lin Tang wrote: >> Hi, this is the set of patches from >> https://gcc.gnu.org/ml/gcc-patches/2015-12/msg01411.html >> revised again, this time also with audits for the HSA plugin. >> >> The changes are

Re: [PATCH, libgomp] Fix deadlock in acc_set_device_type (ping x3)

Ping x3 On 2016/4/19 10:30 PM, Chung-Lin Tang wrote: > Ping x2. > > Hi Jakub, > This patch is fairly straightforward, and solves a easily encountered > deadlock. Please approve for trunk and gcc-6-branch. > > Thanks, > Chung-Lin > > On 2016/4/16 03:39 PM, Chung-Lin Tang wrote: >> Ping. >> >>

Re: [PATCH, libgomp] Rewire OpenACC async (Ping x3)

Ping x3 On 2016/4/16 3:40 PM, Chung-Lin Tang wrote: > Ping. > > On 2016/4/8 07:02 PM, Chung-Lin Tang wrote: >> Ping. >> >> On 2016/3/29 5:48 PM, Chung-Lin Tang wrote: >>> I've updated this patch for trunk (as attached), and re-tested without >>> regressions. This patch is still a fix for >>>