Re: [PATCH], Define __FP_FAST_FMAF128 on PowerPC ISA 3.0

On Wed, 27 Sep 2017, Michael Meissner wrote: > The glibc team has requested we define the standard macro (__FP_FAST_FMAF128) > for PowerPC code when we have the IEEE 128-bit floating point hardware > instructions enabled. It's not a standard macro. TS 18661-3 has FP_FAST_FMAF128 as an optional

Re: [PATCH] Enhance PHI processing in VN

On Wed, Sep 27, 2017 at 6:58 PM, Richard Sandiford wrote: > David Edelsohn writes: >> On Fri, Sep 15, 2017 at 2:53 AM, Richard Biener wrote: >>> On Thu, 14 Sep 2017, David Edelsohn wrote: >>> * tree-ssa-sccvn.c

[committed] jit: implement gcc_jit_function_get_address

On Fri, 2017-09-22 at 11:21 +0200, Bartosz Szreder wrote: > Hello David, > > > > 1. The documentation doesn't mention existence of > > > gcc_jit_context_new_function_ptr_type() as a mechanism of > > > handling > > > function pointers, yet contains > > > gcc_jit_context_new_call_through_ptr(). > >

Re: [PATCH][mingw] Enable colorized diagnostics

On 09/27/2017 08:54 PM, Liu Hao wrote: > On 2017/9/28 4:09, Joseph Myers wrote: >> On Thu, 28 Sep 2017, Liu Hao wrote: >> >>> Colorized diagnostics used to be disabled for MinGW targets (on which >>> the macro `_WIN32` is defined), and this patch enables it. >> >> I'd hope this is all to do with

Re: [PATCH] Enhance PHI processing in VN

David Edelsohn writes: > On Fri, Sep 15, 2017 at 2:53 AM, Richard Biener wrote: >> On Thu, 14 Sep 2017, David Edelsohn wrote: >> >>> * tree-ssa-sccvn.c (visit_phi): Merge undefined values similar >>> to VN_TOP. >>> >>> This seems to have regressed >>> >>>

[PATCH], Define __FP_FAST_FMAF128 on PowerPC ISA 3.0

The glibc team has requested we define the standard macro (__FP_FAST_FMAF128) for PowerPC code when we have the IEEE 128-bit floating point hardware instructions enabled. This patch does this in the PowerPC backend. As I look at the whole issue, at some point we should do this more in the

Re: [PATCH][mingw] Enable colorized diagnostics

On 2017/9/28 4:09, Joseph Myers wrote: On Thu, 28 Sep 2017, Liu Hao wrote: Colorized diagnostics used to be disabled for MinGW targets (on which the macro `_WIN32` is defined), and this patch enables it. I'd hope this is all to do with MinGW host, and nothing to do with the target. Oh you

Make tests failing with version namespace UNSUPPORTED

Hi     I would like to propose to add a new dg-require-normal-namespace attribute to make several tests failing when version namespace is active UNSUPPORTED. It is like dg-require-normal-mode but also consider when version namespace is being used.     I still need to complete execution of

Re: [Patch][aarch64] Use IFUNCs to enable LSE instructions in libatomic on aarch64

Ping. Steve Ellcey sell...@cavium.com On Thu, 2017-08-31 at 10:24 -0700, Steve Ellcey wrote: > On Tue, 2017-08-29 at 12:25 +0100, Szabolcs Nagy wrote: > > > >   > > in glibc the hwcap is not used, because it has accesses to > > cached dispatch info, but in libatomic using the hwcap > > argument

Make tests less istreambuf_iterator implementation dependent

Hi     I just committed attached patch as trivial.     Those tests were highly istreambuf_iterator implementation, it is the result of the call to money_get<>::get which is pointing immediately beyond the last character recognized to quote Standard words. 2017-09-27  François Dumont 

Re: [PATCH][mingw] Enable colorized diagnostics

On Thu, 28 Sep 2017, Liu Hao wrote: > Colorized diagnostics used to be disabled for MinGW targets (on which > the macro `_WIN32` is defined), and this patch enables it. I'd hope this is all to do with MinGW host, and nothing to do with the target. -- Joseph S. Myers jos...@codesourcery.com

[PATCH] Fix fortran/81509

The attached patch fixes PR fortran/81509. In short, F2008 now allows boz-literal-constants in IAND, IOR, IEOR, DSHIFTL, DSHIFTR, and MERGE_BITS. gfortran currently allows BOZ argument, but she was not enforcing restrictions in F2008. The attach patch causes gfortran to conform to F2008. As

[PATCH] Fix PR82337 (SLSR and abnormal PHIs)

Hi, https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82337 reports a problem with SLSR performing an invalid optimization across an abnormal PHI. This is easy to avoid by ensuring that SSA names used in an abnormal PHI never appear as a basis or as a PHI basis in the candidate table. We won't

Re: [AArch64], patch] PR71727 fix -mstrict-align

On Wed, Sep 27, 2017 at 06:25:56PM +0100, Christophe Lyon wrote: > ping? OK, thanks. Reviewed-by: James Greenhalgh James > > On 20 September 2017 at 15:17, Christophe Lyon > wrote: > > Hi, > > > > On 11 September 2017 at 10:45, Andrew

[PATCH][mingw] Enable colorized diagnostics

Hello, (I don't have SVN write access. So please apply this patch if you think it is OK. I have got FSF's copyright assignment paper for GCC. I will send you a copy of it when required.) Colorized diagnostics used to be disabled for MinGW targets (on which the macro `_WIN32` is defined), and

Re: [PATCH][AArch64] Add BIC-imm and ORR-imm SIMD pattern

Hi James I have made the requested changes to the patch. 2017-09-27 Sudakshina Das * config/aarch64/aarch64-protos.h (enum simd_immediate_check): New check type for aarch64_simd_valid_immediate. (aarch64_output_simd_mov_immediate): Update

[PATCH, rs6000] Correct some Power9 scheduling info

The following patch corrects some Power9 resource requirements and instruction latencies. Bootstrap/regtest on powerpc64le-linux with no new regressions. Ok for trunk? -Pat 2017-09-27 Pat Haugen * config/rs6000/power9.md (DU_C2_3_power9): Remove an incorrect

Go patch committed: fix crash on struct that embeds pointer type

This patch by Than McIntosh fixes a crash in the Go frontend that incorrectly embeds a pointer type. This fixes https://golang.org/issue/22050. Bootstrapped and ran Go testsuite on x86_64-pc-linux-gnu. Committed to mainline. Ian Index: gcc/go/gofrontend/MERGE

Re: [PATCH 4/5] New target check: vect_nopeel - v2

On 09/27/2017 03:05 AM, Rainer Orth wrote: Hi Andreas, On 09/27/2017 10:10 AM, Rainer Orth wrote: Hi Andreas, On 09/26/2017 02:26 PM, Rainer Orth wrote: Hi Andreas, diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi index 307c726..3acfd85 100644 ---

Re: [AArch64], patch] PR71727 fix -mstrict-align

ping? On 20 September 2017 at 15:17, Christophe Lyon wrote: > Hi, > > On 11 September 2017 at 10:45, Andrew Pinski wrote: >> On Tue, Jul 18, 2017 at 5:50 AM, Christophe Lyon >> wrote: >>> Hello, >>> >>> I've received a

Re: 0005-Part-5.-Add-x86-CET-documentation

On Wed, 27 Sep 2017, Florian Weimer wrote: > This is part of the ABI GCC implements, so it has to be documented somewhere, > and not just as part of the GCC source code. > > CET is not properly described in the ABI supplement and I don't think this > will change, so detailed documentation in the

Re: 0005-Part-5.-Add-x86-CET-documentation

On 09/27/2017 02:52 AM, Florian Weimer wrote: On 09/27/2017 05:40 AM, Sandra Loosemore wrote: +@emph{x86 implementation:} when @option{-fcf-protection} option is +specified the compiler inserts an ENDBR instruction at function's +prologue if the function's type does not have the

Re: correct attribute ifunc C++ type safety (PR 82301)

Hi Nathan, This patch is a tweak for the C++ part of the type safety enhancement to attribute ifunc committed in r253041. It touches the C++ ifunc tests you added some years ago and I recently broke with the initial commits of the feature. The notable difference between r253041 and this update

RE: 0005-Part-5.-Add-x86-CET-documentation

Updated version #3. > -Original Message- > From: Sandra Loosemore [mailto:san...@codesourcery.com] > Sent: Wednesday, September 27, 2017 5:41 AM > To: Tsimbalist, Igor V ; Uros Bizjak > > Cc: gcc-patches@gcc.gnu.org > Subject: Re:

Re: [C++ PATCH] C++2A P0386R1 - default member initializers for bit-fields

Jakub, The following patch implements P0386R1 - NSDMIs for bit-fields. While working on that, I've discovered our parser mishandles attributes on bitfields, already C++11 says: identifier[opt] attribute-specifier-seq[opt] : constant-expression in the grammar, but we actually parsed

Re: [PATCH][GRAPHITE] More TLC

On Wed, 27 Sep 2017, Richard Biener wrote: > On Wed, 27 Sep 2017, Richard Biener wrote: > > > On Tue, 26 Sep 2017, Sebastian Pop wrote: > > > > > On Mon, Sep 25, 2017 at 8:12 AM, Richard Biener wrote: > > > > > > > On Fri, 22 Sep 2017, Sebastian Pop wrote: > > > > > > > > >

libgo patch committed: Check Getsockname error return

This patch by Tony Reix checks for errors from Getsockname in a couple of places. Bootstrapped and ran Go testsuite on x86_64-pc-linux-gnu. Committed to mainline. Ian Index: gcc/go/gofrontend/MERGE === --- gcc/go/gofrontend/MERGE

Re: [PATCH] Pretty-print GOACC_REDUCTION arguments

Hi! On Mon, 25 Sep 2017 16:57:52 +0200, Tom de Vries wrote: > currently for a GOACC_REDUCTION internal fn call we print: > ... >sum_5 = GOACC_REDUCTION (SETUP, _3, 0, 0, 67, 0); > ... > > This patch adds a comment for some arguments explaining the meaning of > the

[PATCH] For -Os change movabsq $(imm32 << shift), %rX[xip] to movl $imm2, %eX[xip]; shl $shift, %rX[xip] (PR target/82339)

Hi! Doing a movl + shlq by constant seems to be 1 byte shorter than movabsq, so this patch attempts to use the former form unless flags is live. Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk? Performance-wise, not really sure what is a win (on i7-5960X on the testcase in

Re: [PATCH] Don't optimize away lhs from calls with addressable zero sized return type (PR c++/82159)

On Wed, 27 Sep 2017, Jakub Jelinek wrote: > Hi! > > The expansion relies on lhs being kept for calls that return addressable > types. On the following testcase (which is a GNU extension, pedantically > we error out on zero sized arrays) we return TREE_ADDRESSABLE > zero_sized_type and optimize

[PATCH] Don't optimize away lhs from calls with addressable zero sized return type (PR c++/82159)

Hi! The expansion relies on lhs being kept for calls that return addressable types. On the following testcase (which is a GNU extension, pedantically we error out on zero sized arrays) we return TREE_ADDRESSABLE zero_sized_type and optimize away the lhs which we need later on. Fixed thusly,

Re: [PATCH][GRAPHITE] More TLC

On Wed, 27 Sep 2017, Richard Biener wrote: > On Tue, 26 Sep 2017, Sebastian Pop wrote: > > > On Mon, Sep 25, 2017 at 8:12 AM, Richard Biener wrote: > > > > > On Fri, 22 Sep 2017, Sebastian Pop wrote: > > > > > > > On Fri, Sep 22, 2017 at 8:03 AM, Richard Biener

[openacc, testsuite, committed] Fix libgomp.oacc-c-c++-common/parallel-reduction.c for non-nvidia devices

Hi, this patch makes the test-case libgomp.oacc-c-c++-common/parallel-reduction.c work for non-nvidia devices. Committed as obvious. Thanks, - Tom Fix libgomp.oacc-c-c++-common/parallel-reduction.c for non-nvidia devices 2017-09-27 Tom de Vries *

RE: 0002-Part-2.-Document-finstrument-control-flow-and-notrack attribute

Updated version #4. > -Original Message- > From: Sandra Loosemore [mailto:san...@codesourcery.com] > Sent: Wednesday, September 27, 2017 5:11 AM > To: Tsimbalist, Igor V ; 'gcc- > patc...@gcc.gnu.org' > Cc: Jeff Law

[PATCH][GRAPHITE] Make --param loop-block-tile-size=0 disable tiling

Currently ISL aborts on this special value and for debugging (and tuning?) it's nice to avoid all the clutter introduced by tiling. Committed as obvious. Richard. 2017-09-27 Richard Biener * graphite-optimize-isl.c (get_schedule_for_node_st): Allow

Re: [PATCH][GRAPHITE] More TLC

On Tue, 26 Sep 2017, Sebastian Pop wrote: > On Mon, Sep 25, 2017 at 8:12 AM, Richard Biener wrote: > > > On Fri, 22 Sep 2017, Sebastian Pop wrote: > > > > > On Fri, Sep 22, 2017 at 8:03 AM, Richard Biener > > wrote: > > > > > > > > > > > This simplifies

RE: 0005-Part-5.-Add-x86-CET-documentation

> -Original Message- > From: Florian Weimer [mailto:fwei...@redhat.com] > Sent: Wednesday, September 27, 2017 10:52 AM > To: Sandra Loosemore ; Tsimbalist, Igor V > ; Uros Bizjak > Cc: gcc-patches@gcc.gnu.org >

[PATCH][GRAPHITE] Allow --param graphite-max-arrays-per-scop=0

The following is to allow making --param graphite-max-arrays-per-scop unbounded. That's a little tricky because the bound is used when computing "alias-sets" for scalar constraints. There's an easy way out though as we know the maximum alias-set assigned in the SCOP, we only have to remember

[PATCH][GRAPHITE] Remove another small quadraticness

Turns out loop_nest recorded in scop-info isn't really necessary as we can simply process parameters in loop bounds during the gather_bbs walk where we encounter each loop (identified by its header) once. This avoids the linear search in record_loop_in_sese. Bootstrap / regtest running on

[PATCH][GRAPHITE] Speedup SCOP detection some more, add region handling to domwalk

This removes another quadraticness from SCOP detection, gather_bbs domwalk. This is done by enhancing domwalk to handle SEME regions via a special return value from before_dom_children. With this I'm now confident to remove the PARAM_GRAPHITE_MAX_BBS_PER_FUNCTION parameter and its associated

Re: [AArch64] PR71307: Define union class of POINTER+FP

On 18/09/17 17:39, Richard Sandiford wrote: > ALL_REGS doesn't function as a union class of POINTER_REGS and FP_REGS > since it includes the CC register as well. REGNO_REG_CLASS (CC_REGNUM) > is NO_REGS, but of course NO_REGS rightly doesn't include CC_REGNUM. > > Adding a union class for

Re: [PATCH] [testsuite, ARM] Backport to GCC 7 branch

On 21/09/17 09:32, Christophe Lyon wrote: > Hi, > > Can I backport my patch r249639 (Add -mfloat-abi=hard to arm_neon_ok) > to the gcc-7 branch ? > It fixes a few false failures. > > It applies cleanly to current trunk, and we have had it in our > linaro-7-branch for a while. > OK. R. >

C++ patch ping

Hi! I'd like to ping 2 C++2A patches: http://gcc.gnu.org/ml/gcc-patches/2017-09/msg01235.html P0683R1 - default member initializers for bit-fields http://gcc.gnu.org/ml/gcc-patches/2017-09/msg01237.html P0704R1 - fixing const-qualified pointers to members Thanks Jakub

Re: [GCC][PATCH][testsuite][mid-end] Fix failing slp test on aarch64 and arm.

On 26/09/17 14:12, Tamar Christina wrote: > Hi All, > > The slp vectorization test currently fails on AArch32 and AArch64 > due to it not taking into account that we do have 128 bit vectors in > NEON. This means that two of the loops get vectorized instead of just 1. > > So update the conditions

Re: [PATCH], Improve moving SFmode to GPR on PowerPC, #7 of 8

On Tue, Sep 26, 2017 at 06:37:17PM -0400, Michael Meissner wrote: > On Tue, Sep 26, 2017 at 04:56:54PM -0500, Segher Boessenkool wrote: > > On Tue, Sep 26, 2017 at 10:48:29AM -0400, Michael Meissner wrote: > > > * config/rs6000/vsx.md (peephole for optimizing move SF to GPR): > > > Adjust code

Re: [PATCH 4/5] New target check: vect_nopeel - v2

Hi Andreas, > On 09/27/2017 10:10 AM, Rainer Orth wrote: >> Hi Andreas, >> >>> On 09/26/2017 02:26 PM, Rainer Orth wrote: Hi Andreas, > diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi > index 307c726..3acfd85 100644 > --- a/gcc/doc/sourcebuild.texi >

Re: 0005-Part-5.-Add-x86-CET-documentation

On 09/27/2017 05:40 AM, Sandra Loosemore wrote: +@emph{x86 implementation:} when @option{-fcf-protection} option is +specified the compiler inserts an ENDBR instruction at function's +prologue if the function's type does not have the @code{nocf_check} +attribute and addresses to which indirect

Re: [patch, fortran] Warn about out-of-bounds access with DO subscripts

Hi! On Tue, 26 Sep 2017 18:51:52 +0200, Thomas Koenig wrote: > > On Mon, 25 Sep 2017 18:50:49 +0200, Thomas Koenig > > wrote: > >> Thanks for the review, committed as r253156. > >> > >> Now, on to some other bugs... > > > > No, back to this one

Re: [PATCH 4/5] New target check: vect_nopeel - v2

On 09/27/2017 10:10 AM, Rainer Orth wrote: > Hi Andreas, > >> On 09/26/2017 02:26 PM, Rainer Orth wrote: >>> Hi Andreas, >>> diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi index 307c726..3acfd85 100644 --- a/gcc/doc/sourcebuild.texi +++

Re: [PR middle-end/82319] Fix ICE in pattern

On Wed, Sep 27, 2017 at 12:56 AM, Richard Biener wrote: > On Tue, 26 Sep 2017, Andrew Pinski wrote: > >> On Tue, Sep 26, 2017 at 10:56 PM, Yuri Gribov wrote: >> > Hi all, >> > >> > This patch fixes a trivial ICE in recent pattern. Bootstrapped and >> >

Re: [PATCH 4/5] New target check: vect_nopeel - v2

Hi Andreas, > On 09/26/2017 02:26 PM, Rainer Orth wrote: >> Hi Andreas, >> >>> diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi >>> index 307c726..3acfd85 100644 >>> --- a/gcc/doc/sourcebuild.texi >>> +++ b/gcc/doc/sourcebuild.texi >>> @@ -1398,6 +1398,9 @@ Target supports a

Re: [PR middle-end/82319] Fix ICE in pattern

On Tue, 26 Sep 2017, Andrew Pinski wrote: > On Tue, Sep 26, 2017 at 10:56 PM, Yuri Gribov wrote: > > Hi all, > > > > This patch fixes a trivial ICE in recent pattern. Bootstrapped and > > regtested on x86_64. > > > > Ok to commit? Ok. > >+ bool cst_int_p = ! real_isnan

Re: [PATCH][GRAPHITE] Simplify SCOP detection

On Tue, 26 Sep 2017, Sebastian Pop wrote: > On Tue, Sep 26, 2017 at 7:03 AM, Richard Biener wrote: > > > > > The following is the result of me trying to understand SCOP detection > > and the validity checks spread around the machinery. It removes several > > quadraticnesses

Re: [PATCH 4/5] New target check: vect_nopeel - v2

On 09/26/2017 02:26 PM, Rainer Orth wrote: > Hi Andreas, > >> diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi >> index 307c726..3acfd85 100644 >> --- a/gcc/doc/sourcebuild.texi >> +++ b/gcc/doc/sourcebuild.texi >> @@ -1398,6 +1398,9 @@ Target supports a vector misalign access. >>

Re: [PR middle-end/82319] Fix ICE in pattern

On Tue, Sep 26, 2017 at 10:56 PM, Yuri Gribov wrote: > Hi all, > > This patch fixes a trivial ICE in recent pattern. Bootstrapped and > regtested on x86_64. > > Ok to commit? >+ bool cst_int_p = ! real_isnan (cst) && real_identical (, cst); The GCC coding style says no