On Aug 24, 2019, Uros Bizjak wrote:
> Can __attribute__ ((mode (__word__))) be used here?
Oh, nice, yes, thanks!
> Otherwise OK.
Here's what I'm installing.
for gcc/testsuite/ChangeLog
* gcc.target/i386/20020616-1.c: Preserve full register across
main.
---
On Mon, Sep 2, 2019 at 6:23 PM Richard Biener
wrote:
>
> On Mon, Sep 2, 2019 at 10:13 AM Hongtao Liu wrote:
> >
> > > which is not the case with core_cost (and similar with skylake_cost):
> > >
> > > 2, 2, 4,/* cost of moving XMM,YMM,ZMM register */
> > > {6, 6, 6, 6, 12},
On 02/09/19 22:19 +0200, Ulrich Weigand wrote:
[RFA][3/3] Remove Cell Broadband Engine SPU targets: libstdc++
Remove all references to spu from the libstdc++ directory.
Note that libstdc++ currently consideres "__ea" a reserved word
(because it was for the SPU target), and therefore
Hello,
on s390x the 128-bit integer type is only aligned to 8 bytes by default,
but when lock-free atomic operations can only be performed on objects
aligned to 16 bytes. However, we've noticed that GCC sometimes falls
back to library calls *even if* the object is actually 16 byte aligned,
and
[RFA][3/3] Remove Cell Broadband Engine SPU targets: libstdc++
Remove all references to spu from the libstdc++ directory.
Note that libstdc++ currently consideres "__ea" a reserved word
(because it was for the SPU target), and therefore specifically
avoids using it in
[RFA][2/3] Remove Cell Broadband Engine SPU targets: testsuite
Remove all references to spu from the testsuite directory.
Tested on s390x-ibm-linux.
OK for mainline?
(Deleted directories omitted from patch.)
Bye,
Ulrich
gcc/testsuite/ChangeLog:
* lib/compat.exp: Remove references
Hello,
as announced here: https://gcc.gnu.org/ml/gcc/2019-04/msg00023.html
we have declared the spu-elf target obsolete in GCC 9 with the goal
of removing support in GCC 10. Nobody has stepped up to take over
maintainership of the target.
This patch set therefore removes this target and all
On Mon, 2 Sep 2019 at 18:12, Richard Sandiford
wrote:
>
> Sorry for the slow reply.
>
> Christophe Lyon writes:
> > On 16/07/2019 13:58, Richard Sandiford wrote:
> >> Christophe Lyon writes:
> >>> +(define_insn "*restore_pic_register_after_call"
> >>> + [(parallel [(unspec [(match_operand:SI 0
On Thu, Aug 22, 2019 at 12:03:33PM +0100, Kyrill Tkachov wrote:
> Hi Dennis,
>
> On 8/21/19 10:27 AM, Dennis Zhang wrote:
> > Hi all,
> >
> > This patch adds '-mcpu' options for following CPUs:
> > Cortex-A77, Cortex-A76AE, Cortex-A65, Cortex-A65AE, and Cortex-A34.
> >
> > Related specifications
Hello,
This patch introduces an optimization for narrowing binary and builtin
math operations to the smallest type when unsafe math optimizations are
enabled (typically -Ofast or -ffast-math).
Consider the example:
float f (float x) {
return 1.0 / sqrt (x);
}
f:
fcvt
On Fri, Aug 23, 2019 at 05:42:30PM +0100, Kyrill Tkachov wrote:
> Hi all,
>
> This patch adds feature strings for some of the extensions. This string
> is what is read from /proc/cpuinfo on Linux systems
> and used during -march=native detection.
>
> The strings are taken from the kernel source
On Mon, Sep 02, 2019 at 01:16:32PM +0100, Kyrill Tkachov wrote:
> Hi all,
>
> This patch implements the __jcvt ACLE intrinsic [1] that maps down to
> the FJCVTZS [2] instruction from Armv8.3-a.
> No fancy mode iterators or nothing. Just a single builtin, UNSPEC and
> define_insn and the
On Mon, 2 Sep 2019, Tejas Joshi wrote:
> Hello.
> Should a result like 1.4 be considered as inexact if truncating
> (narrowing?) from double to float? (due to loss of trailing bits)
If the mathematical result of the arithmetic operation is literally the
decimal number 1.4, as opposed to the
> Am 02.09.2019 um 12:37 schrieb Richard Biener :
>
> On Fri, Aug 30, 2019 at 5:25 PM Ilya Leoshkevich wrote:
>>
>>> Am 30.08.2019 um 16:40 schrieb Ilya Leoshkevich :
>>>
Am 30.08.2019 um 09:12 schrieb Richard Biener :
On Thu, Aug 29, 2019 at 5:39 PM Ilya Leoshkevich
Sorry for the slow reply.
Christophe Lyon writes:
> On 16/07/2019 13:58, Richard Sandiford wrote:
>> Christophe Lyon writes:
>>> +(define_insn "*restore_pic_register_after_call"
>>> + [(parallel [(unspec [(match_operand:SI 0 "s_register_operand" "=r,r")
>>> + (match_operand:SI
On 02.09.19 16:46, Ilya Leoshkevich wrote:
> Bootstrap and regtest running on s390x-redhat-linux.
>
> The new sigfpe-eh.c fails with
>
> internal compiler error: RTL check: expected elt 0 type 'e' or 'u', have
> 'w' (rtx const_int)
>
> This is most likely due to a typo: XEXP (*op1, 0) was
Bootstrap and regtest running on s390x-redhat-linux.
The new sigfpe-eh.c fails with
internal compiler error: RTL check: expected elt 0 type 'e' or 'u', have
'w' (rtx const_int)
This is most likely due to a typo: XEXP (*op1, 0) was used, when
XEXP (*op1, 0) was intended. This did not cause
Hi Shaokun
On 8/31/19 8:12 AM, Shaokun Zhang wrote:
The DCache clean & ICache invalidation requirements for instructions
to be data coherence are discoverable through new fields in CTR_EL0.
Let's support the two bits if they are enabled, the CPU core will
not execute the unnecessary DCache
Hi,
all should be more or less straightforward. I also propose to use an
additional range for that error message about constinit && constexpr
mentioned to Marek a few days ago. Tested x86_64-linux.
Thanks, Paolo.
/
/cp
2019-09-02 Paolo Carlini
* decl.c
Hi Shaokun,
On 8/31/19 8:12 AM, Shaokun Zhang wrote:
The DCache clean & ICache invalidation requirements for instructions
to be data coherence are discoverable through new fields in CTR_EL0.
Let's support the two bits if they are enabled, the CPU core will
not execute the unnecessary DCache
Richard Biener writes:
> This disables postreload GCSE the same way we disable GCSE/cprop.
> On the PR36262 testcase this removes
>
> load CSE after reload : 129.00 ( 72%) 0.08 ( 5%) 130.50 (
> 72%) 6 kB ( 0%)
>
> With a smaller testcase both PRE and postreload GCSE still
On Mon, 2 Sep 2019, Bernd Edlinger wrote:
> On 9/2/19 9:50 AM, Richard Biener wrote:
> > On Sun, 1 Sep 2019, Bernd Edlinger wrote:
> >
> >> Hi,
> >>
> >> this fixes an oversight in r274986.
> >> We need to avoid using movmisalign on DECL_P which are not in memory,
> >> similar to the
On 9/2/19 9:50 AM, Richard Biener wrote:
> On Sun, 1 Sep 2019, Bernd Edlinger wrote:
>
>> Hi,
>>
>> this fixes an oversight in r274986.
>> We need to avoid using movmisalign on DECL_P which are not in memory,
>> similar to the !mem_ref_refers_to_non_mem_p which unfortunately can't
>> handle
On Mon, Sep 02, 2019 at 01:29:24AM -0700, Andrew Pinski wrote:
> Seems like this would fix PR91632 also.
> Which has a C testcase included.
Indeed, I've committed the following after testing it with the
patch reverted as well as with current trunk where it doesn't FAIL anymore.
2019-09-02 Jakub
This disables postreload GCSE the same way we disable GCSE/cprop.
On the PR36262 testcase this removes
load CSE after reload : 129.00 ( 72%) 0.08 ( 5%) 130.50 (
72%) 6 kB ( 0%)
With a smaller testcase both PRE and postreload GCSE still run
and GCSE shows itself roughly
Hi Jakub,
> Your mailer sadly made the patch not applicable, I had to spent quite a long
> time to just undo the undesirable line breaking. Please fix your mailer not
> to break lines automatically, or at least send patches as attachments on
> which hopefully it will not do that on.
Sorry for
On 9/2/19 1:16 PM, Kyrill Tkachov wrote:
Hi all,
This patch implements the ACLE intrinsics to access the
FRINT[32,64][Z,X] scalar[1] and vector[2][3] instructions
from Armv8.5-a. These are enabled when the __ARM_FEATURE_FRINT macro is
defined.
They're added in a fairly standard way through
On Mon, Aug 26, 2019 at 01:08:39AM +0900, Ray Kim wrote:
> This patch implemented work-stealing task scheduling for GSoC'19 final
> evaluations.
> Currently there are some issues that needs to be further addressed,
> however I think it is functional.
>
> This that could be improved are as
Hi all,
This patch implements the __jcvt ACLE intrinsic [1] that maps down to
the FJCVTZS [2] instruction from Armv8.3-a.
No fancy mode iterators or nothing. Just a single builtin, UNSPEC and
define_insn and the associate plumbing.
This patch also defines __ARM_FEATURE_JCVT to indicate when
Hi all,
This patch implements the ACLE intrinsics to access the
FRINT[32,64][Z,X] scalar[1] and vector[2][3] instructions
from Armv8.5-a. These are enabled when the __ARM_FEATURE_FRINT macro is
defined.
They're added in a fairly standard way through builtins and unspecs at
the RTL level.
ping
Currently the Arm backend selects the alternative sched pressure algorithm.
The issue is that this doesn't take register pressure into account, and so
it causes significant additional spilling on Arm where there are only 14
allocatable registers. SPEC2006 shows significant
ping
In aarch64_classify_symbol symbols are allowed full-range offsets on
relocations.
This means the offset can use all of the +/-4GB offset, leaving no offset
available
for the symbol itself. This results in relocation overflow and link-time
errors
for simple
On 9/2/19 1:08 PM, Alexander Monakov wrote:
> On Mon, 2 Sep 2019, Martin Liška wrote:
>
>>> If that's the case, we should look into overriding 'tabstop' for all files
>>> in
>>> the gcc tree, including .md files, not just .pd and C/C++ files, right?
>>
>> Can be done but we don't have any 'au
Hello.
Should a result like 1.4 be considered as inexact if truncating
(narrowing?) from double to float? (due to loss of trailing bits)
Comments of real_arithmetic says that it returns TRUE if the result is
inexact. There's another function, exact_real_truncate which returns
TRUE if truncation is
Now that Marek has implemented constinit (and made it available
pre-C++20 as __constinit) we can use it to enforce constant init for
the globals in src/c++17/memory_resource.cc
Tested x86_64-linux, committed to trunk.
commit 0956a4644f960ad4d537e901d64ec69186ed46b4
Author: redi
Date: Mon Sep
On 01/09/19 20:42 +0800, Gerald Pfeifer wrote:
microsoft.com redirects the existing link and changed the title of
the document; this adjust both.
Committed.
Jonathan(?), if you could regenerate the libstdc++ online docs, that
would be nice.
Done as part of r275314.
On 29/08/19 13:16 +0100, Jonathan Wakely wrote:
PR libstdc++/91067
* acinclude.m4 (libtool_VERSION): Bump to 6:28:0.
* configure: Regenerate.
* config/abi/pre/gnu.ver (GLIBCXX_3.4.28): Add new version. Export
missing symbols.
*
On 30/08/19 17:08 +0100, Jonathan Wakely wrote:
On 30/08/19 17:01 +0100, Jonathan Wakely wrote:
On 30/08/19 17:27 +0300, Antony Polukhin wrote:
Bunch of micro optimizations for std::to_chars:
* For base == 8 replacing the lookup in __digits table with arithmetic
computations leads to a same
On Mon, Aug 26, 2019 at 02:58:46PM +0900, Ray Kim wrote:
> Fixed typos, lowered memory constraints where appropriate.
Your mailer sadly made the patch not applicable, I had to spent quite a long
time to just undo the undesirable line breaking. Please fix your mailer not
to break lines
On Mon, 2 Sep 2019, Martin Liška wrote:
> > If that's the case, we should look into overriding 'tabstop' for all files
> > in
> > the gcc tree, including .md files, not just .pd and C/C++ files, right?
>
> Can be done but we don't have any 'au BufRead *.md' rule right now.
The solution I had
On Fri, Aug 30, 2019 at 5:25 PM Ilya Leoshkevich wrote:
>
> > Am 30.08.2019 um 16:40 schrieb Ilya Leoshkevich :
> >
> >> Am 30.08.2019 um 09:12 schrieb Richard Biener :
> >>
> >> On Thu, Aug 29, 2019 at 5:39 PM Ilya Leoshkevich
> >> wrote:
> >>>
> Am 22.08.2019 um 15:45 schrieb Ilya
On 9/2/19 11:56 AM, Alexander Monakov wrote:
> On Mon, 2 Sep 2019, Martin Liška wrote:
>
>> Yep, I'm going to apply following patch that does it properly for the
>> gcc-match
>> file type.
>
> So just to make sure I understand correctly why you need this:
>
> you use some other value of
On Mon, Sep 2, 2019 at 10:13 AM Hongtao Liu wrote:
>
> > which is not the case with core_cost (and similar with skylake_cost):
> >
> > 2, 2, 4,/* cost of moving XMM,YMM,ZMM register */
> > {6, 6, 6, 6, 12},/* cost of loading SSE registers
> >
The SPARC back-end was aligned on the x86 back-end wrt LTGT so it needs to be
changed too. The patch also changes the wording of the description of the
operator in doc/generic.texi, rtl.def and tree.def.
Tested on SPARC/Solaris, approved by Richard B. and applied on the mainline.
2019-09-02
On Mon, 2 Sep 2019, Martin Liška wrote:
> Yep, I'm going to apply following patch that does it properly for the
> gcc-match
> file type.
So just to make sure I understand correctly why you need this:
you use some other value of 'tabstop' in Vim, and need to reset it back to its
default value
Hi all,
yesterday I've found an interesting bug in libgccjit.
Seems we have an hard limitation of 200 characters for literal strings.
Attempting to create longer strings lead to ICE during pass_expand
while performing a sanity check in get_constant_size.
Tracking down the issue seems the code we
Hi.
There are 2 more patches that I've just tested.
Martin
>From 367c03f190d78f1811715b4158ccff9c9aa08a1a Mon Sep 17 00:00:00 2001
From: marxin
Date: Mon, 2 Sep 2019 07:06:54 +
Subject: [PATCH 1/2] Backport r275291
gcc/ChangeLog:
2019-09-02 Martin Liska
PR gcov-profile/91601
*
On Mon, Sep 2, 2019 at 10:13 AM Hongtao Liu wrote:
>
> > which is not the case with core_cost (and similar with skylake_cost):
> >
> > 2, 2, 4,/* cost of moving XMM,YMM,ZMM register */
> > {6, 6, 6, 6, 12},/* cost of loading SSE registers
> >
On Mon, 2 Sep 2019, Jakub Jelinek wrote:
> On Sun, Sep 01, 2019 at 06:44:15PM +0200, Richard Biener wrote:
> > On September 1, 2019 6:34:25 PM GMT+02:00, Jakub Jelinek
> > wrote:
> > >On Sat, Aug 31, 2019 at 08:25:49PM +0200, Richard Biener wrote:
> > >> So why not always return an unsigned
Christophe Lyon writes:
> diff --git a/gcc/config.gcc b/gcc/config.gcc
> index c7a464c..721729d 100644
> --- a/gcc/config.gcc
> +++ b/gcc/config.gcc
> @@ -1167,7 +1167,7 @@ arm*-*-netbsdelf*)
> tmake_file="${tmake_file} arm/t-arm"
> target_cpu_cname="strongarm"
> ;;
>
On Mon, Sep 2, 2019 at 1:14 AM Jakub Jelinek wrote:
>
> On Sun, Sep 01, 2019 at 06:44:15PM +0200, Richard Biener wrote:
> > On September 1, 2019 6:34:25 PM GMT+02:00, Jakub Jelinek
> > wrote:
> > >On Sat, Aug 31, 2019 at 08:25:49PM +0200, Richard Biener wrote:
> > >> So why not always return an
On Sun, Sep 01, 2019 at 06:44:15PM +0200, Richard Biener wrote:
> On September 1, 2019 6:34:25 PM GMT+02:00, Jakub Jelinek
> wrote:
> >On Sat, Aug 31, 2019 at 08:25:49PM +0200, Richard Biener wrote:
> >> So why not always return an unsigned type then by telling
> >type_for_size?
> >
> >So like
> which is not the case with core_cost (and similar with skylake_cost):
>
> 2, 2, 4,/* cost of moving XMM,YMM,ZMM register */
> {6, 6, 6, 6, 12},/* cost of loading SSE registers
>in 32,64,128,256 and 512-bit */
> {6, 6, 6, 6, 12},
These test changes should have been committed with r275193.
* testsuite/20_util/unique_ptr/assign/48635_neg.cc: Replace dg-error
with dg-prune-output for enable_if failure.
* testsuite/20_util/unique_ptr/cons/cv_qual_neg.cc: Add
dg-prune-output for enable_if
On Fri, 30 Aug 2019 at 16:49, Richard Sandiford
wrote:
>
> Christophe Lyon writes:
> > On Fri, 30 Aug 2019 at 11:00, Richard Sandiford
> > wrote:
> >>
> >> Christophe Lyon writes:
> >> > @@ -785,7 +785,7 @@ case ${target} in
> >> >esac
> >> >tmake_file="t-slibgcc"
> >> >case
On Sun, 1 Sep 2019, Bernd Edlinger wrote:
> Hi,
>
> this fixes an oversight in r274986.
> We need to avoid using movmisalign on DECL_P which are not in memory,
> similar to the !mem_ref_refers_to_non_mem_p which unfortunately can't
> handle DECL_P.
>
But
- && (DECL_P (to) ||
On 8/30/19 2:54 PM, Richard Biener wrote:
> On Fri, Aug 30, 2019 at 2:31 PM Alexander Monakov wrote:
>>
>>
>>
>> On Fri, 30 Aug 2019, Richard Biener wrote:
>>
>>> On Fri, Aug 30, 2019 at 12:58 PM Martin Liška wrote:
Hi.
I would like to add .pd to c_exts so that one
can
On 01/09/19 12:47 +0200, Rainer Orth wrote:
And now the Solaris libstdc++ baseline updates for the gcc-9 branch.
Tested on i386-pc-solaris2.1[01] and sparc-sun-solaris2.1[01]. Ok for
mainline?
OK for gcc-9-branch :-)
Thanks.
On 01/09/19 12:45 +0200, Rainer Orth wrote:
Here's are the updates to the Solaris libstdc++ baselines on mainline.
Tested on i386-pc-solaris2.11 and sparc-sun-solaris2.11. Ok for mainline?
Yes, thanks.
On Sun, Sep 01, 2019 at 09:48:49PM +0200, Uros Bizjak wrote:
> the first try to implement the idea of forcing a subclass (I must
> admit that the patch is a bit of a shot in the dark...).
Yes, keep in mind that rs6000_ira_change_pseudo_allocno_class is a
hack, and one that might only be useful
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