Patch RFA: Emit .cfi_sections after some input code has been seen

This seemingly innocuous change 2019-09-11 Richard Biener * lto-opts.c (lto_write_options): Stream -g when debug is enabled. * lto-wrapper.c (merge_and_complain): Pick up -g. (append_compiler_options): Likewise. (run_gcc): Re-instantiate handling -g0 at link-time. * doc/invoke.texi (flto):

Re: C++ PATCH for c++/91678 - wrong error with decltype and location wrapper

On 9/16/19 1:12 PM, Marek Polacek wrote: On Sun, Sep 15, 2019 at 10:18:29AM -0400, Jason Merrill wrote: On 9/5/19 9:24 PM, Marek Polacek wrote: They use non_lvalue_loc, but that won't create a NON_LVALUE_EXPR wrapper around a location wrapper. That seems like the bug. maybe_lvalue_p should

[PATCH target/87007]Extend rpad to handle AVX512F vcvtusi2ss/vcvtusi2sd

Hi Uros: This patch extend pass rpad to handle AVX512F vcvtusi2ss/vcvtusi2sd. 538.image_r would be improved by 4% with single copy run on skylake workstation. Bootstrap ok. regression test for i386/x86 backend ok. Ok for trunk? Changelog gcc/ * config/i386/i386.md

[PATCH, AArch64 v4 5/6] aarch64: Implement -moutline-atomics

* config/aarch64/aarch64.opt (-moutline-atomics): New. * config/aarch64/aarch64.c (aarch64_atomic_ool_func): New. (aarch64_ool_cas_names, aarch64_ool_swp_names): New. (aarch64_ool_ldadd_names, aarch64_ool_ldset_names): New. (aarch64_ool_ldclr_names,

[PATCH, AArch64 v4 4/6] aarch64: Add out-of-line functions for LSE atomics

This is the libgcc part of the interface -- providing the functions. Rationale is provided at the top of libgcc/config/aarch64/lse.S. * config/aarch64/lse-init.c: New file. * config/aarch64/lse.S: New file. * config/aarch64/t-lse: New file. * config.host: Add t-lse

[PATCH, AArch64 v4 6/6] TESTING: Enable -moutline-atomics by default

--- gcc/common/config/aarch64/aarch64-common.c | 6 -- gcc/config/aarch64/aarch64.c | 6 -- 2 files changed, 8 insertions(+), 4 deletions(-) diff --git a/gcc/common/config/aarch64/aarch64-common.c b/gcc/common/config/aarch64/aarch64-common.c index 07c03253951..2bbf454eea9

[PATCH, AArch64 v4 2/6] aarch64: Implement TImode compare-and-swap

This pattern will only be used with the __sync functions, because we do not yet have a bare TImode atomic load. * config/aarch64/aarch64.c (aarch64_gen_compare_reg): Add support for NE comparison of TImode values. (aarch64_emit_load_exclusive): Add support for TImode.

[PATCH, AArch64 v4 3/6] aarch64: Tidy aarch64_split_compare_and_swap

With aarch64_track_speculation, we had extra code to do exactly what the !strong_zero_p path already did. The rest is reducing code duplication. * config/aarch64/aarch64 (aarch64_split_compare_and_swap): Disable strong_zero_p for aarch64_track_speculation; unify some code paths;

[PATCH, AArch64 v4 1/6] aarch64: Extend %R for integer registers

* config/aarch64/aarch64.c (aarch64_print_operand): Allow integer registers with %R. --- gcc/config/aarch64/aarch64.c | 15 --- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index

[PATCH, AArch64 v4 0/6] LSE atomics out-of-line

Version 3 was back in November: https://gcc.gnu.org/ml/gcc-patches/2018-11/msg00062.html Changes since v3: * Do not swap_commutative_operands_p in aarch64_gen_compare_reg. This is the probable cause of the bootstrap problem that Kyrill reported. * Add unwind markers to the out-of-line

Re: [PATCH] Fix up sqrt(x) < c and sqrt(x) >= c match.pd folding (PR tree-optimization/91734)

On Sat, 14 Sep 2019, Jakub Jelinek wrote: > Hi! > > As mentioned in the PR, the sqrt (x) < c optimization into x < c*c > sometimes breaks the boundary case, if c2=c*c is inexact then in some cases > we need to optimize it into x <= c*c rather than x < c*c. The original And in some cases the

Re: [PATCH, AArch64, v3 0/6] LSE atomics out-of-line

On 9/17/19 6:55 AM, Wilco Dijkstra wrote: > Hi Kyrill, > >>> When you select a CPU the goal is that we optimize and schedule for that >>> specific microarchitecture. That implies using atomics that work best for >>> that core rather than outlining them. >> >> I think we want to go ahead with this

[PATCH target/86811] Mark VAX as not needing speculation barriers

According to Bob Supnik (who is a very authoritative source on VAX), > Funny you should ask. The short answer is no. No VAX ever did > speculative or out of order execution. As such, marking VAX as not needing speculation barriers. PR target/86811 * config/vax/vax.c

libgo patch committed: for libffi, treat direct-iface types as pointers

This libgo patch tweaks the libffi interface to treat direct-iface types as pointers. This only matters on systems that pass a struct with a single pointer field differently than passing a single pointer. I noticed it on 32-bit PPC, where the reflect package TestDirectIfaceMethod failed.

libgo patch committed: Promote integer closure return to full word for libffi

The libffi library expects an integer return type to be promoted to a full word. This patch to libgo implements that when returning from a closure written in Go. This only matters on big-endian systems when returning an integer smaller than the pointer size, which is why we didn't notice it

Re: [wwwdocs] gcc-10/changes.html - Document new ARM FDPIC ABI support

On Tue, 17 Sep 2019 at 17:54, Kyrill Tkachov wrote: > > > On 9/17/19 4:52 PM, Christophe Lyon wrote: > > On Tue, 17 Sep 2019 at 17:40, Kyrill Tkachov > wrote: > > > > Hi Christophe, > > > > On 9/17/19 4:38 PM, Christophe Lyon wrote: > > > > Hi, > > > > As Kyrill suggested, here is a patch to

Re: Avoid adding impossible copies in ira-conflicts.c:process_reg_shuffles

On 9/17/19 6:50 PM, Richard Sandiford wrote: [ ... ] This patch tries to avoid the problem by not adding register shuffle copies if there appears to be no chance that the two operands could be allocated to the same register. The table below summarises the tests that had more or fewer

libgo patch committed: Unexport FFICallbackGo; use go:linkname instead

The libgo function was always intended to be internal-only, but was exported so that C code could call it. Now that have go:linkname for that, use it. Bootstrapped and ran Go testsuite on x86_64-pc-linux-gnu. Committed to mainline. Ian Index: gcc/go/gofrontend/MERGE

[PATCH] [og9] OpenACC profiling-interface fixes for asynchronous operations

This patch fixes some problems with the OpenACC profiling interface when used with asynchronous offload operations. Essentially, the profiling operations themselves must be launched asynchronously, otherwise they will measure the wrong thing, and/or execute at the same time as the operation they

[PATCH] [og9] Fix OpenACC "ephemeral" asynchronous host-to-device copies

This patch fixes an issue with back-to-back asynchronous compute regions working on the same data with intervening copyout/copyins. For such regions, there was a likelihood that asynchronous "copyin" operations on the second region would take place before the copyout from the first region had

[PATCH] [og9] Update expected messages, errors and warnings for "kernels" tests

This patch updates some expected message/warning/error output in OpenACC tests, mostly those testing "kernels" functionality. I will apply to the openacc-gcc-9-branch shortly. Julian ChangeLog gcc/testsuite/ * c-c++-common/goacc/classify-kernels-unparallelized.c: Update

[PATCH] [og9] Fix uninitialised read in gomp_map_vars_internal

This patch fixes a stray read of uninitialised data in target.c:gomp_map_vars_internal that I noticed when running an unrelated test under valgrind. I will apply to the openacc-gcc-9-branch shortly. Julian ChangeLog libgomp/ * target.c (gomp_map_vars_internal): Remove read of

[PATCH] [og9] A couple of GCN-specific test fixes

This patch provides a couple of AMD GCN-specific fixes for a few OpenACC offloading tests in libgomp. I will apply to the openacc-gcc-9-branch shortly. Julian ChangeLog libgomp/ * testsuite/libgomp.oacc-c-c++-common/async_queue-1.c: Only run NVidia-specific test on

Re: [PATCH][ARM] Enable code hoisting with -Os (PR80155)

Hi Richard, > The issue with the bugzilla is that it lacked appropriate testcase(s) and thus > it is now a mess.  There are clear testcases (maybe not in the benchmarks you Agreed - it's not clear whether any of the proposed changes would actually help the original issue. My patch absolutely

Re: [arm][aarch64] Make no_insn issue to nothing

"Richard Earnshaw (lists)" writes: > On 17/09/2019 15:57, Richard Sandiford wrote: >> no_insn is documented as: >> >>an insn which does not represent an instruction in the final output, >>thus having no impact on scheduling. >> >> and is used in that way by the arm port (e.g. for

Avoid adding impossible copies in ira-conflicts.c:process_reg_shuffles

If an insn requires two operands to be tied, and the input operand dies in the insn, IRA acts as though there were a copy from the input to the output with the same execution frequency as the insn. Allocating the same register to the input and the output then saves the cost of a move. If there

[x86] Tweak testcases for PR82361

gcc/testsuite/gcc.target/i386/pr82361-[12].c check whether we can optimise away a 32-to-64-bit zero extension of a 32-bit division or modulus result. Currently this fails for the modulus part of f1 and f2 in pr82361-1.c: /* FIXME: We are still not able to optimize the modulo in f1/f2, only

Re: [wwwdocs] gcc-10/changes.html - Document new ARM FDPIC ABI support

On 9/17/19 4:52 PM, Christophe Lyon wrote: On Tue, 17 Sep 2019 at 17:40, Kyrill Tkachov wrote: > > Hi Christophe, > > On 9/17/19 4:38 PM, Christophe Lyon wrote: > > Hi, > > As Kyrill suggested, here is a patch to mention the new FDPIC ABI > support for arm. > OK? > > Thanks, > > Christophe >

Re: [wwwdocs] gcc-10/changes.html - Document new ARM FDPIC ABI support

On Tue, 17 Sep 2019 at 17:40, Kyrill Tkachov wrote: > > Hi Christophe, > > On 9/17/19 4:38 PM, Christophe Lyon wrote: > > Hi, > > As Kyrill suggested, here is a patch to mention the new FDPIC ABI > support for arm. > OK? > > Thanks, > > Christophe > > > fdpic-wwwdocs.patch.txt > > Index:

Re: [wwwdocs] gcc-10/changes.html - Document new ARM FDPIC ABI support

On 17/09/2019 16:38, Christophe Lyon wrote: Hi, As Kyrill suggested, here is a patch to mention the new FDPIC ABI support for arm. OK? Thanks, Christophe Support for the FDPIC ABI has been added. It uses 64-bit function descriptors to represent points to functions, and enables

Re: [wwwdocs] gcc-10/changes.html - Document new ARM FDPIC ABI support

Hi Christophe, On 9/17/19 4:38 PM, Christophe Lyon wrote: Hi, As Kyrill suggested, here is a patch to mention the new FDPIC ABI support for arm. OK? Thanks, Christophe fdpic-wwwdocs.patch.txt Index: changes.html === RCS

Re: [arm][aarch64] Handle no_insn in TARGET_SCHED_VARIABLE_ISSUE

On 17/09/2019 15:59, Richard Sandiford wrote: Since no_insn patterns expand to no instructions, they shouldn't count against the issue rate, just like USEs and CLOBBERs don't. Tested on aarch64-linux-gnu and armeab-none-eabi. OK to install? Richard 2019-09-17 Richard Sandiford gcc/

[wwwdocs] gcc-10/changes.html - Document new ARM FDPIC ABI support

Hi, As Kyrill suggested, here is a patch to mention the new FDPIC ABI support for arm. OK? Thanks, Christophe Index: changes.html === RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-10/changes.html,v retrieving revision 1.14 diff -r1.14

Re: [arm][aarch64] Make no_insn issue to nothing

On 17/09/2019 15:57, Richard Sandiford wrote: no_insn is documented as: an insn which does not represent an instruction in the final output, thus having no impact on scheduling. and is used in that way by the arm port (e.g. for define_insns that expand to comments). However, most

Re: [arm] Fix insn type of *thumb1_tablejump

On 17/09/2019 15:53, Richard Sandiford wrote: *thumb1_tablejump had type "no_insn", which doesn't seems to correspond to its documented use: an insn which does not represent an instruction in the final output, thus having no impact on scheduling. Indirect jumps use the same instruction

[arm][aarch64] Handle no_insn in TARGET_SCHED_VARIABLE_ISSUE

Since no_insn patterns expand to no instructions, they shouldn't count against the issue rate, just like USEs and CLOBBERs don't. Tested on aarch64-linux-gnu and armeab-none-eabi. OK to install? Richard 2019-09-17 Richard Sandiford gcc/ * config/aarch64/aarch64.c

[arm][aarch64] Make no_insn issue to nothing

no_insn is documented as: an insn which does not represent an instruction in the final output, thus having no impact on scheduling. and is used in that way by the arm port (e.g. for define_insns that expand to comments). However, most scheduling descriptions instead assigned units to

[arm] Fix insn type of *thumb1_tablejump

*thumb1_tablejump had type "no_insn", which doesn't seems to correspond to its documented use: an insn which does not represent an instruction in the final output, thus having no impact on scheduling. Indirect jumps use the same instruction and have type "branch", so the patch uses "branch"

[C][C++] Allow targets to check calls to BUILT_IN_MD functions

For SVE, we'd like the frontends to check calls to target-specific built-in functions in the same way that they already do for "normal" builtins. This patch adds a target hook for that and extends check_builtin_function_arguments accordingly. A slight complication is that when

Make assemble_real generate canonical CONST_INTs

assemble_real used GEN_INT to create integers directly from the longs returned by real_to_target. assemble_integer then went on to interpret the const_ints as though they had the mode corresponding to the accompanying size parameter: imode = mode_for_size (size * BITS_PER_UNIT, mclass,

Re: Add "fast" conversions from arrays to bitmaps

Martin Liška writes: >> +··static·size_t·size·(const·T·()[N])·{·return·N;·} > > Hello. > > This leads to a clang warning: > > gcc/array-traits.h:45:33: warning: unused parameter 'x' [-Wunused-parameter] > > Can you please fix it? > Thanks, > Martin Sure, done as follows, committed as r275805.

Re: [C++ PATCH 2/4] Fix conversions for built-in operator overloading candidates.

> On 17 Sep 2019, at 15:06, Andreas Schwab wrote: > > This breaks bootstrap on aarch64 (during stage2 build): for the record, also on x86_64-darwin1x (attempting some analysis). Iain > > ../../gcc/expmed.c: In function 'rtx_def* emit_store_flag_1(rtx, rtx_code, > rtx, rtx, machine_mode,

Re: [C++ PATCH 2/4] Fix conversions for built-in operator overloading candidates.

This breaks bootstrap on aarch64 (during stage2 build): ../../gcc/expmed.c: In function 'rtx_def* emit_store_flag_1(rtx, rtx_code, rtx, rtx, machine_mode, int, int, machine_mode)': ../../gcc/expmed.c:5602:19: error: 'int_mode' may be used uninitialized in this function

Re: [PATCH 2/2 V3] Use post-dom info to update if/switch predicate (PR ipa/91089)

> This patch is also OK (modulo the changelog entry and testing). Please > wait with comitting this for bit over a day after commiting the first so > the periodic benchmarks picks each change differently. Understood. Thanks for this. Feng

Re: [PATCH 1/2 V3] Setup predicate for switch default case in IPA (PR ipa/91089)

> Hi, > patch is OK with change below provided that you add a ChangeLog entry > (it is usual to write those into the emails) and that it passes > bootstrap (it is also usual to indicate this). > Do you have rights to the svn repository and copyright assignment done? Yes, I have managed to commit

[PATCH] Fix PR91772

When early debug is missing at LTRANS time we create DIEs using full-blown dwarf2out_decl. In that case it doesn't make sense to try adding a location again, instead that might ICE as seen in the PR. Bootstrapped / tested on x86_64-unknown-linux-gnu, applied to trunk sofar. Richard.

Re: [ARM/FDPIC v6 13/24] [ARM] FDPIC: Force LSB bit for PC in Cortex-M architecture

On 17/09/2019 13:38, Wilco Dijkstra wrote: Hi Christophe, Can you explain this in more detail - it doesn't make sense to me to force the Thumb bit during unwinding since it should already be correct, even on a Thumb-only CPU. Perhaps the kernel code that pushes an incorrect address on the stack

Re: [Question on aarch64] Questions on TLB range instructions on aarch64

Hi Kyrill, On 2019/9/17 19:24, Kyrill Tkachov wrote: > Hi Shaokun, > > On 9/17/19 12:17 PM, Shaokun Zhang wrote: >> Hi aarch64 maintainers, >> >> Sorry to noise you again. >> > No problem :) However, this isn't strictly-speaking a gcc issue because... > > >> We(HiSilicon) next generation CPU

Re: [ARM/FDPIC v6 13/24] [ARM] FDPIC: Force LSB bit for PC in Cortex-M architecture

Hi Christophe, Can you explain this in more detail - it doesn't make sense to me to force the Thumb bit during unwinding since it should already be correct, even on a Thumb-only CPU. Perhaps the kernel code that pushes an incorrect address on the stack could be fixed instead? > Without this,

Re: [Question on aarch64] Questions on TLB range instructions on aarch64

Hi Shaokun, On 9/17/19 12:17 PM, Shaokun Zhang wrote: Hi aarch64 maintainers, Sorry to noise you again. No problem :) However, this isn't strictly-speaking a gcc issue because... We(HiSilicon) next generation CPU core will support "ARMv8.4-TLBI, TLB maintenance and TLB range instructions"

[Question on aarch64] Questions on TLB range instructions on aarch64

Hi aarch64 maintainers, Sorry to noise you again. We(HiSilicon) next generation CPU core will support "ARMv8.4-TLBI, TLB maintenance and TLB range instructions" feature, so I try to compile it that tlbi rvae1is is replaced in linux kernel which is in my local branch, there are some error

Re: [PATCH, AArch64, v3 0/6] LSE atomics out-of-line

Hi Kyrill, >> When you select a CPU the goal is that we optimize and schedule for that >> specific microarchitecture. That implies using atomics that work best for >> that core rather than outlining them. > > I think we want to go ahead with this framework to enable the portable > deployment of

Re: [ARM/FDPIC v6 20/24] [ARM][testsuite] FDPIC: Skip tests using architectures unsupported by FDPIC

Hi Christophe, On 9/16/19 1:31 PM, Christophe Lyon wrote: Hi Kyrill, I didn't commit this patch yet: are you OK with it? Thanks, Christophe On Mon, 9 Sep 2019 at 17:52, Christophe Lyon > wrote: From: Christophe Lyon mailto:christophe.l...@linaro.org>>

Re: [PATCH, AArch64, v3 0/6] LSE atomics out-of-line

On 9/16/19 12:58 PM, Wilco Dijkstra wrote: Hi Richard, >> So what is the behaviour when you explicitly select a specific CPU? > > Selecting a specific cpu selects the specific architecture that the cpu > supports, does it not?  Thus the architecture example above still applies. > > Unless I

[Ada] Missing propagation of Has_Predicates in cloned subtypes

The frontend silently skips propagating attributes Has_Predicates and Predicate function to the internally built cloned subtype. This change does not affect the functionality of the compiler; it leaves more clean the decoration of internal entities. Tested on x86_64-pc-linux-gnu, committed on

[Ada] Missing tagged type decoration in corresponding record subtypes

The frontend silently skips propagating attribute Is_Tagged_Type to the constrained corresponding record subtype associated with a protected type or task type with discriminants. This change does not affect the functionality of the compiler; it leaves more clean the decoration of internal

[Ada] Remove section on pragma No_Run_Time

This pragma has been long obsolescent and confuses users. Tested on x86_64-pc-linux-gnu, committed on trunk 2019-09-17 Ed Falis gcc/ada/ * doc/gnat_rm/implementation_defined_pragmas.rst: Remove section. * gnat_rm.texi, gnat_ugn.texi: Regenerate. patch.diff.gz

[Ada] GNATprove: avoid crash on illegal borrow during package elaboration

In GNATprove, a borrow during package elaboration is illegal, but a crash could be issued when analyzing the corresponding declaration. Now avoid analyzing the declaration in that case. There is no test as this does not impact compilation. Tested on x86_64-pc-linux-gnu, committed on trunk

[Ada] Fix possible suppressed overflows in arithmetic run-time

Function Double_Divide computes the division of its parameters (X / (Y*Z)) in a way that avoids overflows on signed integers, except in two specific cases, when X = -2**63, abs(Y) = abs(Z) = 1 (leading to an overflow in -To_Int(Qu)) and when X = -2**63 and Y*Z is large enough that Qu=0 and so the

[Ada] Ignore missing ALI files in GNATprove mode

This change only affects GNATprove backend, where it avoids spurious errors on missing ALI files for units indirectly withed from the current unit and processed as part of a different .gpr project. No test provided, because only GNATprove is affected. Tested on x86_64-pc-linux-gnu, committed on

[Ada] Avoid to close irrelevant file descriptors

'Close' subprogram of GNAT.Expect can close irrelevant file descriptors when 'Expect' was terminated by Process_Died exception and any file open operations was done before call to 'Close'. Tested on x86_64-pc-linux-gnu, committed on trunk 2019-09-17 Vadim Godunko gcc/ada/ *

[Ada] Support chained calls to traversal functions in SPARK

This change only affects the SPARK toolset. In the part of semantic analysis enforcing ownership rules for SPARK, it corrects a crash in analysis of a declaration of a local borrower whose definition is a chain of several calls to traversal functions. Tested on x86_64-pc-linux-gnu, committed on

[Ada] Adding assertions on extra formals for BIP function calls

This patch adds assertions to ensure that the frontend passes to the backend the right number of extra parameters required for build in place function calls. No functional change. Tested on x86_64-pc-linux-gnu, committed on trunk 2019-09-17 Javier Miranda gcc/ada/ * exp_ch6.ads

[Ada] Do not inline dispatching operations in GNATprove mode

In GNATprove, local subprograms without contracts are candidates for inlining, so that they are only analyzed in the context of their calls. This does not apply to dispatching operations, which may be called through dispatching, in an unknown calling context. Hence such operations should not be

[Ada] Refine change for bit-packed slices

We use Long_Long_Integer'Size / 2 instead of 4 * 8 to support specifying a target configuration file where the largest integer is 32 bits instead of 64. Tested on x86_64-pc-linux-gnu, committed on trunk 2019-09-17 Arnaud Charlet gcc/ada/ * libgnat/s-bitfie.ads (Val_Bits, Val_Bytes):

[Ada] Add Remove primitive on functional maps

A primitive for removing a mapping from a functional map has been added. Tested on x86_64-pc-linux-gnu, committed on trunk 2019-09-17 Claire Dross gcc/ada/ * libgnat/a-cofuma.ads, libgnat/a-cofuma.adb (Remove): New function which returns a copy of the input container without

[Ada] Fix rounding of fixed-point arithmetic operation

Fixed-point multiplication, division and conversion may lead to calling the function Double_Divide in s-arit64 runtime unit. In the special case where arguments have the special values X = -2**63 and the absolute value of the product of its other arguments Y*Z = 2**64, the rounded value should be

[Ada] Minor fixes mostly in comments of runtime arithmetic unit

Multiple comments in functions Double_Divide and Scaled_Divide were incorrect. Now fixed. Also change the expression (if Zhi /= 0 then Ylo * Zhi else 0) to the simpler equivalent (Ylo * Zhi) in Double_Divide. Also add a comment explaining why the implementation of Algorithm D for

[Ada] Update the character type comment in exp_dbug.ads

The character type comment in exp_dbug.ads documented the QU and QW encodings, but did not document the plain "Qc" encoding, where 'c' is the character itself. This patch updates the comment to follow the implementation. Tested on x86_64-pc-linux-gnu, committed on trunk 2019-09-17 Tom Tromey

[Ada] Don't accept illegal (e.g., Integer'(null)) generic actuals

Sem_Util.Wrong_Type usually emits an error message, but in some cases it does not. The code which prevents emitting an error message was going too far in some cases, causing illegal constructs to be accepted. For example, a qualified expression such as Integer'(null) might be passed in as an

[Ada] Fix ineffective -gnatyN for separate compilation units

This fixes a recent regression introduced in the machinery giving style warnings: the -gnatyN switch no longer cancels an earlier -gnaty switch for separate compilation units. Running this command: gcc -c slib.adb -gnatyaAbcefhiIklmM25OnprStux -gnatyN On the following sources: package Slib

[Ada] Raise Constraint_Error in overflow case involving rounding

Function Scaled_Divide in s-arith runtime unit computes the combined multiplication and division of its arguments ((X*Y) / Z). In a very special case where the quotient computed before rounding is 2**64-1, then rounding may lead to undesirable wrap-around, leading to a computed quotient of 0

[Ada] Clarify documentation for Stack_Usage

Clarify the documentation for Stack_Usage (both comments in the code, and user documentation) to note that tools like Valgrind won't work. Tested on x86_64-pc-linux-gnu, committed on trunk 2019-09-17 Bob Duff gcc/ada/ * doc/gnat_ugn/gnat_and_program_execution.rst: Clarify

[Ada] Force even timestamp in Windows ALI files

Old versions forced even file timestamp in Windows in GNAT.OS_Lib.GM_Split implementation. We removed this time distortion in GNAT.OS_Lib.GM_Split a few commits. But gprbuild became unnecessary recompiling the sources in 50% cases, when the source has odd file timestamp. This commit is restoring

[Ada] A new utility routine for detecting attribute 'Old

Add a utility routine for detecting attribute 'Old. It will be immediately reused in the GNATprove backend. Tested on x86_64-pc-linux-gnu, committed on trunk 2019-09-17 Piotr Trojanek gcc/ada/ * sem_util.ads, sem_util.adb (Is_Attribute_Old): New utility routine.---

[Ada] GNAT.Expect (Expect_Internal): Try to call 'poll' few times

'poll' returns -1 in case of any error (including interruption by a signal), so call need to be repeated few times to avoid false failures. Tested on x86_64-pc-linux-gnu, committed on trunk 2019-09-17 Vadim Godunko gcc/ada/ * libgnat/g-expect.adb (Expect_Internal): Try to call

[Ada] Ada 2020: Raise expressions in limited contexts (AI12-0172)

This patch adds support for the use of raise expressions in more limited contexts (as described in the Ada Isssue AI12-0172). Tested on x86_64-pc-linux-gnu, committed on trunk 2019-09-17 Javier Miranda gcc/ada/ * exp_ch3.adb (Build_Record_Init_Proc): Do not generate code to

[Ada] In a generic use Presanalyze_Spec_Expression on Predicates

When verifying that the meaning of an aspect has not changed between the freeze point of the entity and the end of the declarations, we analkyze a copy of the expression to verify its conformance to previous analysis. If the expression contains overloaded references, these have to be resolved,

[Ada] PR ada/91268 Do not redefine macros

This should fix PR ada/91268 by only defining macros if not already done. Tested on x86_64-pc-linux-gnu, committed on trunk 2019-09-17 Arnaud Charlet gcc/ada/ * adaint.c (_REENTRANT, _THREAD_SAFE): Only define if needed.--- gcc/ada/adaint.c +++ gcc/ada/adaint.c @@ -35,8 +35,14 @@

[Ada] Support for local unix sockets in GNAT.Sockets API

Sock_Addr_Type has Family_Unix variant now. This variant can be created with function Unix_Local_Addr call. And this variant is working in GNAT.Socket routines where it is appropriate. Tested on x86_64-pc-linux-gnu, committed on trunk 2019-09-17 Dmitriy Anisimkov gcc/ada/ *

[Ada] Avoid touching potentially nonexistent memory

...in cases where the Val_2 might cross a page boundary, and the second page is now known to exist. Copy_Bitfield is still disabled in the compiler: no test possible. Tested on x86_64-pc-linux-gnu, committed on trunk 2019-09-17 Bob Duff gcc/ada/ * libgnat/s-bituti.adb (Get_Val_2,

[Ada] Refine conditions for calling Copy_Bitfield

Avoid calling Copy_Bitfield if there are volatile or independent components that might be read or written. The test is conservative. Tested on x86_64-pc-linux-gnu, committed on trunk 2019-09-17 Bob Duff gcc/ada/ * exp_ch5.adb (Expand_Assign_Array_Loop_Or_Bitfield): Add tests

[Ada] Fix wrong value of 'Size for slices of bit-packed arrays

This fixes a long-standing issue in the compiler which would return a wrong value for the Size attribute applied to slices of bit-packed arrays whose size is not a multiple of the storage unit. The problem is that the computation was done in the code generator after the bit-packed array had been

[PATCH] Fix PR91790

The following fixes an old vectorizer issue with realignment support (thus only powerpc is affected) and BB vectorization. The realignment token is set up from the wrong data-ref which causes an SSA verification failure but in other circumstances might simply generate wrong code. Bootstrap