On Tue, Nov 19, 2019 at 10:04 AM Jakub Jelinek wrote:
>
> Hi!
>
> xchg instruction is smaller, in some cases much smaller than 3 moves,
> (e.g. in the testcase 2 bytes vs. 8 bytes), and is not a performance
> disaster, but from Agner Fog tables and
> https://stackoverflow.com/questions/45766444/wh
On Tue, 19 Nov 2019, Jakub Jelinek wrote:
> Hi!
>
> This case is correctly described in the comment in expand_mul_overflow:
> s1 * s2 -> ur
> t1 = (s1 & s2) < 0 ? (-(U) s1) : ((U) s1)
> t2 = (s1 & s2) < 0 ? (-(U) s2) : ((U) s2)
> res = t1 * t2
> ovf = (s1 ^ s2
Tested on x86_64-suse-linux, applied on all active branches.
2019-11-19 Eric Botcazou
* doc/invoke.texi (-gno-internal-reset-location-views): Fix typo.
--
Eric BotcazouIndex: doc/invoke.texi
===
--- doc/invoke.texi (rev
On Mon, Nov 18, 2019 at 03:34:35PM +0100, Martin Liška wrote:
> > Now, I believe with the if to gswitch optimization these will only rarely
> > kick in, because the IL will have switches that reassoc doesn't handle,
> > instead of series of ifs.
>
> Yes, so my question is whether reassoc can handl
On Tue, Nov 19, 2019 at 9:12 AM Martin Liška wrote:
>
> One potential improvement is to enable the heuristics
> for ENABLE_GC_CHECKING. The macro is about sanity checking
> and poisoning of GGC memory. Which seems to me completely
> independent to setting of the default parameters.
Well, doing mo
Hi!
xchg instruction is smaller, in some cases much smaller than 3 moves,
(e.g. in the testcase 2 bytes vs. 8 bytes), and is not a performance
disaster, but from Agner Fog tables and
https://stackoverflow.com/questions/45766444/why-is-xchg-reg-reg-a-3-micro-op-instruction-on-modern-intel-architect
The patterns neg_scc_insn and not_scc_insn are not correct, leading to
failing pr77309 test for ARC700. Add two new bic compare with zero
patterns to improve output code.
gcc/
-xx-xx Claudiu Zissulescu
* config/arc/arc.md (bic_f): Use cc_set_register predicate.
(bic_cmp0_no
ARC processors can use scaled addresses, i.e., the offset part of the
load address can be shifted by 2 (multiplied by 4). Add this pattern
and a test for it.
gcc/
-xx-xx Claudiu Zissulescu
* config/arc/arc.md (load_scaledsi): New pattern.
testcase/
-xx-xx Claudiu Zissulescu
Use arc-passes.def to register ARC specific passes.
Ok to apply?
Claudiu
gcc/
-xx-xx Claudiu Zissulescu
* config/arc/arc-protos.h (make_pass_arc_ifcvt): Declare.
(make_pass_arc_predicate_delay_insns): Likewise.
* config/arc/arc.c (class pass_arc_ifcvt): Reformat te
Hi!
Calling cp_fully_fold (which has been introduced with C++ late folding)
before actually diagnosing invalid arguments of the comparison is
problematic, because as the testcase shows the folding can then ICE before
the invalid code is reported.
Removing the cp_fully_fold call doesn't regress an
On Fri, 8 Nov 2019, Richard Biener wrote:
>
> The following works around a middle-end limitation not being able
> to deal with by value-passing of VLAs transparently during inlining
> (but only DECL_BY_REFERENCE is handled) in the C frontend by marking
> said functions as not inlinable. This avo
Hi!
This patch restores the previous behavior, there could be many reasons why
TYPE_MODE is BLKmode or some integral mode instead of a vector mode,
unsupported vector mode, lack of available registers etc.
Bootstrapped/regtested on x86_64-linux and i686-linux, committed to trunk.
2019-11-19 Jak
On Mon, Nov 18, 2019 at 5:45 PM Martin Sebor wrote:
>
> On 11/18/19 1:36 AM, Richard Biener wrote:
> > On Fri, Nov 15, 2019 at 10:28 PM Martin Sebor wrote:
> >>
> >> Thanks for the suggestion. I will do that for GCC 11. I take
> >> Richard's point that the attributes' semantics need to be clear
On 19/11/19 09:38 +0100, Stephan Bergmann wrote:
On 17/11/2019 02:07, Jonathan Wakely wrote:
This adds another chunk of the header.
The changes from P1456R1 (Move-only views) and P1862R1 (Range adaptors
for non-copyable iterators) are included, but not the changes from
P1870R1 (forwarding-rang
On 18/11/19 20:54 -0800, Thomas Rodgers wrote:
* include/pstl/glue_numeric_defs.h: Restore enable_if lost during
original
import of pstl.
* include/pstl/glue_numeric_impl.h: Likewise.
OK for trunk and gcc-9-branch, thanks.
Hi!
This case is correctly described in the comment in expand_mul_overflow:
s1 * s2 -> ur
t1 = (s1 & s2) < 0 ? (-(U) s1) : ((U) s1)
t2 = (s1 & s2) < 0 ? (-(U) s2) : ((U) s2)
res = t1 * t2
ovf = (s1 ^ s2) < 0 ? (s1 && s2) : main_ovf (true) */
where if one of th
On 17/11/2019 02:07, Jonathan Wakely wrote:
This adds another chunk of the header.
The changes from P1456R1 (Move-only views) and P1862R1 (Range adaptors
for non-copyable iterators) are included, but not the changes from
P1870R1 (forwarding-range is too subtle).
The tests for subrange and iota
On Mon, 18 Nov 2019 at 20:54, Richard Henderson
wrote:
>
> On 11/18/19 1:30 PM, Christophe Lyon wrote:
> > I'm sorry to notice that the last test (asm-flag-6.c) fails to execute
> > when compiling with -mabi=ilp32. I have less details than for Arm,
> > because here I'm using the Foundation Model a
One potential improvement is to enable the heuristics
for ENABLE_GC_CHECKING. The macro is about sanity checking
and poisoning of GGC memory. Which seems to me completely
independent to setting of the default parameters.
Ready to be installed?
Thanks,
Martin
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