Re: [PATCH 1/5] testsuite: Fix vect/vect-sdiv-pow2-1.c

On Tue, Nov 17, 2020 at 2:02 PM Richard Sandiford wrote: > > Richard Biener via Gcc-patches writes: > > On Tue, Nov 17, 2020 at 12:24 PM Richard Sandiford via Gcc-patches > > wrote: > >> > >> We're now able to vectorise the set-up loop: > >> > >> int p = power2 (fns[i].po2); > >>

Re: Hash ODR name for OBJ_TYPE_REF

On Wed, 18 Nov 2020, Jan Hubicka wrote: > Hi, > main purpose of obj_type_ref is to hold the type that was used in > virutal call. We do not hash this info in hash_operand that causes a > lot of miscompares at ICF time. With LTO this is quite important for > icf performance and in that case we

Re: [PATCH v5] rtl: builtins: (not just) rs6000: Add builtins for fegetround, feclearexcept and feraiseexcept [PR94193]

On Tue, 17 Nov 2020, Jeff Law wrote: > > > On 11/4/20 8:10 AM, Raoni Fassina Firmino via Gcc-patches wrote: > > On Wed, Nov 04, 2020 at 10:35:03AM +0100, Richard Biener wrote: > >>> +/* Expand call EXP to the fegetround builtin (from C99 fenv.h), > >>> returning the > >>> + result and

Hash ODR name for OBJ_TYPE_REF

Hi, main purpose of obj_type_ref is to hold the type that was used in virutal call. We do not hash this info in hash_operand that causes a lot of miscompares at ICF time. With LTO this is quite important for icf performance and in that case we do have manged type names (for non-anonymous types)

Re: [PATCH 1/2] correct BB frequencies after loop changed

On Tue, 17 Nov 2020, Jeff Law wrote: > > Minor questions for Jan and Richi embedded below... > > On 10/9/20 4:12 AM, guojiufu via Gcc-patches wrote: > > When investigating the issue from > > https://gcc.gnu.org/pipermail/gcc-patches/2020-July/549786.html > > I find the BB COUNTs of loop seems

Re: RISC-V: Support version controling for ISA standard extensions

Patch set committed :) On Wed, Nov 18, 2020 at 1:43 PM Kito Cheng wrote: > >> Current GCC implementation is RISC-V ISA 2.2, this patch set implement > v20190608 and v20191213, and also add option > -misa-spec=[2.2|20190608|20191213] to change the default ISA spec version. > >> > >> There is one

Re: [PATCH] PowerPC: Restrict long double test to use IBM long double.

On Tue, Nov 17, 2020 at 11:33:29PM -0600, will schmidt wrote: > On Sun, 2020-11-15 at 12:23 -0500, Michael Meissner via Gcc-patches wrote: > > PowerPC: Restrict long double test to use IBM long double. > > > > I posted this patch previously as a set of 3 testsuite patches. I have > > separated

Re: [PATCH] Include math.h in nextafter-2.c test.

On Tue, Nov 17, 2020 at 11:33:23PM -0600, will schmidt wrote: > On Sun, 2020-11-15 at 12:12 -0500, Michael Meissner via Gcc-patches wrote: > > Include math.h in nextafter-2.c test. > > > > I previously posted this with two other patches. I've separated this into > > its > > own patch. What

Re: [PATCH 2/3] RISC-V: Support zicsr and zifencei extension for -march.

>> - CSR related instructions and fence instructions has to be splitted from >>baseline ISA, zicsr and zifencei are corresponding sub-extension. > > > It is actually only fence.i that is split off. fence is still part of the > base ISA. This is why it is called zifencei. Oh...I didn't

Re: [PATCH 3/3] RISC-V: Support version controling for ISA standard extensions

On Wed, Nov 18, 2020 at 5:29 AM Jim Wilson wrote: > > On Thu, Nov 12, 2020 at 11:28 PM Kito Cheng wrote: >> >> +#ifndef HAVE_AS_MARCH_ZIFENCE >> + /* Skip since older binutils don't recognize zifencei, >> + we mad a mistake that is binutils 2.35 support zicsr but not support >> +

Re: RISC-V: Support version controling for ISA standard extensions

>> Current GCC implementation is RISC-V ISA 2.2, this patch set implement >> v20190608 and v20191213, and also add option >> -misa-spec=[2.2|20190608|20191213] to change the default ISA spec version. >> >> There is one major incompatible >> >> That option will effect the default version of each

Re: [PATCH] PowerPC Fix ibm128 defaults for pr70117.c test.

On Sun, 2020-11-15 at 12:17 -0500, Michael Meissner via Gcc-patches wrote: > From 698d9fd8a5701fa4ed9690ddf71d57765921778c Mon Sep 17 00:00:00 2001 > From: Michael Meissner > Date: Sun, 15 Nov 2020 00:48:23 -0500 > Subject: [PATCH] PowerPC Fix ibm128 defaults for pr70117.c test. > > This patch

Re: [PATCH] Include math.h in nextafter-2.c test.

On Sun, 2020-11-15 at 12:12 -0500, Michael Meissner via Gcc-patches wrote: > Include math.h in nextafter-2.c test. > > I previously posted this with two other patches. I've separated this into its > own patch. What happens is because the nextafter-2.c test uses -fno-builtin, > and it does not

Re: [PATCH] PowerPC: Restrict long double test to use IBM long double.

On Sun, 2020-11-15 at 12:23 -0500, Michael Meissner via Gcc-patches wrote: > PowerPC: Restrict long double test to use IBM long double. > > I posted this patch previously as a set of 3 testsuite patches. I have > separated them into separate patches. This patch marks the convert-bfp-11.c >

Re: [PATCH, rs6000] Add Power10 scheduling description

On Fri, 2020-11-13 at 16:04 -0600, Pat Haugen via Gcc-patches wrote: > Add Power10 scheduling description. > > This patch adds the Power10 scheduling description. Since power10.md > was pretty much a complete rewrite (existing version of power10.md is > mostly just a copy of power9.md), I diffed

Re: [PATCH, rs6000] Add Power10 scheduling description

On Fri, 2020-11-13 at 16:04 -0600, Pat Haugen via Gcc-patches wrote: > diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c > index 4d528a39a37..85bb42d6dce 100644 > --- a/gcc/config/rs6000/rs6000.c > +++ b/gcc/config/rs6000/rs6000.c > @@ -1080,6 +1080,26 @@ struct processor_costs

libgo patch committed: Update gofrontend mangling checks

This libgo patch updates the gofrontend mangling checks, in preparation for changing the mangling scheme again. This is a port of two patches in the master repository. https://golang.org/cl/259298 cmd/cgo: split gofrontend mangling checks into cmd/internal/pkgpath This is a step toward

Re: [PATCH] introduce --param max-object-size

On 11/16/20 4:54 PM, Jeff Law wrote: On 11/16/20 2:04 AM, Richard Biener via Gcc-patches wrote: On Sun, Nov 15, 2020 at 1:46 AM Martin Sebor via Gcc-patches wrote: GCC considers PTRDIFF_MAX - 1 to be the size of the largest object so that the difference between a pointer to the byte just

Re: OpenACC 'kernels' testsuite failures

Hi, Thomas The patch resolves the "no such variable" error message, but I see "during GIMPLE pass: omplower" excess error message. I installed Tcl 8.6 with Expect 5.45. This removes the "no such variable" error messages for C and C++ test cases, but they still occur for Fortran. I guess that

Re: [committed] libstdc++: Use custom timespec in system calls [PR 93421]

On 14/11/20 14:23 +, Jonathan Wakely via Libstdc++ wrote: On Sat, 14 Nov 2020, 13:30 Mike Crowe via Libstdc++, wrote: On Saturday 14 November 2020 at 00:17:59 +, Jonathan Wakely via Libstdc++ wrote: > On 32-bit targets where userspace has switched to 64-bit time_t, we > cannot pass

Re: [PATCH] Remove lambdas from _Rb_tree

On 17/11/20 21:51 +0100, François Dumont via Libstdc++ wrote: This is a change that has been done to _Hashtable and that I forgot to propose for _Rb_tree. The _GLIBCXX_XREF macro can be easily removed of course.     libstdc++: _Rb_tree code cleanup, remove lambdas.     Use an

Re: [PATCH,rs6000] Make MMA builtins use opaque modes

On 11/17/20 5:01 PM, Segher Boessenkool wrote: > On Tue, Nov 17, 2020 at 12:41:58PM -0600, Peter Bergner wrote: >>> +;; Return 1 if this operand is valid for an MMA disassemble insn. >>> +(define_predicate "mma_disassemble_output_operand" >>> + (match_code "reg,subreg,mem") >>> +{ >>> + if

Re: [PATCH, rs6000] Re-enable vector pair memcpy/memmove expansion

On Tue, Nov 17, 2020 at 12:03:05PM -0600, acsaw...@linux.ibm.com wrote: > From: Aaron Sawdey > > After the MMA opaque mode patch goes in, we can re-enable > use of vector pair in the inline expansion of memcpy/memmove. > > After bootstrap/regtest, OK for trunk? Yes, okay for trunk after the

Re: [PATCH,rs6000] Make MMA builtins use opaque modes

On Tue, Nov 17, 2020 at 12:41:58PM -0600, Peter Bergner wrote: > > +;; Return 1 if this operand is valid for an MMA disassemble insn. > > +(define_predicate "mma_disassemble_output_operand" > > + (match_code "reg,subreg,mem") > > +{ > > + if (REG_P (op) && !vsx_register_operand (op, mode)) > > +

Re: [PATCH,rs6000] Make MMA builtins use opaque modes

Hi! On Tue, Nov 17, 2020 at 11:48:04AM -0600, acsaw...@linux.ibm.com wrote: > This patch changes powerpc MMA builtins to use the new opaque > mode class and use modes OO (32 bytes) and XO (64 bytes) > instead of POI/PXI. Using the opaque modes prevents > optimization from trying to do anything

Re: [PATCH v5] rtl: builtins: (not just) rs6000: Add builtins for fegetround, feclearexcept and feraiseexcept [PR94193]

On 11/4/20 8:10 AM, Raoni Fassina Firmino via Gcc-patches wrote: > On Wed, Nov 04, 2020 at 10:35:03AM +0100, Richard Biener wrote: >>> +/* Expand call EXP to the fegetround builtin (from C99 fenv.h), returning >>> the >>> + result and setting it in TARGET. Otherwise return NULL_RTX on

Re: [PATCH v5] rtl: builtins: (not just) rs6000: Add builtins for fegetround, feclearexcept and feraiseexcept [PR94193]

On 11/4/20 8:10 AM, Raoni Fassina Firmino via Gcc-patches wrote: > On Wed, Nov 04, 2020 at 10:35:03AM +0100, Richard Biener wrote: >>> +/* Expand call EXP to the fegetround builtin (from C99 fenv.h), returning >>> the >>> + result and setting it in TARGET. Otherwise return NULL_RTX on

Re: [PATCH 1/2] correct BB frequencies after loop changed

Minor questions for Jan and Richi embedded below... On 10/9/20 4:12 AM, guojiufu via Gcc-patches wrote: > When investigating the issue from > https://gcc.gnu.org/pipermail/gcc-patches/2020-July/549786.html > I find the BB COUNTs of loop seems are not accurate in some case. > For example: > >

[PATCH] recognize implied ranges for modulo.

PR 91029 observes when  a % b > 0 && b >= 0, then a has an implied range of  a >=0.  likewise a % b < 0 implies a range of a <= 0. This patch is a good example of how range-ops can be leveraged to solve problems. It simply implements operator_trunc_mod::op1_range()  to solve for 'A' when

Re: [RFC, testsuite] Add dg-save-linenr

On 10/30/20 5:34 AM, Thomas Schwinge wrote: > Hi! > > On 2017-05-22T18:55:29+0200, Tom de Vries wrote: >> On 05/16/2017 03:12 PM, Rainer Orth wrote: >>> [...], but the new proc ['dg-line'] needs documenting in sourcebuild.texi. >> Attached patch adds the missing documentation. > OK to expand

Re: [AArch64] Add --with-tune configure flag

On 11/17/20 2:27 PM, Pop, Sebastian via Gcc-patches wrote: > Hi, > > here is a follow-up patch to add missing Arm64 configure flags as aliases to > the existing flags. > > gcc/ > * config.gcc: add configure flags --with-{cpu,arch,tune}-{32,64} > as alias flags for

Re: [AArch64] Add --with-tune configure flag

On 11/17/20 10:53 AM, Pop, Sebastian via Gcc-patches wrote: > Hi, > > the attached patch fixes a configure error on Arm64 when passing > --with-tune=... to configure: > ``` > This target does not support --with-tune. > Valid --with options are: abi cpu arch > ``` > The missing flag sets target

Re: RISC-V: Support version controling for ISA standard extensions

On Thu, Nov 12, 2020 at 11:27 PM Kito Cheng wrote: > Current GCC implementation is RISC-V ISA 2.2, this patch set implement > v20190608 and v20191213, and also add option > -misa-spec=[2.2|20190608|20191213] to change the default ISA spec version. > > There is one major incompatible > > That

Re: [r11-5094 Regression] FAIL: gcc.dg/torture/pr8081.c -O2 -flto -fuse-linker-plugin -fno-fat-lto-objects (test for excess errors) on Linux/x86_64

On 11/17/20 2:13 PM, Jan Hubicka wrote: > Hi, > I am testing the following fix. I manually applied a rejected hunk and > for some reaosn managed to reverse the conditonal :( > > Honza > > * ipa-icf.c (sem_function::hash_stmt): Fix conditional on > variably_modified_type_p. > diff

Re: [PATCH 3/3] RISC-V: Support version controling for ISA standard extensions

On Thu, Nov 12, 2020 at 11:28 PM Kito Cheng wrote: > +#ifndef HAVE_AS_MARCH_ZIFENCE > + /* Skip since older binutils don't recognize zifencei, > + we mad a mistake that is binutils 2.35 support zicsr but not support > + zifencei. */ > + skip_zifencei = true; > +#endif > I'd suggest

[Patch, Fortran, committed]

Committed to master as obvious. Thanks, Harald Fortran texi: Fix description of GFC_RTCHECK_* macros. gcc/fortran/ChangeLog: * gfortran.texi: Fix description of GFC_RTCHECK_* to match actual code. diff --git a/gcc/fortran/gfortran.texi b/gcc/fortran/gfortran.texi index

extend cache_integer_cst

This modules-related patch extends cache_integer_cst. Currently, when given a small cst, that cst is added to the type's small and /must not/ already be there. Large values are fine if they are already in the large cache. This adds a parameter to indicate small duplicates are ok, and it

Re: [AArch64] Add --with-tune configure flag

Hi, here is a follow-up patch to add missing Arm64 configure flags as aliases to the existing flags. gcc/ * config.gcc: add configure flags --with-{cpu,arch,tune}-{32,64} as alias flags for --with-{cpu,arch,tune} on AArch64. * doc/install.texi: Document new flags for

Re: [PATCH 2/3] RISC-V: Support zicsr and zifencei extension for -march.

On Thu, Nov 12, 2020 at 11:29 PM Kito Cheng wrote: > - CSR related instructions and fence instructions has to be splitted from >baseline ISA, zicsr and zifencei are corresponding sub-extension. > It is actually only fence.i that is split off. fence is still part of the base ISA. This is

c++: duplicate block-scope extern [PR 97877]

We ICED with a duplicated block-scope extern, as duplicate_decls was dropping the decl_lang_specific of olddecl. Simplys adding appropriate retrofitting and copying turned out to be insufficient because you can get a block-scope using decl also matching the extern. The latter seems a little

Re: [r11-5094 Regression] FAIL: gcc.dg/torture/pr8081.c -O2 -flto -fuse-linker-plugin -fno-fat-lto-objects (test for excess errors) on Linux/x86_64

Hi, I am testing the following fix. I manually applied a rejected hunk and for some reaosn managed to reverse the conditonal :( Honza * ipa-icf.c (sem_function::hash_stmt): Fix conditional on variably_modified_type_p. diff --git a/gcc/ipa-icf.c b/gcc/ipa-icf.c index

[PATCH] Remove lambdas from _Rb_tree

This is a change that has been done to _Hashtable and that I forgot to propose for _Rb_tree. The _GLIBCXX_XREF macro can be easily removed of course.     libstdc++: _Rb_tree code cleanup, remove lambdas.     Use an additional template parameter on the clone method to propagate if the values

[r11-5094 Regression] FAIL: gcc.dg/torture/pr8081.c -O2 -flto -fuse-linker-plugin -fno-fat-lto-objects (test for excess errors) on Linux/x86_64

On Linux/x86_64, afa6adbd6c83eeef6d75655140f7c0c9a02a479e is the first bad commit commit afa6adbd6c83eeef6d75655140f7c0c9a02a479e Author: Jan Hubicka Date: Tue Nov 17 15:41:06 2020 +0100 Improve handling of memory operands in ipa-icf 3/4 caused FAIL: gcc.c-torture/execute/20020412-1.c

[PATCH] c++: Fix ICE-on-invalid with -Wvexing-parse [PR97881]

This invalid (?) code broke my assumption that if decl_specifiers->type is null, there must be any type-specifiers. Turn the assert into an if to fix this crash. Bootstrapped/regtested on x86_64-pc-linux-gnu, ok for trunk? gcc/cp/ChangeLog: PR c++/97881 * parser.c

Re: [PATCH,rs6000] Make MMA builtins use opaque modes

On 11/17/20 11:48 AM, acsaw...@linux.ibm.com wrote: > -;; The MMA patterns use the multi-register PXImode and POImode partial > +;; The MMA patterns use the multi-register XOmode and OOmode partial > ;; integer modes to implement the target specific __vector_quad and XOmode and OOmode are not

[AArch64] Add --with-tune configure flag

Hi, the attached patch fixes a configure error on Arm64 when passing --with-tune=... to configure: ``` This target does not support --with-tune. Valid --with options are: abi cpu arch ``` The missing flag sets target tuning to a different value than the generic tuning. gcc/ *

Re: [gcc r9-8794] aarch64: Clear canary value after stack_protect_test [PR96191]

Sebastian Pop writes: > Hi, > > On Fri, Aug 7, 2020 at 6:18 AM Richard Sandiford wrote: >> >> https://gcc.gnu.org/g:5380912a17ea09a8996720fb62b1a70c16c8f9f2 >> >> commit r9-8794-g5380912a17ea09a8996720fb62b1a70c16c8f9f2 >> Author: Richard Sandiford >> Date: Fri Aug 7 12:17:37 2020 +0100 > >

global trees

This reorders the common and c++ global tree arrays. It introduces a module-specific High Water Mark, below which are the immutable slots initialized at startup and beyond which are the lazily filled slots (and a few immutables we need to locate by name lookup anyway). gcc/c-family/

[PATCH] c++: Allow template lambdas without lambda-declarator [PR97839]

Our implementation of template lambdas incorrectly requires the optional lambda-declarator. This was probably required by an early draft of generic lambdas, but now the production is [expr.prim.lambda.general]: lambda-expression: lambda-introducer lambda-declarator [opt] compound-statement

[PATCH, rs6000] Re-enable vector pair memcpy/memmove expansion

From: Aaron Sawdey After the MMA opaque mode patch goes in, we can re-enable use of vector pair in the inline expansion of memcpy/memmove. After bootstrap/regtest, OK for trunk? Thanks, Aaron gcc/ * config/rs6000/rs6000.c (rs6000_option_override_internal): Enable vector

Re: [PATCH] add -Wmismatched-new-delete to middle end (PR 90629)

On 11/16/20 5:54 PM, Jeff Law wrote: On 11/3/20 4:56 PM, Martin Sebor via Gcc-patches wrote: Attached is a simple middle end implementation of detection of mismatched pairs of calls to C++ new and delete, along with a substantially enhanced implementation of -Wfree-nonheap-object. The latter

Re: [PATCH v1 1/2] Simplify shifts wider than the bitwidth of types

On Tue, Nov 17, 2020 at 06:23:51PM +0100, Philipp Tomsich wrote: > The rules for E1 << E2 are: > - if E2 is negative => undefined > - if E1 is unsigned => E1 x 2^E2, reduced module one more than the > maximum representable value > - if E1 is signed and non-negative => E1 x 2^E2, if E1 x 2^E2

Re: [PATCH v1 1/2] Simplify shifts wider than the bitwidth of types

On Tue, Nov 17, 2020 at 09:14:31AM -0800, Jim Wilson wrote: > On Tue, Nov 17, 2020 at 8:46 AM Jakub Jelinek via Gcc-patches < > gcc-patches@gcc.gnu.org> wrote: > > > On Tue, Nov 17, 2020 at 05:29:57PM +0100, Philipp Tomsich wrote: > > > > > In other words, the change to VRP canonicalizes what a

[PATCH,rs6000] Make MMA builtins use opaque modes

From: Aaron Sawdey This patch changes powerpc MMA builtins to use the new opaque mode class and use modes OO (32 bytes) and XO (64 bytes) instead of POI/PXI. Using the opaque modes prevents optimization from trying to do anything with vector pair/quad, which was the problem we were seeing with

Re: [PATCH v1 1/2] Simplify shifts wider than the bitwidth of types

Jeff & Jakub, I went back to reread the C language standard and it turns out that the delineation between defined and undefined is not as simple as I thought that I remembered (see below). On Tue, 17 Nov 2020 at 17:54, Jeff Law wrote: > > > On 11/17/20 9:46 AM, Jakub Jelinek wrote: > > On Tue,

Re: [PATCH] libgcc: Add a weak stub for __sync_synchronize

On 11/17/20 4:41 PM, Richard Earnshaw (lists) wrote: > > libgcc is *still* the wrong place for this. It belongs in the system > library (eg newlib, or glibc, or whatever), which knows about the system > it's running on. (Sorry, I should have said this before, but I've > context-switched this

Re: [PATCH v1 1/2] Simplify shifts wider than the bitwidth of types

On Tue, Nov 17, 2020 at 8:46 AM Jakub Jelinek via Gcc-patches < gcc-patches@gcc.gnu.org> wrote: > On Tue, Nov 17, 2020 at 05:29:57PM +0100, Philipp Tomsich wrote: > > > > In other words, the change to VRP canonicalizes what a lshift_expr > with an > > > > shift-amount outside of the type width

Re: [PATCH v1 2/2] RISC-V: Adjust predicates for immediate shift operands

On Mon, Nov 16, 2020 at 2:45 PM Philipp Tomsich wrote: > This is an de-optimization only, if applied without patch 1 from the > series: the change to VRP ensures that the backend will never see a shift > wider than the immediate field. > The problem is that if a negative shift-amount makes it to

[PATCH] IOR with nonzero, range cannot contain 0.

PR 83072 mentions that we have lost the ability to recognize that when we see   c |= 1; c cannot be zero.   We can at least put it back for multi-ranges. Added a new testcase to make sure EVRP is tracking it. bootstrapped on x86_64-pc-linux-gnu, no regressions.  pushed. Andrew commit

Re: [PATCH] Practical Improvement to libgcc Complex Divide

Joseph, thank you for your detailed review and comments. I will get to work on the necessary revisions as well as find for a suitable place for sharing my random number generating tests. - patrick On 11/16/2020 8:34 PM, Joseph Myers wrote: On Tue, 8 Sep 2020, Patrick McGehearty via

[pushed] C++ : Remove an overzealous checking assert [PR97871]

Hi, This amends my commit from r11-4927 to remove an assert. tested on x86_64-darwin, pushed to master Iain --- It seems we accept __attribute__(()) without any diagnostic at present, so my added checking assert fires for something like: __attribute__ (()) int a; Fixed by removing the

Re: [PATCH v1 1/2] Simplify shifts wider than the bitwidth of types

On Tue, Nov 17, 2020 at 09:54:46AM -0700, Jeff Law wrote: > > So, e.g. if we had __builtin_warning (dunno where Martin S. is with that), > > we could e.g. queue a __builtin_warning and add __builtin_unreachable (or > > other possibilities), or e.g. during VRP just canonicalize proven always > >

Re: [PATCH v1 1/2] Simplify shifts wider than the bitwidth of types

On 11/17/20 9:46 AM, Jakub Jelinek wrote: > On Tue, Nov 17, 2020 at 05:29:57PM +0100, Philipp Tomsich wrote: In other words, the change to VRP canonicalizes what a lshift_expr with an shift-amount outside of the type width means... it doesn't assume anything about the original

Re: [PATCH v1 1/2] Simplify shifts wider than the bitwidth of types

On Tue, Nov 17, 2020 at 05:29:57PM +0100, Philipp Tomsich wrote: > > > In other words, the change to VRP canonicalizes what a lshift_expr with an > > > shift-amount outside of the type width means... it doesn't assume anything > > > about the original language. > > > Do we assume that a

Re: [PATCH v1 1/2] Simplify shifts wider than the bitwidth of types

Jeff, On Tue, 17 Nov 2020 at 16:56, Jeff Law wrote: > > Note that in his comment to patch 2/2, Jim has noted that user code for > > RISC-V may assume a truncation of the shift-operand... > What I'd suggest doing would be to leave the invalid shift count in the > IL in VRP, then extend the

Re: [PATCH v1 1/2] Simplify shifts wider than the bitwidth of types

Jakub, On Tue, 17 Nov 2020 at 16:56, Jeff Law wrote: > > > > On 11/17/20 4:53 AM, Philipp Tomsich wrote: > > Jeff, > > > > On Tue, 17 Nov 2020 at 00:38, Jeff Law > > wrote: > > > > > > On 11/16/20 11:57 AM, Philipp Tomsich wrote: > > > From: Philipp Tomsich

Re: [patch] Fix build when source directory includes @ character

On 11/17/20 1:22 AM, FX wrote: >> OK. You have commit privs, right? > Yes, and I did commit after Richard’s OK: > https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=034db20e2ea8301b5dc251bf10a97ce1cf90655f > > … but I forgot to send an email saying I had, sorry. No worries.  Thanks. jeff

preprocessor: new callbacks

These two callbacks are needed for C++ modules. The first is for handling macros from header-units. These are resolved lazily. The second is for include-translation -- whether a #include gets turned into a header-unit import. libcpp/ * include/cpplib.h (struct cpp_callbacks):

preprocessor: module line maps

This patch adds LC_MODULE as a map kind, used to indicate a c++ module. Unlike a regular source file, it only contains a single location, and the source locations in that module are represented by ordinary locations whose 'included_from' location is the module. It also exposes some entry

[committed] libstdc++: Fix unconditional definition of __cpp_lib_span in [PR 97869}

The header is empty unless Concepts are supported, but defines the __cpp_lib_span feature test macro unconditionally. It should be guarded by the same conditions as in . libstdc++-v3/ChangeLog: PR libstdc++/97869 * include/precompiled/stdc++.h: Include . *

Re: [PATCH v1 1/2] Simplify shifts wider than the bitwidth of types

On 11/17/20 4:53 AM, Philipp Tomsich wrote: > Jeff, > > On Tue, 17 Nov 2020 at 00:38, Jeff Law > wrote: > > > On 11/16/20 11:57 AM, Philipp Tomsich wrote: > > From: Philipp Tomsich mailto:p...@gnu.org>> > > > > While most shifts wider than the bitwidth

Re: [PATCH] libgcc: Add a weak stub for __sync_synchronize

On Tue, 17 Nov 2020 at 16:41, Richard Earnshaw (lists) via Gcc-patches wrote: > > On 17/11/2020 15:18, Bernd Edlinger wrote: > > On 11/17/20 1:44 PM, Richard Earnshaw (lists) wrote: > >> On 03/11/2020 15:08, Bernd Edlinger wrote: > >>> Hi, > >>> > >>> this fixes a problem with a missing symbol

Re: [PATCH] libgcc: Add a weak stub for __sync_synchronize

On 17/11/2020 15:18, Bernd Edlinger wrote: > On 11/17/20 1:44 PM, Richard Earnshaw (lists) wrote: >> On 03/11/2020 15:08, Bernd Edlinger wrote: >>> Hi, >>> >>> this fixes a problem with a missing symbol __sync_synchronize >>> which happens when newlib is used together with libstdc++ for >>> the

Re: (VAX) cc0 anyone? (was: [PATCH 0/2] Fixes for old version NetBSD targets)

On 17.11.2020 04:49, Hans-Peter Nilsson wrote: > On Sun, 15 Nov 2020, Maciej W. Rozycki wrote: > >> Hi, >> >> In the course of my recent VAX backend modernisation effort > > Hi. That reminds me that VAX is "still" a cc0 target. > > Are you aware of anyone planning on that level of

Re: [PATCH] libgcc: Add a weak stub for __sync_synchronize

On 11/17/20 1:44 PM, Richard Earnshaw (lists) wrote: > On 03/11/2020 15:08, Bernd Edlinger wrote: >> Hi, >> >> this fixes a problem with a missing symbol __sync_synchronize >> which happens when newlib is used together with libstdc++ for >> the non-threaded simulator target arm-none-eabi. >> >>

Re: OpenACC 'kernels' testsuite failures

Hi, Thomas The standard version of Tcl installed on AIX currently is Tcl 8.4. I'll see if I can have a newer version on the side. The patch resolves the "no such variable" error message. (Great! Thanks!) I now see: during GIMPLE pass: omplower as an Excess error. Any idea where that comes

Re: [PATCH 0/2] Improve MSP430 hardware multiply support

On Mon, Nov 16, 2020 at 06:36:17PM -0700, Jeff Law via Gcc-patches wrote: > > > On 11/15/20 2:14 PM, Jozef Lawrynowicz wrote: > > The attached patch series improves MSP430 hardware multiply support, by > > improving code generation when setting up the 16-bit and 32-bit hardware > > multiply

preprocessor: Fix profiled bootstrap warning [pr97858]

As Jakub points out, we only ever pass a single variadic parm (if at all), so just an optional arg is fine. PR 97858 libcpp/ * mkdeps.c (munge): Drop varadic args, we only ever use one. pushing to trunk -- Nathan Sidwell diff --git i/libcpp/mkdeps.c w/libcpp/mkdeps.c

Re: Make ltrans type canonicals compatible with WPA ones

On Tue, 17 Nov 2020, Jan Hubicka wrote: > Hi, > thanks! > > > > So do we want to actually compute alias sets and stream them, > > "freeing up" TYPE_CANONICAL again? We're sort-of taking it away > > I am not sure what you mean by freeing up TYPE_CANONICAL again :) but I > was playing with idea

langhooks: preprocessor hooks for c++ modules

This is a slightly modified version of 01-langhooks.def. I realized I didn't need the deferred macro langhook -- that can be directly installed into the preprocessor callbacks via preprocess_options lang hook. gcc/ * langhooks-def.h (LANG_HOOKS_PREPROCESS_MAIN_FILE)

[PATCH] x86: Add a testcase for PR target/31799

Add a testcase for PR target/31799 which was fixed by commit 4f0473fe89e68bf7c09542ee5c3684da25a5b435 Author: Uros Bizjak Date: Fri May 12 21:04:05 2017 +0200 compare-elim.c (try_eliminate_compare): Canonicalize operation with embedded compare to [(set (reg:CCM) (compare:CCM...

Re: [PATCH] ada: c++: Get rid of libposix4, librt on Solaris

Hi Jonathan, There are two more uses of librt left: * On glibc targets before 2.17 it's needed for clock_gettime. I've no idea how long gcc is supposed to support such targets (glibc 2.17 was released in December 2012). >>> >>> RHEL 7 uses glibc 2.17, so it will still be

Re: [3/3][aarch64] Add support for vec_widen_shift pattern

Richard Biener writes: > On Fri, 13 Nov 2020, Joel Hutton wrote: > >> Tests are still running, but I believe I've addressed all the comments. >> >> > > +#include >> > > + >> > >> > SVE targets will need a: >> > >> > #pragma GCC target "+nosve" >> > >> > here, since we'll generate different

Re: [2/3][vect] Add widening add, subtract vect patterns

Richard Biener writes: > On Fri, 13 Nov 2020, Joel Hutton wrote: > >> Tests are still running, but I believe I've addressed all the comments. >> >> > Like Richard said, the new patterns need to be documented in md.texi >> > and the new tree codes need to be documented in generic.texi. >> >>

Re: [PATCH] ada: c++: Get rid of libposix4, librt on Solaris

On 17/11/20 14:25 +0100, Rainer Orth wrote: Hi Jonathan, There are two more uses of librt left: * On glibc targets before 2.17 it's needed for clock_gettime. I've no idea how long gcc is supposed to support such targets (glibc 2.17 was released in December 2012). RHEL 7 uses glibc 2.17,

Re: [PATCH] libstdc++: Fix ranges::search_n for random access iterators [PR97828]

On 16/11/20 15:25 -0500, Patrick Palka via Libstdc++ wrote: My ranges transcription of the std::search_n implementation for random access iterators missed a crucial part of the algorithm which the tests unfortunately didn't catch. When __remainder is less than __count at the start of an

Re: [1/3][aarch64] Add aarch64 support for vec_widen_add, vec_widen_sub patterns

Joel Hutton writes: > Tests are still running, but I believe I've addressed the comment. > >> There are ways in which we could reduce the amount of cut-&-paste here, >> but I guess everything is a trade-off between clarity and compactness. >> One extreme is to write them all out explicitly,

Re: Make ltrans type canonicals compatible with WPA ones

Hi, thanks! > > So do we want to actually compute alias sets and stream them, > "freeing up" TYPE_CANONICAL again? We're sort-of taking it away I am not sure what you mean by freeing up TYPE_CANONICAL again :) but I was playing with idea of streaming the alias sets from WPA to ltrans. It may

Re: [PATCH] ada: c++: Get rid of libposix4, librt on Solaris

Hi Jonathan, >>There are two more uses of librt left: >> >>* On glibc targets before 2.17 it's needed for clock_gettime. I've no >> idea how long gcc is supposed to support such targets (glibc 2.17 was >> released in December 2012). > > RHEL 7 uses glibc 2.17, so it will still be in use for

Re: V2 [PATCH] Use SHF_GNU_RETAIN to preserve symbol definitions

On Mon, Nov 16, 2020 at 7:59 PM Hans-Peter Nilsson wrote: > > On Fri, 13 Nov 2020, H.J. Lu via Gcc-patches wrote: > > Done. Here is the updated patch. > > Hi. I see a test-case for this kind of construct: > > int foo __attribute__((__used__, __section__ (".bar"))) = 42; > > and IIUC that it's

Re: [PATCH] ada: c++: Get rid of libposix4, librt on Solaris

On 17/11/20 10:47 +0100, Rainer Orth wrote: I recently noticed that neither libposix4 nor librt are needed on Solaris 11 any longer: * libposix4 was renamed to librt in Solaris 7 back in 1998. * librt was folded into libc in the OpenSolaris timeframe, leaving librt only as a filter on libc.

Re: Make ltrans type canonicals compatible with WPA ones

On Tue, 17 Nov 2020, Jan Hubicka wrote: > Hi, > this patch fixes profiledbootstrap failure with LTO enabled. > What happens is that alias_ptr_types_compatible_p relies on the > fact that alias sets are not refined from WPA to ltrans time: > > /* This function originally abstracts from simply

Re: [PATCH 1/5] testsuite: Fix vect/vect-sdiv-pow2-1.c

Richard Biener via Gcc-patches writes: > On Tue, Nov 17, 2020 at 12:24 PM Richard Sandiford via Gcc-patches > wrote: >> >> We're now able to vectorise the set-up loop: >> >> int p = power2 (fns[i].po2); >> for (int j = 0; j < N; j++) >> a[j] = ((p << 4) * j) / (N - 1) - (p <<

Re: [PATCH] Add MODE_OPAQUE

acsaw...@linux.ibm.com writes: > From: Aaron Sawdey > > Richard, > Thanks for the review. I think I have resolved everything, as follows: > > * I was able to remove the const_tiny_rtx initialization for > MODE_OPAQUE. If that becomes a problem it's a pretty simple matter to > use an UNSPEC to

Re: [PATCH 5/5] testsuite: Adjust bb-slp-pr68892.c for AArch64

On Tue, Nov 17, 2020 at 12:29 PM Richard Sandiford via Gcc-patches wrote: > > AArch64 passes the "not profitable" test because it treats vec_construct > as having a high-enough cost. This means that we can try other vector > modes, which in turn causes "BB vectorization with gaps at the end of >

Re: [PATCH 4/5] testsuite: Adjust gcc.dg/vect/slp-21.c for Arm targets

On Tue, Nov 17, 2020 at 12:29 PM Richard Sandiford via Gcc-patches wrote: > > On arm* and aarch64* targets, we can vectorise the second of the main > loops using SLP, not just the third. As the comments say, whether this > is supported depends on a very specific permutation, so it seemed better

Re: [PATCH 3/5] testsuite: Add vect_perm3_int guards

On Tue, Nov 17, 2020 at 12:25 PM Richard Sandiford via Gcc-patches wrote: > > SLP vectorisation of gcc.dg/vect/fast-math-vect-call-1.c involves > a group of 3 floats, which requires the same permutation as > vect_perm3_int. > > The load/store_lanes XFAILs in gcc.dg/vect/slp-perm-6.c implicitly >

Re: [PATCH 2/5] testsuite: Add a vect_partial_vectors_usage_2 guard

On Tue, Nov 17, 2020 at 12:24 PM Richard Sandiford via Gcc-patches wrote: > > We don't need an epilogue loop if the main loop can operate on > partial vectors, so this patch disables an associated test. > The alternative would be to force partial-vectors-usage=1 > on the command line. > > Tested

Re: [PATCH 1/5] testsuite: Fix vect/vect-sdiv-pow2-1.c

On Tue, Nov 17, 2020 at 12:24 PM Richard Sandiford via Gcc-patches wrote: > > We're now able to vectorise the set-up loop: > > int p = power2 (fns[i].po2); > for (int j = 0; j < N; j++) > a[j] = ((p << 4) * j) / (N - 1) - (p << 5); > > Rather than adjust the expected output

Make ltrans type canonicals compatible with WPA ones

Hi, this patch fixes profiledbootstrap failure with LTO enabled. What happens is that alias_ptr_types_compatible_p relies on the fact that alias sets are not refined from WPA to ltrans time: /* This function originally abstracts from simply comparing get_deref_alias_set so that we are

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