RE: [PATCH] [X86_64]: Enable support for next generation AMD Zen3 CPU

2020-12-04 Thread Kumar, Venkataramanan via Gcc-patches
[AMD Public Use] Hi Honza, > -Original Message- > From: Jan Hubicka > Sent: Saturday, December 5, 2020 1:06 AM > To: Uros Bizjak > Cc: Kumar, Venkataramanan ; gcc- > patc...@gcc.gnu.org > Subject: Re: [PATCH] [X86_64]: Enable support for next generation AMD > Zen3 CPU > > [CAUTION:

Re: [PATCH v2] c++: ICE with switch and scoped enum bit-fields [PR98043]

2020-12-04 Thread Marek Polacek via Gcc-patches
On Wed, Dec 02, 2020 at 09:50:33PM -0500, Jason Merrill wrote: > On 12/2/20 6:18 PM, Marek Polacek wrote: > > In this testcase we are crashing trying to gimplify a switch, because > > the types of the switch condition and case constants have different > > TYPE_PRECISIONs. > > > > This started

[PATCH] c-family: Fix hang with -Wsequence-point [PR98126]

2020-12-04 Thread Marek Polacek via Gcc-patches
verify_sequence_points uses verify_tree to recursively walk the subexpressions of an expression, and while recursing, it also keeps lists of expressions found after/before a sequence point. For a large expression, the list can grow significantly. And merge_tlist is at least N(n^2): for a list of

Re: [PATCH] c++: ICE with -fsanitize=vptr and constexpr dynamic_cast [PR98103]

2020-12-04 Thread Marek Polacek via Gcc-patches
On Wed, Dec 02, 2020 at 09:01:48PM -0500, Jason Merrill wrote: > On 12/2/20 6:18 PM, Marek Polacek wrote: > > -fsanitize=vptr initializes all vtable pointers to null so that it can > > catch invalid calls; see cp_ubsan_maybe_initialize_vtbl_ptrs. That > > means that evaluating a vtable reference

Re: Merge from trunk to gccgo branch

2020-12-04 Thread Ian Lance Taylor via Gcc-patches
I've now merged trunk revision 918a5b84a2c51dc9d011d39461cc276e6558069d to the gccgo branch. Ian

Re: [PATCH] Hurd: Enable ifunc by default

2020-12-04 Thread Samuel Thibault via Gcc-patches
Ping? Samuel Thibault, le dim. 08 nov. 2020 23:52:51 +0100, a ecrit: > The binutils bugs seem to have been fixed. > > 2020-11-08 Samuel Thibault > > gcc/ > * config.gcc: Enable default_gnu_indirect_function in *-*-gnu* > target (but not *-*-kfreebsd*-gnu |

libgo patch committed: Update type descriptor name in fieldtrack C code

2020-12-04 Thread Ian Lance Taylor via Gcc-patches
This libgo patch updates the type descriptor name in the fieldtrack C support code. We were using the old name, but nothing noticed because it is a weak reference that is permitted to be nil, so that it works with code that does not use the field tracking library. Bootstrapped and ran Go

[pushed] c++: Fix deduction from auto template parameter [PR93083]

2020-12-04 Thread Jason Merrill via Gcc-patches
The check in do_class_deduction to handle passing one class placeholder template parm as an argument for itself needed to be extended to also handle equivalent parms from other templates. Tested x86_64-pc-linux-gnu, applying to trunk. gcc/cp/ChangeLog: PR c++/93083 * pt.c

Re: [PATCH 2/2] c++: Normalize nested-requirements twice at parse time [PR97093]

2020-12-04 Thread Jason Merrill via Gcc-patches
On 12/4/20 4:33 PM, Patrick Palka wrote: The re-normalization performed from diagnose_nested_requirement doesn't always work because we may have already lost the necessary template context that determines the set of in-scope template parameters used by the nested-requirement. This leads to

Re: [PATCH 1/2 v2] c++: Distinguish unsatisfaction vs errors during satisfaction [PR97093]

2020-12-04 Thread Jason Merrill via Gcc-patches
On 12/4/20 4:33 PM, Patrick Palka wrote: I've convinced myself to do away with the whole diagnose_requires_expr / tsubst_requires_expr consolidation, since that part is just a pure refactoring change and the added overloadedness of the flags is not ideal. This simplifies the patch considerably.

Re: [committed] Fix non-unique testnames

2020-12-04 Thread Jeff Law via Gcc-patches
On 12/4/20 2:55 PM, Mike Stump wrote: > On Nov 30, 2020, at 8:00 AM, Jeff Law via Gcc-patches > wrote: >> This patch fixes a handful of tests with non-unique names which confuse >> the living hell out of compare_tests, particularly if one of two tests >> [x]fail while the other is [x]pass

Re: [committed] Fix non-unique testnames

2020-12-04 Thread Mike Stump via Gcc-patches
On Nov 30, 2020, at 8:00 AM, Jeff Law via Gcc-patches wrote: > > This patch fixes a handful of tests with non-unique names which confuse > the living hell out of compare_tests, particularly if one of two tests > [x]fail while the other is [x]pass which compare_tests will flag as a > regression

[PATCH 2/2] c++: Normalize nested-requirements twice at parse time [PR97093]

2020-12-04 Thread Patrick Palka via Gcc-patches
The re-normalization performed from diagnose_nested_requirement doesn't always work because we may have already lost the necessary template context that determines the set of in-scope template parameters used by the nested-requirement. This leads to normalization producing atoms that have

[PATCH 1/2 v2] c++: Distinguish unsatisfaction vs errors during satisfaction [PR97093]

2020-12-04 Thread Patrick Palka via Gcc-patches
During satisfaction, the flag info.noisy() controls three things: whether to diagnose ill-formed satisfaction (such as the satisfaction value of an atom being non-bool or non-constant); whether to diagnose unsatisfaction; and whether to bypass the satisfaction cache. The flag turns out to be too

Re: [PATCH] c++: Distinguish unsatisfaction vs errors during satisfaction [PR97093]

2020-12-04 Thread Patrick Palka via Gcc-patches
On Thu, 3 Dec 2020, Jason Merrill wrote: > On 12/3/20 9:24 AM, Patrick Palka wrote: > > During satisfaction, the flag info.noisy() controls three things: > > whether to diagnose fatal errors (such as the satisfaction value of an > > atom being non-bool); whether to diagnose unsatisfaction; and

Re: [PATCH] c++: Fix constexpr access to union member through pointer-to-member [PR98122]

2020-12-04 Thread Jason Merrill via Gcc-patches
On 12/4/20 12:27 PM, Jakub Jelinek wrote: Hi! We currently incorrectly reject the first testcase, because cxx_fold_indirect_ref_1 doesn't attempt to handle UNION_TYPEs. As the second testcase shows, it isn't that easy, because I believe we need to take into account the active member and prefer

Re: [PATCH RFA] vec: Simplify use with C++11 range-based 'for'.

2020-12-04 Thread Jason Merrill via Gcc-patches
On 12/4/20 3:39 AM, Richard Biener wrote: On Thu, Dec 3, 2020 at 10:46 PM Jeff Law via Gcc-patches wrote: On 12/3/20 10:53 AM, Jason Merrill via Gcc-patches wrote: It looks cleaner if we can use a vec* directly as a range for the C++11 range-based 'for' loop, without needing to indirect

Re: [PATCH] [X86_64]: Enable support for next generation AMD Zen3 CPU

2020-12-04 Thread Jan Hubicka
> On Fri, Dec 4, 2020 at 6:50 PM Kumar, Venkataramanan > wrote: > > > > [AMD Public Use] > > > > Hi Uros > > > > > -Original Message- > > > From: Uros Bizjak > > > Sent: Friday, December 4, 2020 2:30 PM > > > To: Kumar, Venkataramanan > > > Cc: gcc-patches@gcc.gnu.org; Jan Hubicka

[PATCH,rs6000] Combine patterns for p10 load-cmpi fusion

2020-12-04 Thread acsawdey--- via Gcc-patches
From: Aaron Sawdey This patch adds the first batch of patterns to support p10 fusion. These will allow combine to create a single insn for a pair of instructions that that power10 can fuse and execute. These particular ones have the requirement that only cr0 can be used when fusing a load with a

Re: [PATCH] warn for integer overflow in allocation calls (PR 96838)

2020-12-04 Thread Jeff Law via Gcc-patches
On 11/24/20 11:39 AM, Martin Sebor wrote: > On 11/24/20 10:44 AM, Andrew MacLeod wrote: >> On 11/24/20 12:42 PM, Andrew MacLeod wrote: >>> On 11/23/20 4:38 PM, Martin Sebor wrote: On 11/21/20 6:26 AM, Andrew MacLeod wrote: > On 11/21/20 12:07 AM, Jeff Law wrote: >> >> On

Re: [PATCH] [X86_64]: Enable support for next generation AMD Zen3 CPU

2020-12-04 Thread Joseph Myers
On Fri, 4 Dec 2020, Richard Biener via Gcc-patches wrote: > Per rule changes to targets are allowed at any point per discretion of target > maintainers. Heck, we even accept _new_ targets during stage3/4! For architectures that are neither primary nor secondary targets, that's definitely the

Re: [committed] Fix mcore multilib specification

2020-12-04 Thread Jeff Law via Gcc-patches
On 12/2/20 6:06 PM, Jim Wilson wrote: > On Tue, Dec 1, 2020 at 3:24 PM Jeff Law via Gcc-patches > mailto:gcc-patches@gcc.gnu.org>> wrote: > > > Kito's recent change to multilib handling seems to have exposed a > latent > mcore bug. > > The mcore 210 does not support little

Re: [PATCH] v3: doc/implement-c.texi: About same-as-scalar-type volatile aggregate accesses, PR94600

2020-12-04 Thread Jeff Law via Gcc-patches
On 12/4/20 7:51 AM, Hans-Peter Nilsson via Gcc-patches wrote: >> From: Martin Sebor via Gcc-patches >> Date: Fri, 4 Dec 2020 01:49:51 +0100 >> On 12/3/20 12:14 PM, Hans-Peter Nilsson via Gcc-patches wrote: >>> Belatedly, here's an updated version, using Martin Sebor's >>> suggested wording

Re: [PATCH] i386: Add combine splitters to allow combining multiple insns into reg1 = const; reg2 = rotate (reg1, reg3 & cst) [PR96226]

2020-12-04 Thread Segher Boessenkool
On Fri, Dec 04, 2020 at 07:32:43PM +0100, Uros Bizjak wrote: > On Fri, Dec 4, 2020 at 7:26 PM Segher Boessenkool > wrote: > > A splitter can *already* split to only one insn. > > Oh... brown paper bag time... I really don't know where and when I > pick that info, since the docs indeed say: At

Re: [PATCH] tree-optimization/98137 - enhance split_constant_offset range handling

2020-12-04 Thread Jeff Law via Gcc-patches
On 12/4/20 4:45 AM, Richard Biener wrote: > split_constant_offset currently gives up looking at ranges when > dealing with possibly wrapping operations for looking through > conversions when the downstream analysis does not yield a SSA name. > That's overly conservative and we have a nice

Re: [PATCH] i386: Add combine splitters to allow combining multiple insns into reg1 = const; reg2 = rotate (reg1, reg3 & cst) [PR96226]

2020-12-04 Thread Uros Bizjak via Gcc-patches
On Fri, Dec 4, 2020 at 7:26 PM Segher Boessenkool wrote: > > Hi! > > On Fri, Dec 04, 2020 at 07:06:45PM +0100, Uros Bizjak wrote: > > On Fri, Dec 4, 2020 at 6:57 PM Jakub Jelinek wrote: > > > > > > On Fri, Dec 04, 2020 at 06:53:49PM +0100, Uros Bizjak wrote: > > > > > > I was trying that first,

Re: [PATCH] i386: Add combine splitters to allow combining multiple insns into reg1 = const; reg2 = rotate (reg1, reg3 & cst) [PR96226]

2020-12-04 Thread Uros Bizjak via Gcc-patches
On Fri, Dec 4, 2020 at 7:09 PM Jakub Jelinek wrote: > > On Fri, Dec 04, 2020 at 07:06:45PM +0100, Uros Bizjak wrote: > > No, I didn't want to burden you with the additional task - the patch > > is OK as it is. I was just thinking out loud, as I remembered that > > changing bt patterns to combine

Re: [RFC PATCH v1 1/1] PPC64: Implement POWER Architecture Vector Function ABI.

2020-12-04 Thread GT via Gcc-patches
‐‐‐ Original Message ‐‐‐ On Thursday, August 20, 2020 1:48 PM, Segher Boessenkool wrote: > On Thu, Aug 20, 2020 at 04:19:36PM +, GT wrote: > > > > Great! Please repost with what I already pointed out fixed, that > > > explanation added, and working links to the documentation? > > >

Re: [PATCH] i386: Add combine splitters to allow combining multiple insns into reg1 = const; reg2 = rotate (reg1, reg3 & cst) [PR96226]

2020-12-04 Thread Segher Boessenkool
Hi! On Fri, Dec 04, 2020 at 07:06:45PM +0100, Uros Bizjak wrote: > On Fri, Dec 4, 2020 at 6:57 PM Jakub Jelinek wrote: > > > > On Fri, Dec 04, 2020 at 06:53:49PM +0100, Uros Bizjak wrote: > > > > > I was trying that first, but it didn't work. Without the > > > > > clobber it actually works

Re: [PATCH] i386: Add combine splitters to allow combining multiple insns into reg1 = const; reg2 = rotate (reg1, reg3 & cst) [PR96226]

2020-12-04 Thread Jakub Jelinek via Gcc-patches
On Fri, Dec 04, 2020 at 07:06:45PM +0100, Uros Bizjak wrote: > No, I didn't want to burden you with the additional task - the patch > is OK as it is. I was just thinking out loud, as I remembered that > changing bt patterns to combine splitter regressed one testcase. IIRC > combination of two

RE: [PATCH] [X86_64]: Enable support for next generation AMD Zen3 CPU

2020-12-04 Thread Kumar, Venkataramanan via Gcc-patches
[AMD Public Use] Hi Uros, > -Original Message- > From: Uros Bizjak > Sent: Friday, December 4, 2020 11:31 PM > To: Kumar, Venkataramanan > Cc: gcc-patches@gcc.gnu.org; Jan Hubicka (hubi...@ucw.cz) > > Subject: Re: [PATCH] [X86_64]: Enable support for next generation AMD > Zen3 CPU >

Re: [PATCH] i386: Add combine splitters to allow combining multiple insns into reg1 = const; reg2 = rotate (reg1, reg3 & cst) [PR96226]

2020-12-04 Thread Uros Bizjak via Gcc-patches
On Fri, Dec 4, 2020 at 6:57 PM Jakub Jelinek wrote: > > On Fri, Dec 04, 2020 at 06:53:49PM +0100, Uros Bizjak wrote: > > > > I was trying that first, but it didn't work. Without the > > > > clobber it actually works right, we don't have the rotate insn with the > > > > masking and no clobber, so

Re: [PATCH] gimple: Return fnspec only for replaceable new/delete operators called from new/delete [PR98130]

2020-12-04 Thread Richard Biener
On December 4, 2020 6:06:20 PM GMT+01:00, Jakub Jelinek wrote: >Hi! > >As mentioned in the PR, we shouldn't treat non-replaceable operator >new/delete (e.g. with the placement new) as replaceable ones. > >There is some pending discussion that perhaps operator delete called >from >delete if not

Re: [PATCH] [X86_64]: Enable support for next generation AMD Zen3 CPU

2020-12-04 Thread Uros Bizjak via Gcc-patches
On Fri, Dec 4, 2020 at 6:50 PM Kumar, Venkataramanan wrote: > > [AMD Public Use] > > Hi Uros > > > -Original Message- > > From: Uros Bizjak > > Sent: Friday, December 4, 2020 2:30 PM > > To: Kumar, Venkataramanan > > Cc: gcc-patches@gcc.gnu.org; Jan Hubicka (hubi...@ucw.cz) > > > >

Re: [PATCH] i386: Add combine splitters to allow combining multiple insns into reg1 = const; reg2 = rotate (reg1, reg3 & cst) [PR96226]

2020-12-04 Thread Jakub Jelinek via Gcc-patches
On Fri, Dec 04, 2020 at 06:53:49PM +0100, Uros Bizjak wrote: > > > I was trying that first, but it didn't work. Without the > > > clobber it actually works right, we don't have the rotate insn with the > > > masking and no clobber, so in the end combiner does add the clobber there > > > (or would

Re: [PATCH] i386: Add combine splitters to allow combining multiple insns into reg1 = const; reg2 = rotate (reg1, reg3 & cst) [PR96226]

2020-12-04 Thread Uros Bizjak via Gcc-patches
On Fri, Dec 4, 2020 at 6:42 PM Uros Bizjak wrote: > > On Fri, Dec 4, 2020 at 6:41 PM Jakub Jelinek wrote: > > > > On Fri, Dec 04, 2020 at 06:37:02PM +0100, Uros Bizjak wrote: > > > > + "(INTVAL (operands[3]) & (GET_MODE_BITSIZE (mode) - 1)) > > > > + == GET_MODE_BITSIZE (mode) - 1" > > > > +

RE: [PATCH] [X86_64]: Enable support for next generation AMD Zen3 CPU

2020-12-04 Thread Kumar, Venkataramanan via Gcc-patches
[AMD Public Use] Hi Uros > -Original Message- > From: Uros Bizjak > Sent: Friday, December 4, 2020 2:30 PM > To: Kumar, Venkataramanan > Cc: gcc-patches@gcc.gnu.org; Jan Hubicka (hubi...@ucw.cz) > > Subject: Re: [PATCH] [X86_64]: Enable support for next generation AMD > Zen3 CPU > >

Re: [PATCH] i386: Add combine splitters to allow combining multiple insns into reg1 = const; reg2 = rotate (reg1, reg3 & cst) [PR96226]

2020-12-04 Thread Uros Bizjak via Gcc-patches
On Fri, Dec 4, 2020 at 6:41 PM Jakub Jelinek wrote: > > On Fri, Dec 04, 2020 at 06:37:02PM +0100, Uros Bizjak wrote: > > > + "(INTVAL (operands[3]) & (GET_MODE_BITSIZE (mode) - 1)) > > > + == GET_MODE_BITSIZE (mode) - 1" > > > + [(set (match_dup 4) (match_dup 1)) > > > + (set (match_dup 0) > >

Re: [PATCH] i386: Add combine splitters to allow combining multiple insns into reg1 = const; reg2 = rotate (reg1, reg3 & cst) [PR96226]

2020-12-04 Thread Jakub Jelinek via Gcc-patches
On Fri, Dec 04, 2020 at 06:37:02PM +0100, Uros Bizjak wrote: > > + "(INTVAL (operands[3]) & (GET_MODE_BITSIZE (mode) - 1)) > > + == GET_MODE_BITSIZE (mode) - 1" > > + [(set (match_dup 4) (match_dup 1)) > > + (set (match_dup 0) > > + (any_rotate:SWI48 (match_dup 4) > > +

Re: [PATCH] i386: Add combine splitters to allow combining multiple insns into reg1 = const; reg2 = rotate (reg1, reg3 & cst) [PR96226]

2020-12-04 Thread Uros Bizjak via Gcc-patches
On Fri, Dec 4, 2020 at 6:32 PM Jakub Jelinek wrote: > > Hi! > > As mentioned in the PR, we can combine ~(1 << x) into -2 r<< x, but we give > up in the ~(1 << (x & 31)) cases, as *3_mask* don't allow > immediate operand 1 and find_split_point prefers to split (x & 31) instead > of the constant. >

[PATCH] i386: Add combine splitters to allow combining multiple insns into reg1 = const; reg2 = rotate (reg1, reg3 & cst) [PR96226]

2020-12-04 Thread Jakub Jelinek via Gcc-patches
Hi! As mentioned in the PR, we can combine ~(1 << x) into -2 r<< x, but we give up in the ~(1 << (x & 31)) cases, as *3_mask* don't allow immediate operand 1 and find_split_point prefers to split (x & 31) instead of the constant. With these combine splitters we help combine decide how to split

[PATCH] c++: Fix constexpr access to union member through pointer-to-member [PR98122]

2020-12-04 Thread Jakub Jelinek via Gcc-patches
Hi! We currently incorrectly reject the first testcase, because cxx_fold_indirect_ref_1 doesn't attempt to handle UNION_TYPEs. As the second testcase shows, it isn't that easy, because I believe we need to take into account the active member and prefer that active member over other members,

[PATCH] gimple: Return fnspec only for replaceable new/delete operators called from new/delete [PR98130]

2020-12-04 Thread Jakub Jelinek via Gcc-patches
Hi! As mentioned in the PR, we shouldn't treat non-replaceable operator new/delete (e.g. with the placement new) as replaceable ones. There is some pending discussion that perhaps operator delete called from delete if not replaceable should return some other fnspec, but can we handle that

c++: Revert dependent-array changes [PR 98116]

2020-12-04 Thread Nathan Sidwell
The changes reverted here are exposing an existing problem with alias template comparisons. The typename_type changes are also incomplete, possibly for similar reasons. It seems safer to revert them, fix the underlying issue and then move forwards. The testcases is adjusted to more robustly

Re: [AArch64] Add --with-tune configure flag

2020-12-04 Thread Pop, Sebastian via Gcc-patches
On 11/19/20, 10:52 AM, "Richard Earnshaw (lists)" wrote: > Having the same option have a completely different meaning would be even > worse than not having the option at all. So no, that's a non-starter. The attached patch 0001 removes --with-{cpu,arch,tune}-32. Bootstrap and regression

Re: How to traverse all the local variables that declared in the current routine?

2020-12-04 Thread Qing Zhao via Gcc-patches
> On Dec 4, 2020, at 2:50 AM, Richard Biener wrote: > > On Thu, Dec 3, 2020 at 6:33 PM Richard Sandiford > mailto:richard.sandif...@arm.com>> wrote: >> >> Richard Biener via Gcc-patches writes: >>> On Tue, Nov 24, 2020 at 4:47 PM Qing Zhao wrote: Another issue is, in order to check

V2 [PATCH 1/2] Switch to a new section if the SECTION_RETAIN bit doesn't match

2020-12-04 Thread H.J. Lu via Gcc-patches
When definitions marked with used attribute and unmarked definitions are placed in the section with the same name, switch to a new section if the SECTION_RETAIN bit doesn't match. gcc/ PR target/98146 * output.h (switch_to_section): Add a tree argument, default to

V2 [PATCH 0/2] Switch to a new section if the SECTION_RETAIN bit doesn't match

2020-12-04 Thread H.J. Lu via Gcc-patches
When SECTION_RETAIN is used, definitions marked with used attribute and unmarked definitions are placed in a section with the same name. Instead of issue an error: [hjl@gnu-cfl-2 gcc]$ /usr/gcc-11.0.0-x32/bin/gcc -S c.c -fdiagnostics-plain-output c.c:2:49: error: ‘foo1’ causes a section type

V2 [PATCH 2/2] Warn used and not used symbols in section with the same name

2020-12-04 Thread H.J. Lu via Gcc-patches
When SECTION_RETAIN is used, issue a warning when a symbol without used attribute and a symbol with used attribute are placed in the section with the same name, like int __attribute__((used,section(".data.foo"))) foo2 = 2; int __attribute__((section(".data.foo"))) foo1 = 1; since assembler will

Re: H8 cc0 conversion

2020-12-04 Thread Maciej W. Rozycki
On Wed, 25 Nov 2020, Hans-Peter Nilsson wrote: > Current cc0 head-count is down to avr, cr16, h8300, vax, with > two of them recently having patches posted, alas not a lot of > ports left to try this advice. Hmm, the VAX port surely did not qualify for an innovative approach anyway (though

Re: [PATCH] Remove misleading debug line entries

2020-12-04 Thread Bernd Edlinger
On 12/3/20 9:30 AM, Richard Biener wrote: > On Wed, 2 Dec 2020, Bernd Edlinger wrote: > >> On 12/2/20 8:50 AM, Richard Biener wrote: >>> On Tue, 1 Dec 2020, Bernd Edlinger wrote: >>> Hi! This removes gimple_debug stmts without block info after a NULL INLINE_ENTRY.

[PATCH] v3: doc/implement-c.texi: About same-as-scalar-type volatile aggregate accesses, PR94600

2020-12-04 Thread Hans-Peter Nilsson via Gcc-patches
> From: Martin Sebor via Gcc-patches > Date: Fri, 4 Dec 2020 01:49:51 +0100 > On 12/3/20 12:14 PM, Hans-Peter Nilsson via Gcc-patches wrote: > > Belatedly, here's an updated version, using Martin Sebor's > > suggested wording from > >

Re: [PATCH 0/2] Switch to a new section if the SECTION_RETAIN bit doesn't match

2020-12-04 Thread Jozef Lawrynowicz
On Fri, Dec 04, 2020 at 05:16:38AM -0800, H.J. Lu via Gcc-patches wrote: > On Fri, Dec 4, 2020 at 4:17 AM Jozef Lawrynowicz > wrote: > > > > On Thu, Dec 03, 2020 at 04:06:50PM -0800, H.J. Lu via Gcc-patches wrote: > > > When SECTION_RETAIN is used, definitions marked with used attribute and > > >

Re: [PATCH] RISC-V: Canonicalize --with-arch

2020-12-04 Thread Matthias Klose
On 12/4/20 2:38 PM, Matthias Klose wrote: > On 12/4/20 9:07 AM, Kito Cheng via Gcc-patches wrote: >> Committed, thanks :) >> >> On Thu, Dec 3, 2020 at 8:51 AM Jim Wilson wrote: >>> >>> On Tue, Dec 1, 2020 at 12:13 AM Kito Cheng wrote: - We would like to canonicalize the arch string

[PATCH, v2, OpenMP 5.0, libgomp] Structure element mapping for OpenMP 5.0

2020-12-04 Thread Chung-Lin Tang
Hi Jakub, this is a new version of the structure element mapping patch for OpenMP 5.0 requirement changes. This one uses the approach you've outlined in your concept patch [1], basically to use more special REFCOUNT_* values to mark them, and link following structure element splay_tree_keys

Re: [stage1][PATCH] Change semantics of -frecord-gcc-switches and add -frecord-gcc-switches-format.

2020-12-04 Thread Richard Biener via Gcc-patches
On Fri, Dec 4, 2020 at 2:35 PM Jakub Jelinek wrote: > > On Fri, Dec 04, 2020 at 02:30:45PM +0100, Martin Liška wrote: > > On 12/4/20 10:03 AM, Richard Biener wrote: > > > Otherwise 0001- looks good to me. > > > > Pushed that to master. > > > > > As said I'd like to see opinions > > > from others

Re: [PATCH v2] Add --ld-path= to specify an arbitrary executable as the linker

2020-12-04 Thread Martin Liška
PING May I please ping the patch, it's waiting here for a review for quite some time. Thanks, Martin On 7/23/20 12:17 PM, Martin Liška wrote: On 7/21/20 6:07 AM, Fangrui Song wrote: If the value does not contain any path component separator (e.g. a slash), the linker will be searched for

Re: [PATCH] RISC-V: Canonicalize --with-arch

2020-12-04 Thread Jakub Jelinek via Gcc-patches
On Fri, Dec 04, 2020 at 02:38:54PM +0100, Matthias Klose wrote: > On 12/4/20 9:07 AM, Kito Cheng via Gcc-patches wrote: > > Committed, thanks :) > > > > On Thu, Dec 3, 2020 at 8:51 AM Jim Wilson wrote: > >> > >> On Tue, Dec 1, 2020 at 12:13 AM Kito Cheng wrote: > >>> > >>> - We would like to

Re: [PATCH] implement pre-c++20 contracts

2020-12-04 Thread Jeff Chapman via Gcc-patches
> OK, I'll start with -alt then, thanks. Andrew is exactly correct, contracts-jac-alt is still the current branch we're focusing our upstreaming efforts on. It's trailing upstream master by a fair bit at this point. I'll get a merge pushed shortly. Please let me know if there's anything I can

Re: [PATCH] RISC-V: Canonicalize --with-arch

2020-12-04 Thread Matthias Klose
On 12/4/20 9:07 AM, Kito Cheng via Gcc-patches wrote: > Committed, thanks :) > > On Thu, Dec 3, 2020 at 8:51 AM Jim Wilson wrote: >> >> On Tue, Dec 1, 2020 at 12:13 AM Kito Cheng wrote: >>> >>> - We would like to canonicalize the arch string for --with-arch for >>>easier handling multilib,

Re: [stage1][PATCH] Change semantics of -frecord-gcc-switches and add -frecord-gcc-switches-format.

2020-12-04 Thread Jakub Jelinek via Gcc-patches
On Fri, Dec 04, 2020 at 02:30:45PM +0100, Martin Liška wrote: > On 12/4/20 10:03 AM, Richard Biener wrote: > > Otherwise 0001- looks good to me. > > Pushed that to master. > > > As said I'd like to see opinions > > from others on the > > driver / backend communication for 0002. > > To be

Re: [stage1][PATCH] Change semantics of -frecord-gcc-switches and add -frecord-gcc-switches-format.

2020-12-04 Thread Martin Liška
On 12/4/20 10:03 AM, Richard Biener wrote: Otherwise 0001- looks good to me. Pushed that to master. As said I'd like to see opinions from others on the driver / backend communication for 0002. To be honest, we moved back to the original implementation which used a temporary file. There

c++: Module API declarations

2020-12-04 Thread Nathan Sidwell
Here are the declarations of module.cc. I'll fill these in with nop-stubs when adding the remaining pieces of the modules infrastructure. Finally replacing the contents of module.cc with the real thing when victory is within reach. This provides the inline predicates about module state, and

Re: [PATCH 0/2] Switch to a new section if the SECTION_RETAIN bit doesn't match

2020-12-04 Thread H.J. Lu via Gcc-patches
On Fri, Dec 4, 2020 at 4:17 AM Jozef Lawrynowicz wrote: > > On Thu, Dec 03, 2020 at 04:06:50PM -0800, H.J. Lu via Gcc-patches wrote: > > When SECTION_RETAIN is used, definitions marked with used attribute and > > unmarked definitions are placed in the same section. Instead of issue > > an error:

Re: [PATCH] testsuite: Fix various scan-assembler-symbol-section issues

2020-12-04 Thread David Edelsohn via Gcc-patches
On Fri, Dec 4, 2020 at 5:35 AM Rainer Orth wrote: > On AIX 7.2, there are changes like > > -PASS: g++.dg/gomp/tls-5.C -std=c++2a scan-assembler-symbol-section symbol > ^_?ir$ (found ir) has section ^\\.tbss|\\[TL\\] (found _tls5.tls_[TL],4) > +PASS: g++.dg/gomp/tls-5.C -std=c++2a

RE: [PATCH] [X86_64]: Enable support for next generation AMD Zen3 CPU

2020-12-04 Thread Kumar, Venkataramanan via Gcc-patches
[AMD Public Use] Hi Honza, > -Original Message- > From: Jan Hubicka > Sent: Friday, December 4, 2020 5:25 PM > To: Kumar, Venkataramanan > Cc: gcc-patches@gcc.gnu.org; Uros Bizjak > Subject: Re: [PATCH] [X86_64]: Enable support for next generation AMD > Zen3 CPU > > [CAUTION:

Re: [PATCH 0/2] Switch to a new section if the SECTION_RETAIN bit doesn't match

2020-12-04 Thread Jozef Lawrynowicz
On Thu, Dec 03, 2020 at 04:06:50PM -0800, H.J. Lu via Gcc-patches wrote: > When SECTION_RETAIN is used, definitions marked with used attribute and > unmarked definitions are placed in the same section. Instead of issue > an error: > > [hjl@gnu-cfl-2 gcc]$ /usr/gcc-11.0.0-x32/bin/gcc -S c.c >

Re: [PATCH 1/2] Switch to a new section if the SECTION_RETAIN bit doesn't match

2020-12-04 Thread Jozef Lawrynowicz
Hi H.J., On Thu, Dec 03, 2020 at 04:06:51PM -0800, H.J. Lu via Gcc-patches wrote: > When definitions marked with used attribute and unmarked definitions are > placed in the same section, switch to a new section if the SECTION_RETAIN > bit doesn't match. GAS doesn't create separate sections for

Re: [PATCH] [X86_64]: Enable support for next generation AMD Zen3 CPU

2020-12-04 Thread Jan Hubicka
> [AMD Official Use Only - Internal Distribution Only] > > Hi Maintainers, > > PFA, the patch that enables support for the next generation AMD Zen3 CPU via > -march=znver3. > This is a very basic enablement patch. As of now the cost, tuning and > scheduler changes are kept same as znver2. >

[PATCH] tree-optimization/98137 - enhance split_constant_offset range handling

2020-12-04 Thread Richard Biener
split_constant_offset currently gives up looking at ranges when dealing with possibly wrapping operations for looking through conversions when the downstream analysis does not yield a SSA name. That's overly conservative and we have a nice helper that can deal with arbitrary expresssions. Use

Re: [PATCH] testsuite: Fix various scan-assembler-symbol-section issues

2020-12-04 Thread Iain Sandoe
Hi Rainer, thanks for looking at this, I was trying to see how to fix the failing Darwin tests last week, and concluded that the absence of target selectors/xfail meant skipping some tests - this is a much better solution. Rainer Orth wrote: I recently started looking into

Re: [PR66791][ARM] Replace __builtin_neon_vcreate* for vcreate intrinsics

2020-12-04 Thread Prathamesh Kulkarni via Gcc-patches
On Thu, 3 Dec 2020 at 16:50, Kyrylo Tkachov wrote: > > Hi Prathamesh, > > > -Original Message- > > From: Prathamesh Kulkarni > > Sent: 03 December 2020 10:50 > > To: gcc Patches ; Kyrylo Tkachov > > > > Subject: [PR66791][ARM] Replace __builtin_neon_vcreate* for vcreate > > intrinsics >

Re: [PATCH] fold-const: Don't use build_constructor for non-aggregate types in native_encode_initializer [PR93121]

2020-12-04 Thread Richard Biener
On Fri, 4 Dec 2020, Jakub Jelinek wrote: > Hi! > > The following testcase is rejected, because when trying to encode a zeroing > CONSTRUCTOR, the code was using build_constructor to build initializers for > the elements but when recursing the function handles CONSTRUCTOR only for > aggregate

Re: [PATCH] debug: Fix another vector DECL_MODE ICE [PR98100]

2020-12-04 Thread Richard Biener
On Fri, 4 Dec 2020, Jakub Jelinek wrote: > Hi! > > The PR88587 fix changes DECL_MODE of vars with vector type during > inlining/cloning > when the vars are copied, so that their DECL_MODE matches their TYPE_MODE in > the new function. Unfortunately, the following testcase still ICEs, the var >

[PATCH] fold-const: Don't use build_constructor for non-aggregate types in native_encode_initializer [PR93121]

2020-12-04 Thread Jakub Jelinek via Gcc-patches
Hi! The following testcase is rejected, because when trying to encode a zeroing CONSTRUCTOR, the code was using build_constructor to build initializers for the elements but when recursing the function handles CONSTRUCTOR only for aggregate types. The following patch fixes that by using

[PATCH] testsuite: Fix various scan-assembler-symbol-section issues

2020-12-04 Thread Rainer Orth
I recently started looking into scan-assembler-symbol-section since all tests using it were FAILing on Solaris/SPARC. Unfortuntely, the more I looked the more issues I found, both with the implementation and the interface. This patch addresses some of those, but there are quite a number of open

[PATCH] debug: Fix another vector DECL_MODE ICE [PR98100]

2020-12-04 Thread Jakub Jelinek via Gcc-patches
Hi! The PR88587 fix changes DECL_MODE of vars with vector type during inlining/cloning when the vars are copied, so that their DECL_MODE matches their TYPE_MODE in the new function. Unfortunately, the following testcase still ICEs, the var isn't really used in the new function and so it isn't

[PATCH 8/8 v4] The Great STL migration

2020-12-04 Thread Erick Ochoa
--- gcc/ipa-dfe.c | 262 +++--- gcc/ipa-dfe.h | 108 +++--- gcc/ipa-field-reorder.c| 134 +++ gcc/ipa-type-escape-analysis.c | 636 - gcc/ipa-type-escape-analysis.h | 160 - 5 files changed, 643

[PATCH 7/8 v4] Add tests

2020-12-04 Thread Erick Ochoa
--- gcc/common.opt| 4 ++ gcc/ipa-type-escape-analysis.c| 11 + .../ipa/ipa-access-counter-00-simple-read-0.c | 22 ++ .../ipa-access-counter-01-simple-write-0.c| 22 ++ .../ipa-access-counter-02-pointer-read-0.c| 22

[PATCH 6/8 v4] Add heuristic to take into account void* pattern.

2020-12-04 Thread Erick Ochoa
We add a heuristic in order to be able to transform functions which receive void* arguments as a way to generalize over arguments. An example of this is qsort. The heuristic works by first inspecting leaves in the call graph. If the leaves only contain a reference to a single RECORD_TYPE then

[PATCH 5/8 v4] Abort if Gimple from C++ or Fortran sources is found.

2020-12-04 Thread Erick Ochoa
2020-11-04 Erick Ochoa * ipa-field-reorder: Add flag to exit transformation. * ipa-type-escape-analysis: Same. --- gcc/ipa-field-reorder.c| 3 +- gcc/ipa-type-escape-analysis.c | 54 -- gcc/ipa-type-escape-analysis.h | 2 ++ 3 files

[PATCH 4/8 v4] Add documentation for dead field elimination

2020-12-04 Thread Erick Ochoa
2020-11-04 Erick Ochoa * Makefile.in: Add file to documentation sources. * doc/dfe.texi: New section. * doc/gccint.texi: Include new section. --- gcc/Makefile.in | 3 +- gcc/doc/dfe.texi| 187 gcc/doc/gccint.texi | 2 + 3

[PATCH 3/8 v4] Add Field Reordering

2020-12-04 Thread Erick Ochoa
Field reordering of structs at link-time 2020-11-04 Erick Ochoa * Makefile.in: Add new file to list of sources. * common.opt: Add new flag for field reordering. * passes.def: Add new pass. * tree-pass.h: Same. * ipa-field-reorder.c: New file. *

[PATCH 2/8 v4] Add Dead Field Elimination

2020-12-04 Thread Erick Ochoa
Using the Dead Field Analysis, Dead Field Elimination automatically transforms gimple to eliminate fields that are never read. 2020-11-04 Erick Ochoa * Makefile.in: Add file to list of sources. * ipa-dfe.c: New. * ipa-dfe.h: Same. * ipa-type-escape-analysis.h: Export code

[PATCH 1/8 v4] Dead-field warning in structs at LTO-time

2020-12-04 Thread Erick Ochoa
This commit includes the following components: Type-based escape analysis to determine structs that can be modified at link-time. Field access analysis to determine which fields are never read. The type-based escape analysis provides a list of types, that are not visible outside of the

[PATCH 0/8 v4] LTO Dead Field Elimination and Field Reordering

2020-12-04 Thread Erick Ochoa
Hello, I'm sharing the most recent version of dead-field elimination. In this patchset the following issues have been addressed: * CamelCase -> snake_case * STL -> GCC specific data structures * Fixed the commit messages (the last two commits will be squashed in future patchset so the commit

[PATCH][pushed] testsuite: use param for if-to-switch tests

2020-12-04 Thread Martin Liška
gcc/testsuite/ChangeLog: PR testsuite/98123 * gcc.dg/tree-ssa/if-to-switch-4.c: Add param to make the test stable on all architectures. * gcc.dg/tree-ssa/if-to-switch-6.c: Likewise. * gcc.dg/tree-ssa/if-to-switch-8.c: Likewise. ---

Re: [patch] Fix PR middle-end/98099

2020-12-04 Thread Eric Botcazou
> I think you need to add an effective-target check, because the new test > fails on aarch64/arm: Done. -- Eric Botcazou

Re: [patch] Fix PR middle-end/98099

2020-12-04 Thread Christophe Lyon via Gcc-patches
On Thu, 3 Dec 2020 at 13:33, Richard Biener via Gcc-patches wrote: > > On Thu, Dec 3, 2020 at 11:49 AM Eric Botcazou wrote: > > > > Hi, > > > > this replaces the ICE by a sorry message for the use of reverse scalar > > storage > > order with a 128-bit decimal floating-point type on 32-bit

Re: [PATCH] Hashtable PR96088

2020-12-04 Thread François Dumont via Gcc-patches
Following submission of the heterogeneous lookup in unordered containers I rebased this patch on top of it. Appart from reducing its size because of some code reuse the heterogeneous lookup had no impact on this one. This is because when I cannot find out if conversion from inserted element

Re: [stage1][PATCH] Change semantics of -frecord-gcc-switches and add -frecord-gcc-switches-format.

2020-12-04 Thread Richard Biener via Gcc-patches
march=x86-64 -g -O2 > -frecord-gcc-switches-file=/tmp/ccm3kL7d.cmdline > > 3) DWARF producer: > > DW_AT_producer: (indirect string, offset: 0x97): GNU C17 > 11.0.0 20201204 (experimental) -dumpbase-ext .c -mtune=generic -march=x86-64 > -g -O2 > > and > > D

Re: [PATCH] [X86_64]: Enable support for next generation AMD Zen3 CPU

2020-12-04 Thread Uros Bizjak via Gcc-patches
On Thu, Dec 3, 2020 at 4:29 PM Kumar, Venkataramanan wrote: > > [AMD Public Use] > > > > > Hi Maintainers, > > > > PFA, the patch that enables support for the next generation AMD Zen3 CPU via > -march=znver3. > > This is a very basic enablement patch. As of now the cost, tuning and > scheduler

Re: How to traverse all the local variables that declared in the current routine?

2020-12-04 Thread Richard Biener via Gcc-patches
On Thu, Dec 3, 2020 at 6:33 PM Richard Sandiford wrote: > > Richard Biener via Gcc-patches writes: > > On Tue, Nov 24, 2020 at 4:47 PM Qing Zhao wrote: > >> Another issue is, in order to check whether an auto-variable has > >> initializer, I plan to add a new bit in “decl_common” as: > >> /*

Re: [PATCH] [X86_64]: Enable support for next generation AMD Zen3 CPU

2020-12-04 Thread Richard Biener via Gcc-patches
On Thu, Dec 3, 2020 at 11:13 PM Jeff Law via Gcc-patches wrote: > > > > On 12/3/20 8:29 AM, Kumar, Venkataramanan via Gcc-patches wrote: > > [AMD Public Use] > > > > > > Hi Maintainers, > > > > PFA, the patch that enables support for the next generation AMD Zen3 CPU > > via -march=znver3. > >

Re: [PATCH RFA] vec: Simplify use with C++11 range-based 'for'.

2020-12-04 Thread Richard Biener via Gcc-patches
On Thu, Dec 3, 2020 at 10:46 PM Jeff Law via Gcc-patches wrote: > > > > On 12/3/20 10:53 AM, Jason Merrill via Gcc-patches wrote: > > It looks cleaner if we can use a vec* directly as a range for the C++11 > > range-based 'for' loop, without needing to indirect from it, and also works > > with

[PATCH][pushed] Document missing params.

2020-12-04 Thread Martin Liška
Pushed to master. Martin contrib/ChangeLog: * check-params-in-docs.py: use flake8 and add some tweaks to ignore aarch64 params. gcc/ChangeLog: * doc/invoke.texi: Add missing params. --- contrib/check-params-in-docs.py | 12 +- gcc/doc/invoke.texi

Re: [patch] Fix checking failure in IPA-SRA

2020-12-04 Thread Richard Biener via Gcc-patches
On Thu, Dec 3, 2020 at 8:13 PM Eric Botcazou wrote: > > Hi, > > this is a regression present on the mainline and 10 branch: on the one hand, > IPA-SRA does *not* disqualify accesses with zero size but, on the other hand, > it checks that accesses present in the tree have a (strictly) positive

Re: [stage1][PATCH] Change semantics of -frecord-gcc-switches and add -frecord-gcc-switches-format.

2020-12-04 Thread Martin Liška
-expand=30 --param ggc-min-heapsize=4096 # options passed: -dumpbase-ext .c -mtune=generic -march=x86-64 -g -O2 -frecord-gcc-switches-file=/tmp/ccm3kL7d.cmdline 3) DWARF producer: DW_AT_producer: (indirect string, offset: 0x97): GNU C17 11.0.0 20201204 (experimental) -dumpbase-ext .c

Re: [PATCH] RISC-V: Canonicalize --with-arch

2020-12-04 Thread Kito Cheng via Gcc-patches
Committed, thanks :) On Thu, Dec 3, 2020 at 8:51 AM Jim Wilson wrote: > > On Tue, Dec 1, 2020 at 12:13 AM Kito Cheng wrote: >> >> - We would like to canonicalize the arch string for --with-arch for >>easier handling multilib, so split canonicalization part to a stand >>along script to