Re: Re: [PATCH] RISC-V: Fix ICE of visiting non-existing block in CFG.

Hi, I fixed that form like you said: https://gcc.gnu.org/pipermail/gcc-patches/2022-December/609217.html juzhe.zh...@rivai.ai From: Jeff Law Date: 2022-12-28 09:11 To: 钟居哲 CC: gcc-patches; kito.cheng; palmer Subject: Re: [PATCH] RISC-V: Fix ICE of visiting non-existing block in CFG. On

[PATCH] RISC-V: Change form of iterating blocks

From: Ju-Zhe Zhong gcc/ChangeLog: * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_global_backward_infos): Change iterator form. (pass_vsetvl::prune_expressions): Change iterator form. --- gcc/config/riscv/riscv-vsetvl.cc | 18 ++ 1 file changed, 10

[PATCH] RISC-V: Fix pointer tree type for store pointer.

From: Ju-Zhe Zhong For store intrinsic, the function type should be void store (T *...) instead of void store (const T *...) gcc/ChangeLog: * config/riscv/riscv-vector-builtins.cc: Change to scalar pointer. --- gcc/config/riscv/riscv-vector-builtins.cc | 2 +- 1 file changed, 1

Re: [RFC]RISC-V: Support RV64-ILP32

I had send gcc and binutils patch to mainlist . But I only support them in newlib , not in glibc and qemu. As I know, qemu not support this now. 在 2022/12/28 9:40, Kito Cheng 写道: I would suggest you could send all necessary parts like binutils, glibc and/or qemu together future, so that we

Re: [05/13] ssa-loop-niter: skip caching of null operands

Hello, Jeff, On Dec 27, 2022, Jeff Law wrote: >> * tree-ssa-loop-niter.cc (expand_simple_operands): Refrain >> from caching NULL TREE_OPERANDs. > I must admit some curiosity about the NULL operand though. Do you > recall what kind of node had a NULL operand and whether or not that > was a

[RFC v2] Support RV64-ILP32

From: Liao Shihua patch v1 1. use ABI_LEN_SPEC instead of ABI_LEN_SPEC This patch support rv64 insn in ilp32 ABI. It was inspired by aarch64 both support 64-bit and 32-bit ABI with the same set of instructions.

Re: [RFC]RISC-V: Support RV64-ILP32

I would suggest you could send all necessary parts like binutils, glibc and/or qemu together future, so that we could easier test that? On Wed, Dec 28, 2022 at 2:25 AM Palmer Dabbelt wrote: > > On Tue, 27 Dec 2022 10:24:10 PST (-0800), gcc-patches@gcc.gnu.org wrote: > > > > > > On 12/12/22

Re: [PATCH] RISC-V: Return const ref. for vl_vtype_info: get_avl_info

committed, thanks :) On Wed, Dec 28, 2022 at 7:05 AM juzhe.zhong wrote: > LGTM. > Replied Message > From Kito Cheng > Date 12/27/2022 23:21 > To gcc-patches@gcc.gnu.org > , > kito.ch...@gmail.com , > jim.wilson@gmail.com > , > pal...@dabbelt.com , > and...@sifive.com , >

Re: [PATCH] RISC-V: Fix ICE of visiting non-existing block in CFG.

oops, I just committed this yesterday, anyway, I think we can always have further patches to improve that. On Wed, Dec 28, 2022 at 9:12 AM Jeff Law via Gcc-patches wrote: > > > > On 12/27/22 17:24, 钟居哲 wrote: > > OK, I will change that after I finished my current work. > Sounds good. Thanks. >

Re: [x86 PATCH] Provide zero_extend versions/variants of several patterns.

On 12/27/22 18:15, Roger Sayle wrote: Back in September, the review of my patch for PR rtl-optimization/106594, https://gcc.gnu.org/pipermail/gcc-patches/2022-September/601501.html suggested that I submit the x86 backend bits, independently and first. The executive summary is that the

[x86 PATCH] Provide zero_extend versions/variants of several patterns.

Back in September, the review of my patch for PR rtl-optimization/106594, https://gcc.gnu.org/pipermail/gcc-patches/2022-September/601501.html suggested that I submit the x86 backend bits, independently and first. The executive summary is that the middle-end doesn't have a preferred canonical

Re: [PATCH] RISC-V: Fix ICE of visiting non-existing block in CFG.

On 12/27/22 17:24, 钟居哲 wrote: OK, I will change that after I finished my current work. Sounds good. Thanks. Jeff

Re: Re: [PATCH] RISC-V: Fix ICE for avl_info deprecated copy and pp_print error.

Committed. On Sun, Dec 25, 2022 at 6:42 AM 钟居哲 wrote: > > I just want to make sure. You mean the bootstrap can pass now with this patch? > If yes, plz merge this patch. Thank you so much. > > > > juzhe.zh...@rivai.ai > > From: Andreas Schwab > Date: 2022-12-25 00:58 > To: juzhe.zhong > CC:

[x86_64 PATCH] Add post-reload splitter for extendditi2.

This is another step towards a possible solution for PR 105137. This patch introduces a define_insn_and_split for extendditi2, that allows DImode to TImode sign-extension to be represented in the early RTL optimizers, before being split post-reload into the exact same idiom as currently produced

Re: Re: [PATCH] RISC-V: Fix ICE of visiting non-existing block in CFG.

OK, I will change that after I finished my current work. juzhe.zh...@rivai.ai From: Jeff Law Date: 2022-12-28 08:06 To: juzhe.zhong CC: gcc-patches@gcc.gnu.org; kito.ch...@gmail.com; pal...@dabbelt.com Subject: Re: [PATCH] RISC-V: Fix ICE of visiting non-existing block in CFG. On 12/27/22

[x86 PATCH] Use ix86_expand_clear in ix86_split_ashl.

This patch is a one line change, to call ix86_expand_clear instead of emit_move_insn with const0_rtx in ix86_split_ashl, allowing the backend to use an xor instruction to clear a register if appropriate. The effect is demonstrated with the following function. __int128 foo(__int128 x, unsigned

Re: [PATCH] RISC-V: Fix ICE of visiting non-existing block in CFG.

On 12/27/22 16:11, juzhe.zhong wrote: You mean only change to this form you suggested in this patch？ Since in all other places of this PASS，I use RTL_SSA framework to iterate instructions and blocks. I use RTL_SSA framework to iterate blocks here to make codes look more consistent even

Re: [PATCH v2] RISC-V: Produce better code with complex constants [PR95632] [PR106602]

On 12/9/22 11:25, Raphael Moreira Zinsly wrote: Changes since v1: - Fixed formatting issues. - Added a name to the define_insn_and_split pattern. - Set the target on the 'dg-do compile' in pr106602.c. - Removed the rv32 restriction in pr95632.c. -- >8 -- Due

Re: [Bug c/108224] [PATCH] add srandom random initstate setstate

On 26/12/2022 09:19, Prathamesh Kulkarni wrote: > On Mon, 26 Dec 2022 at 14:25, Jonny Grant wrote: >> >> >> >> From 6ff344979af46dbcd739dd9068d6d595547e4c27 Mon Sep 17 00:00:00 2001 >> From: Jonathan Grant >> Date: Sun, 25 Dec 2022 22:38:44 + >> Subject: [PATCH] add srandom random

Re: [PATCH] RISC-V: Fix ICE of visiting non-existing block in CFG.

On 12/23/22 20:08, juzhe.zh...@rivai.ai wrote: From: Ju-Zhe Zhong This patch is to fix issue of visiting non-existing block of CFG. Since blocks index of CFG in GCC are not always contiguous, we will potentially visit a gap block which is no existing in the current CFG. This patch can

Re: [PATCH] RISC-V: Fix RVV mask mode size

On 12/19/22 00:44, Richard Biener wrote: On Sat, Dec 17, 2022 at 2:54 AM Jeff Law via Gcc-patches wrote: On 12/16/22 18:44, 钟居哲 wrote: Yes, VNx4DF only has 4 bit in mask mode in case of load and store. For example vlm or vsm we will load store 8-bit ??? (I am not sure hardward can load

Re: [PATCH v2 02/11] riscv: Restructure callee-saved register save/restore code

Applied to master (with the change from the reviews), thanks! Philipp. On Mon, 19 Dec 2022 at 07:30, Kito Cheng wrote: > just one more nit: Use INVALID_REGNUM as sentinel value for > riscv_next_saved_reg, otherwise LGTM, and feel free to commit that > separately :) > > On Mon, Dec 19, 2022 at

Re: [PATCH v2 01/11] riscv: attr: Synchronize comments with code

Applied to master, thanks! Philipp. On Mon, 19 Dec 2022 at 03:49, Kito Cheng wrote: > LGTM, you can commit this separately if you want :) > > On Mon, Dec 19, 2022 at 9:09 AM Christoph Muellner > wrote: > > > > From: Christoph Müllner > > > > The comment above the enumeration of existing

Re: [RFC PATCH] RISC-V: Add support for vector crypto extensions

On Tue, 27 Dec 2022 at 19:58, Palmer Dabbelt wrote: > > On Tue, 27 Dec 2022 09:35:55 PST (-0800), gcc-patches@gcc.gnu.org wrote: > > > > > > On 12/21/22 11:31, Christoph Muellner wrote: > >> From: Christoph Müllner > >> > >> This series adds basic support for the vector crypto extensions: > >> *

Re: [RFC PATCH] RISC-V: Add support for vector crypto extensions

On Tue, 27 Dec 2022 09:35:55 PST (-0800), gcc-patches@gcc.gnu.org wrote: On 12/21/22 11:31, Christoph Muellner wrote: From: Christoph Müllner This series adds basic support for the vector crypto extensions: * Zvkb * Zvkg * Zvkh[a,b] * Zvkn * Zvksed * Zvksh The implementation follows the

Re: [PATCH] RISC-V: Support VSETVL PASS for RVV support

On 12/19/22 15:59, 钟居哲 wrote: >> ISTM that if you want to run before sched2, then you'd need to introduce dependencies between the vsetvl instrutions and the vector instructions that utilize those settings? Yes, I want to run before sched2 so that we could have the chance to do the

Re: [PATCH] tree-optimization/105043: Object Size Checking docs cleanup

On 12/15/22 12:25, Siddhesh Poyarekar wrote: Break the _FORTIFY_SOURCE-specific builtins out into a separate subsection from Object Size Checking built-ins and mention _FORTIFY_SOURCE in there so that the link between the object size checking builtins, the helper builtins (e.g.

Re: [RFC]RISC-V: Support RV64-ILP32

On Tue, 27 Dec 2022 10:24:10 PST (-0800), gcc-patches@gcc.gnu.org wrote: On 12/12/22 23:49, shi...@iscas.ac.cn wrote: From: Liao Shihua This patch support rv64 insn in ilp32 ABI. It was inspired by aarch64 both support 64-bit and 32-bit ABI with the same set of instructions.

Re: [RFC]RISC-V: Support RV64-ILP32

On 12/12/22 23:49, shi...@iscas.ac.cn wrote: From: Liao Shihua This patch support rv64 insn in ilp32 ABI. It was inspired by aarch64 both support 64-bit and 32-bit ABI with the same set of instructions. gcc/ChangeLog: * config.gcc: Implememt ilp32* with rv64*.

Re: PING: New reg note REG_CFA_NORESTORE

On 12/13/22 01:55, Andreas Krebbel via Gcc-patches wrote: Hi, I need a way to save registers on the stack and generate proper CFI for it. Since I do not intend to restore them I needed a way to tell the CFI generation step about it:

Re: [13/13] hash-map: reject empty-looking insertions

On Tue, 2022-12-27 at 01:39 -0300, Alexandre Oliva via Gcc-patches wrote: > > Check, after inserting entries, that they don't look empty. Thanks for working on this - I often get this stuff wrong. Would it make sense to also add assertions that such entries aren't Traits::is_deleted? (both for

Re: GCC Patch Tracking [https://gcc.gnu.org/pipermail/gcc-patches/2022-August/599882.html]

On 12/21/22 10:36, Shinde, Yash wrote: https://gcc.gnu.org/pipermail/gcc-patches/2022-August/599882.html Submission Date- Wed, 17 Aug 2022 Upstream-Status: Submitted The given GCC patch is with it’s current status as ‘Submitted’ but still is not taken to the upstream. Please let us know

Re: [PATCH] strlen: do not use cond_expr for boundaries

On 12/23/22 08:44, Martin Liška wrote: Hi. We reach cond_expr and then we get an ICE in tree_int_cst_lt. Patch can bootstrap on x86_64-linux-gnu and survives regression tests. Ready to be installed? Thanks, Martin PR tree-optimization/108137 gcc/ChangeLog: *

Re: [RFC PATCH] RISC-V: Add support for vector crypto extensions

On 12/21/22 11:31, Christoph Muellner wrote: From: Christoph Müllner This series adds basic support for the vector crypto extensions: * Zvkb * Zvkg * Zvkh[a,b] * Zvkn * Zvksed * Zvksh The implementation follows the version 20221220 of the specification, which can be found here:

Re: [PATCH 1/1] Fixed typo in RISCV

On 12/22/22 23:06, jinma via Gcc-patches wrote: From 21904908689318ab81c630adc8cc7067e1a12488 Mon Sep 17 00:00:00 2001 From: Jin Ma Date: Fri, 23 Dec 2022 10:42:19 +0800 Subject: [PATCH 1/1] Fixed typo gcc/ChangeLog: * common/config/riscv/riscv-common.cc: Thanks. I've pushed

Re: [11/13] ada: don't map NULL decl to locus

>> When decl is NULL, don't record its mapping in the >> decl_to_instance_map. >> Regstrapped on x86_64-linux-gnu. Ok to install? >> for gcc/ada/ChangeLog >>* gcc-interface/trans.cc (Sloc_to_locus): Don't map NULL decl. > OK assuming that a NULL "decl" is valid -- you're in a much better

Re: [PATCH] regression tests for 103770 fixed on trunk

On 12/22/22 13:13, Martin Uecker via Gcc-patches wrote: This adds regression tests for an ICE on valid code that seems gone on trunk, but the cause is still unclear. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=103770 regressions tests for PR103770 This adds tests from bugzilla for

Re: [PATCH] libgfortran: Replace mutex with rwlock

On Sun, Dec 25, 2022 at 4:58 PM Steve Kargl via Gcc-patches wrote: > > On Wed, Dec 21, 2022 at 07:27:11PM -0500, Lipeng Zhu via Fortran wrote: > > This patch try to introduce the rwlock and split the read/write to > > unit_root tree and unit_cache with rwlock instead of the mutex to > > increase

[COMMITTED 1/4] xtensa: Tabify, and trim trailing spaces

From: Takayuki 'January June' Suwa Cosmetic and no functional changes. gcc/ChangeLog: * config/xtensa/elf.h: Tabify, and trim trailing spaces. * config/xtensa/linux.h: Likewise. * config/xtensa/uclinux.h: Likewise. * config/xtensa/xtensa-dynconfig.c: Likewise.

[COMMITTED] gcc: xtensa: use define_c_enums instead of define_constants

This improves RTL dumps readability. No functional changes. gcc/ * config/xtensa/xtensa.md (unspec): Extract UNSPEC_* constants into this enum. (unspecv): Extract UNSPECV_* constants into this enum. --- gcc/config/xtensa/xtensa.md | 46

[COMMITTED 2/4] xtensa: Clean up xtensa_expand_prologue

From: Takayuki 'January June' Suwa gcc/ChangeLog: * config/xtensa/xtensa.cc (xtensa_expand_prologue): Modify to exit the inspection loops as soon as the necessity of stack pointer is found. --- gcc/config/xtensa/xtensa.cc | 10 -- 1 file changed, 8

[COMMITTED 3/4] xtensa: Change GP_RETURN{, _REG_COUNT} to GP_RETURN_{FIRST, LAST}

From: Takayuki 'January June' Suwa gcc/ChangeLog: * config/xtensa/xtensa.h (GP_RETURN, GP_RETURN_REG_COUNT): Change to GP_RETURN_FIRST and GP_RETURN_LAST, respectively. * config/xtensa/xtensa.cc (xtensa_function_value, xtensa_libcall_value,

[COMMITTED 4/4] xtensa: Generate density instructions in set_frame_ptr

From: Takayuki 'January June' Suwa gcc/ChangeLog: * config/xtensa/xtensa.md (set_frame_ptr): Fix to reflect TARGET_DENSITY. --- gcc/config/xtensa/xtensa.md | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/gcc/config/xtensa/xtensa.md

Re: [PATCH] xtensa: Apply a few minor fixes

On Mon, Dec 26, 2022 at 10:30 PM Takayuki 'January June' Suwa wrote: > > Almost cosmetic and no functional changes. > > gcc/ChangeLog: > > * config/xtensa/*: Tabify, and trim trailing spaces. > * config/xtensa/xtensa.h (GP_RETURN, GP_RETURN_REG_COUNT): > Change to

Re: [09/13] [C++] constexpr: request insert iff depth is ok

On 12/26/22 21:30, Alexandre Oliva via Gcc-patches wrote: cxx_eval_call_expression requests an INSERT even in cases when it would later decide not to insert. This could break double-hashing chains. Arrange for it to use NO_INSERT when the insertion would not be completed. Regstrapped on

Re: [04/13] [C++] constraint: insert norm entry once

On 12/26/22 21:21, Alexandre Oliva via Gcc-patches wrote: Use NO_INSERT to test whether inserting should be attempted. Regstrapped on x86_64-linux-gnu. Ok to install? for gcc/cp/ChangeLog * constraint.cc (normalize_concept_check): Use NO_INSERT for pre-insertion check.

Re: [10/13] lto: drop dummy partition mapping

On 12/26/22 21:35, Alexandre Oliva via Gcc-patches wrote: When adding a catch-all partition, we map NULL to it. That mapping is ineffective and unnecessary. Drop it. Regstrapped on x86_64-linux-gnu. Ok to install? for gcc/lto/ChangeLog * lto-partition.cc (lto_1_to_1_map):

Re: [11/13] ada: don't map NULL decl to locus

On 12/26/22 21:38, Alexandre Oliva via Gcc-patches wrote: When decl is NULL, don't record its mapping in the decl_to_instance_map. Regstrapped on x86_64-linux-gnu. Ok to install? for gcc/ada/ChangeLog * gcc-interface/trans.cc (Sloc_to_locus): Don't map NULL decl. OK assuming

Re: [13/13] hash-map: reject empty-looking insertions

On 12/26/22 21:39, Alexandre Oliva via Gcc-patches wrote: Check, after inserting entries, that they don't look empty. Regstrapped on x86_64-linux-gnu. Ok to install? for gcc/ChangeLog * hash-map.h (put, get_or_insert): Check that entry does not look empty after

[committed] RISC-V: Add riscv_vector.h wrapper

Like d0bbecb1c418b680505faa998fe420f0fd4bbfc1, we add a wrapper to prevent it pull stdint.h from standard C library. gcc/testsuite: * gcc.target/riscv/rvv/vsetvl/riscv_vector.h: New. --- .../gcc.target/riscv/rvv/vsetvl/riscv_vector.h| 11 +++ 1 file changed, 11

Re: [12/13] hash set: reject attempts to add empty values

On 12/26/22 21:38, Alexandre Oliva via Gcc-patches wrote: Check, after adding a key to a hash set, that the entry does not look empty. Regstrapped on x86_64-linux-gnu. Ok to install? for gcc/ChangeLog * hash-set.h (add): Check that the inserted entry does not look

Re: [08/13] tm: complete tm_restart insertion

On 12/26/22 21:28, Alexandre Oliva via Gcc-patches wrote: Insertion of a tm_restart_node in tm_restart failed to record the newly-allocated node in the hash table. Regstrapped on x86_64-linux-gnu. Ok to install? for gcc/ChangeLog * trans-mem.cc (split_bb_make_tm_edge): Record

Re: [06/13] tree-inline decl_map: skip mapping result's NULL default def

On 12/26/22 21:23, Alexandre Oliva via Gcc-patches wrote: If a result doesn't have a default def, don't attempt to remap it. Regstrapped on x86_64-linux-gnu. Ok to install? for gcc/ChangeLog * tree-inline.cc (declare_return_variable): Don't remap NULL default def of

[PATCH] RISC-V: Return const ref. for vl_vtype_info::get_avl_info

Return const reference could prevent unnecessary copying. gcc/ * config/riscv/riscv-vsetvl.h (vl_vtype_info::get_avl_info): Return const reference rather than value. --- gcc/config/riscv/riscv-vsetvl.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

Re: [05/13] ssa-loop-niter: skip caching of null operands

On 12/26/22 21:22, Alexandre Oliva via Gcc-patches wrote: When a TREE_OPERAND is NULL, do not cache it. Regstrapped on x86_64-linux-gnu. Ok to install? for gcc/ChangeLog * tree-ssa-loop-niter.cc (expand_simple_operands): Refrain from caching NULL TREE_OPERANDs. I must

Re: [03/13] tree-inline decl_map: skip mapping NULL to itself

On 12/26/22 21:19, Alexandre Oliva via Gcc-patches wrote: Mapping a NULL key is no use, skip it. Regstrapped on x86_64-linux-gnu. Ok to install? for gcc/ChangeLog * tree-inline.cc (insert_decl_map): Skip mapping a NULL decl as value to itself. OK jeff

Re: [02/13] varpool: do not add NULL vnodes to referenced

On 12/26/22 21:18, Alexandre Oliva via Gcc-patches wrote: Avoid adding NULL vnodes to referenced tables. Regstrapped on x86_64-linux-gnu. Ok to install? for gcc/ChangeLog * varpool.c (symbol_table::remove_unreferenced_decls): Do not add NULL vnodes to referenced table.

Re: [PATCH] RISC-V: Add testcases for VSETVL PASS

It should be same issue as https://github.com/gcc-mirror/gcc/commit/d0bbecb1c418b680505faa998fe420f0fd4bbfc1, I gonna commit a fix for that. On Tue, Dec 27, 2022 at 11:04 PM Jeff Law via Gcc-patches wrote: > > > > On 12/26/22 02:20, Andreas Schwab wrote: > > FAIL:

Re: [07/13] postreload-gcse: no insert on mere lookup

On 12/26/22 21:24, Alexandre Oliva via Gcc-patches wrote: lookup_expr_in_table is not used for insertions, but it mistakenly used INSERT rather than NO_INSERT. Regstrapped on x86_64-linux-gnu. Ok to install? for gcc/ChangeLog * postreload-gcse.cc (lookup_expr_in_table): Use

Re: [01/13] scoped tables: insert before further lookups

On 12/26/22 21:17, Alexandre Oliva via Gcc-patches wrote: Avoid hash table lookups between requesting an insert and storing the inserted value in avail_exprs_stack. Lookups before the insert is completed could fail to find double-hashed elements. Regstrapped on x86_64-linux-gnu. Ok to

Re: [PATCH] RISC-V: Add testcases for VSETVL PASS

On 12/26/22 02:20, Andreas Schwab wrote: FAIL: gcc.target/riscv/rvv/vsetvl/dump-1.c -O0 (test for excess errors) Excess errors: /usr/include/gnu/stubs.h:8:11: fatal error: gnu/stubs-ilp32.h: No such file or directory compilation terminated. Isn't this really an indicator that the ILP32

Re: [PATCH] loading float member of parameter stored via int registers

Hi, Jiufu Guo via Gcc-patches writes: > Hi, > > Segher Boessenkool writes: > >> On Fri, Dec 23, 2022 at 08:13:48PM +0100, Richard Biener wrote: >>> > Am 23.12.2022 um 17:55 schrieb Segher Boessenkool >>> > : >>> > There are at least six very different kinds of subreg: >>> > >>> > 0) Lvalue

Re: [patch, fortran] ICE in attr_decl1, at fortran/decl.c:8691

Hi Jerry, Am 26.12.22 um 23:26 schrieb Jerry DeLisle via Gcc-patches: The attached patch was provided by Steve Kargl. After exploring for possible other checks I settled on leaving the patch intact. Two existing test cases updated as different but sensible error messages resulted. I think

Re: [PATCH v2] rs6000: Rework option -mpowerpc64 handling [PR106680]

Hi Segher, on 2022/12/24 04:26, Segher Boessenkool wrote: > Hi! > > On Wed, Oct 12, 2022 at 04:12:21PM +0800, Kewen.Lin wrote: >> PR106680 shows that -m32 -mpowerpc64 is different from >> -mpowerpc64 -m32, this is determined by the way how we >> handle option powerpc64 in rs6000_handle_option.