Re: [PATCH] avr: Set param_min_pagesize to 0 [PR105523]

On 26/04/23, 5:51 PM, "Richard Biener" mailto:richard.guent...@gmail.com>> wrote: > On Wed, Apr 26, 2023 at 12:56 PM > wrote: > > > > On Wed, Apr 26, 2023 at 3:15 PM Richard Biener via Gcc-patches > > mailto:gcc-patches@gcc.gnu.org>> wrote: > > > > > >

[RFC V2] RISC-V : Support rv64 ilp32

This patch support ilp32 on rv64. It remove option check when -march=rv64* -mabi=ilp32. And replace XLEN_SPEC in LINK_SPEC by ABI_LEN_SPEC. In addition, it some machine descriptions. The series kernel support in this link.

[PATCH 1/2] Improve do_store_flag for single bit comparison against 0

While working something else, I noticed we could improve the following function code generation: ``` unsigned f(unsigned t) { if (t & ~(1<<30)) __builtin_unreachable(); return t != 0; } ``` Right know we just emit a comparison against 0 instead of just a shift right by 30. There is code in

[PATCH 2/2] Improve do_store_flag for comparing single bit against that bit

This is a case which I noticed while working on the previous patch. Sometimes we end up with `a == CST` instead of comparing against 0. This happens in the following code: ``` unsigned f(unsigned t) { if (t & ~(1<<30)) __builtin_unreachable(); t ^= (1<<30); return t != 0; } ``` We should

[committed] c: Do not allow thread-local tentative definitions for C2x

C2x makes it clear that thread-local declarations can never be tentative definitions (the legacy feature of C where you can e.g. do "int i;" more than once at file scope, possibly with one of the declarations initialized, and it counts as exactly one definition), but are always definitions in the

Re: RISC-V Test Errors and Failures

On 5/17/23 00:52, Andreas Schwab wrote: On Mai 16 2023, Vineet Gupta wrote: Yes I was seeing similar tcl errors and such - and in my case an even higher count. They are coming from commit d6654a4be3b. As of a726d007f197 today I get a gazzilion splat for riscv multilib dejagnu runs and

Re: [PING] [C PATCH] Fix ICEs related to VM types in C [PR106465, PR107557, PR108423, PR109450]

On Thu, 18 May 2023, Martin Uecker via Gcc-patches wrote: > + /* we still have to evaluate size expressions */ Comments should start with a capital letter and end with ". ". > diff --git a/gcc/testsuite/gcc.dg/nested-vla-1.c > b/gcc/testsuite/gcc.dg/nested-vla-1.c > new file mode 100644

Re: [PATCH] rs6000: Fix __builtin_vec_xst_trunc definition

Peter: On Thu, 2023-05-18 at 16:28 -0500, Peter Bergner wrote: > > > > + void __builtin_vec_xst_trunc (vsq, signed long long, signed long > > *); > > +TR_STXVRLX TR_STXVRLX_S > > + void __builtin_vec_xst_trunc (vuq, signed long long, unsigned > > long *); > > +TR_STXVRLX

Re: [PATCH] rs6000: Fix __builtin_vec_xst_trunc definition

On 5/10/23 1:06 PM, Carl Love wrote: > - void __builtin_altivec_tr_stxvrhx (vsq, signed long, signed int *); > + void __builtin_altivec_tr_stxvrhx (vsq, signed long, signed short *); > TR_STXVRHX vsx_stxvrhx {stvec} > > - void __builtin_altivec_tr_stxvrwx (vsq, signed long, signed short

[PATCH v2] rs6000: Add buildin for mffscrn instructions

GCC maintainers: version 2. Fixed an issue with the test case. The dg-options line was missing. The following patch adds an overloaded builtin. There are two possible arguments for the builtin. The builtin definitions are: double __builtin_mffscrn (unsigned long int); double

[PATCH] c-family: implement -ffp-contract=on

Implement -ffp-contract=on for C and C++ without changing default behavior (=off for -std=cNN, =fast for C++ and -std=gnuNN). gcc/c-family/ChangeLog: * c-gimplify.cc (fma_supported_p): New helper. (c_gimplify_expr) [PLUS_EXPR, MINUS_EXPR]: Implement FMA contraction.

[PATCH] RISC-V: improve codegen for large constants with same 32-bit lo and hi parts [2]

[part #2 of PR/109279] SPEC2017 deepsjeng uses large constants which currently generates less than ideal code. This fix improves codegen for large constants which have same low and hi parts: e.g. long long f(void) { return 0x0101010101010101ull; } Before li a5,0x101

Re: [PATCH 01/14] ada: use _P() defines from tree.h

On Sun, 14 May 2023 17:03:55 -0600 Jeff Law wrote: > On 5/13/23 17:23, Bernhard Reutner-Fischer via Gcc-patches wrote: > > From: Bernhard Reutner-Fischer > > > > gcc/ada/ChangeLog: > > > > * gcc-interface/decl.cc (gnat_to_gnu_entity): Use _P defines > The series as a whole is OK.

Re: [PATCH 01/14] ada: use _P() defines from tree.h

On Mon, 15 May 2023 12:05:10 +0200 Eric Botcazou wrote: > > && DECL_RETURN_VALUE_P (inner)) > > diff --git a/gcc/ada/gcc-interface/utils.cc b/gcc/ada/gcc-interface/utils.cc > > index 0c4f8b90c8e..460ef6f1f01 100644 > > --- a/gcc/ada/gcc-interface/utils.cc > > +++

Re: [PATCH v2] Fortran: Narrow return types [PR78798]

On Sun, 14 May 2023 14:27:42 +0200 Mikael Morin wrote: > Le 10/05/2023 à 18:47, Bernhard Reutner-Fischer via Fortran a écrit : > > From: Bernhard Reutner-Fischer > > > > gcc/fortran/ChangeLog: > > > > PR fortran/78798 > > * array.cc (compare_bounds): Use narrower return type. > >

Re: [PATCH 08/14] fortran: use _P() defines from tree.h

Le 18/05/2023 à 17:18, Bernhard Reutner-Fischer a écrit : On Sun, 14 May 2023 15:10:12 +0200 Mikael Morin wrote: Le 14/05/2023 à 01:23, Bernhard Reutner-Fischer via Gcc-patches a écrit : From: Bernhard Reutner-Fischer gcc/fortran/ChangeLog: * trans-array.cc (is_pointer_array): Use

Re: [PATCH] c++: scoped variable template-id of reference type [PR97340]

On 5/18/23 13:59, Patrick Palka wrote: lookup_and_finish_template_variable calls convert_from_reference, which means for a variable template-id of reference type the function returns an INDIRECT_REF instead of the bare VAR_DECL. But the downstream logic of two callers, tsubst_qualified_id and

Re: [PATCH] c++: simplify norm_cache manipulation

On 5/18/23 14:01, Patrick Palka wrote: Avoid performing two norm_cache lookups during normalization of a concept-id by allocating inserting a norm_entry* before rather than after the fact, which is simpler and faster. Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look OK for

[COMMITTED] i386: Add infrastructure for QImode partial vector mult and shift operations

QImode partial vector multiplications and shifts can be implemented using their HImode counterparts. Add infrastructure to handle V8QImode and V4QImode vectors by extending (interleaving) their input operands to V8HImode, performing V8HImode operation and truncating output back to the original

Re: [PATCH] Fix internal error on small array with negative lower bound

> Am 18.05.2023 um 19:44 schrieb Eric Botcazou : > >  >> >> Would it be better to use >> >> wi::to_uhwi (wi::to_wide (local->index) - wi::to_wide (local->min_index)) >> >> to honor the actual sign of the indices? I think nothing forbids frontends >> to use a signed TYPE_DOMAIN here? But

[PATCH] c++: simplify norm_cache manipulation

Avoid performing two norm_cache lookups during normalization of a concept-id by allocating inserting a norm_entry* before rather than after the fact, which is simpler and faster. Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look OK for trunk? gcc/cp/ChangeLog: *

Re: [PATCH 1/4] Missed opportunity to use [SU]ABD

Thanks for the update. Some of these comments would have applied to the first version, so sorry for not catching them first time. writes: > From: oluade01 > > This adds a recognition pattern for the non-widening > absolute difference (ABD). > > gcc/ChangeLog: > > * doc/md.texi (sabd,

[PATCH] c++: scoped variable template-id of reference type [PR97340]

lookup_and_finish_template_variable calls convert_from_reference, which means for a variable template-id of reference type the function returns an INDIRECT_REF instead of the bare VAR_DECL. But the downstream logic of two callers, tsubst_qualified_id and finish_class_member_access_expr, expect a

Re: [PATCH V2, rs6000] Disable generation of scalar modulo instructions

Ping. On 4/18/23 7:22 AM, Pat Haugen via Gcc-patches wrote: Updated from prior patch to also disable for int128. Disable generation of scalar modulo instructions. It was recently discovered that the scalar modulo instructions can suffer noticeable performance issues for certain input values.

Re: [PATCH] Fix internal error on small array with negative lower bound

> Would it be better to use > > wi::to_uhwi (wi::to_wide (local->index) - wi::to_wide (local->min_index)) > > to honor the actual sign of the indices? I think nothing forbids frontends > to use a signed TYPE_DOMAIN here? But the difference should be always > representable in an unsigned

Re: [PATCH 2/3] Refactor widen_plus as internal_fn

How about this? Not sure about the DEF_INTERNAL documentation I rewrote in internal-fn.def, was struggling to word these, so improvements welcome! gcc/ChangeLog: 2023-04-25 Andre Vieira Joel Hutton Tamar Christina * config/aarch64/aarch64-simd.md

Re: [PATCH v1] tree-ssa-sink: Improve code sinking pass.

Hi! On Thu, May 18, 2023 at 12:44:28PM +0530, Ajit Agarwal wrote: > This patch improves code sinking pass to sink statements before call to reduce > register pressure. An example would be useful :-) > * tree-ssa-sink.cc (statement_sink_location): Modifed to > move statements before

RE: [PATCH] PR gcc/98350:Handle FMA friendly in reassoc pass

Attach CPU2017 3 run results: On ICX: 507.cactuBSSN_r: Improved by 1.7% for multi-copy . 503.bwaves_r : Improved by 0.60% for single copy . 507.cactuBSSN_r : Improved by 1.10% for single copy . 519.lbm_r : Improved by 2.21% for single copy . no measurable changes for other

[avr,committed] Fix a trivial typo in gen-avr-mmcu-specs.cc.

Applied as obvious, there was a trailing */ in a 1-line // comment. https://gcc.gnu.org/git/?p=gcc.git;a=commitdiff;h=a726d007f197d13ec80b9d625bf8bab97c96384c Johann gcc/ChangeLog * config/avr/gen-avr-mmcu-specs.cc: Remove stale */ after // comment. -- diff --git

Re: [aarch64] Code-gen for vector initialization involving constants

Prathamesh Kulkarni writes: > On Thu, 18 May 2023 at 13:37, Richard Sandiford > wrote: >> >> Prathamesh Kulkarni writes: >> > On Tue, 16 May 2023 at 00:29, Richard Sandiford >> > wrote: >> >> >> >> Prathamesh Kulkarni writes: >> >> > Hi Richard, >> >> > After committing the interleave+zip1

Re: [v2] RISC-V: Remove masking third operand of rotate instructions

On Thu, 18 May 2023 at 16:37, Joern Rennecke wrote in https://gcc.gnu.org/pipermail/gcc-patches/2023-May/618928.html : > > This breaks building libstdc++-v3 for > -march=rv32imafdcv_zicsr_zifencei_zba_zbb_zbc_zbs_zve32f_zve32x_zve64d_zve64f_zve64x_zvl128b_zvl32b_zvl64b > -mabi=ilp32f . Sorry, I

[PATCH] stor-layout, aarch64: Express SRA intrinsics with RTL codes

Hi all, This patch expresses the intrinsics for the SRA and RSRA instructions with standard RTL codes rather than relying on UNSPECs. These instructions perform a vector shift right plus accumulate with an optional rounding constant addition for the RSRA variant. There are a number of interesting

Re: [PATCH 08/14] fortran: use _P() defines from tree.h

On Sun, 14 May 2023 15:10:12 +0200 Mikael Morin wrote: > Le 14/05/2023 à 01:23, Bernhard Reutner-Fischer via Gcc-patches a écrit : > > From: Bernhard Reutner-Fischer > > > > gcc/fortran/ChangeLog: > > > > * trans-array.cc (is_pointer_array): Use _P() defines from tree.h. > >

Re: [PATCH 1/3] gcc: Fix nonportable shell syntax in "test" and "[" commands [PR105831]

On Thu, 18 May 2023 at 15:47, Bernhard Reutner-Fischer < rep.dot@gmail.com> wrote: > On 18 May 2023 14:56:45 CEST, Jonathan Wakely via Gcc-patches < > gcc-patches@gcc.gnu.org> wrote: > >From: Michael B��uerle > > > >POSIX sh does not support the == for string comparisons, use = instead. > >

Re: [PATCH 1/3] gcc: Fix nonportable shell syntax in "test" and "[" commands [PR105831]

On 18 May 2023 14:56:45 CEST, Jonathan Wakely via Gcc-patches wrote: >From: Michael B��uerle > >POSIX sh does not support the == for string comparisons, use = instead. > >gcc/ChangeLog: > > PR bootstrap/105831 > >diff --git a/gcc/configure.ac b/gcc/configure.ac >index

Re: [aarch64] Code-gen for vector initialization involving constants

On Thu, 18 May 2023 at 13:37, Richard Sandiford wrote: > > Prathamesh Kulkarni writes: > > On Tue, 16 May 2023 at 00:29, Richard Sandiford > > wrote: > >> > >> Prathamesh Kulkarni writes: > >> > Hi Richard, > >> > After committing the interleave+zip1 patch for vector initialization, > >> > it

Re: [PATCH] rs6000: Update powerpc test fold-vec-extract-int.p8.c

On 5/18/23 6:16 AM, Ajit Agarwal via Gcc-patches wrote: > -/* { dg-final { scan-assembler-times {\mrldicl\M} 7 { target { le } } } } */ > +/* { dg-final { scan-assembler-times {\mrldicl\M} 5 { target { le } } } } */ > /* { dg-final { scan-assembler-times {\mrldicl\M} 4 { target { lp64 && be } >

Re: [PATCH v2 2/3] gcc: Fix nonportable shell syntax in "test" and "[" commands [PR105831]

On Thu, May 18, 2023 at 02:03:58PM +0100, Jonathan Wakely via Gcc-patches wrote: > Fixes a fat finger error in the v1 patch, spotted by Jakub. > > -- >8 -- > > POSIX sh does not support the == for string comparisons, use = instead. > > The gen_directive_tests script uses a bash shebang so ==

Re: [PATCH 2/3] gcc: Fix nonportable shell syntax in "test" and "[" commands [PR105831]

On Thu, 18 May 2023 at 13:59, Jakub Jelinek wrote: > On Thu, May 18, 2023 at 01:56:46PM +0100, Jonathan Wakely via Gcc-patches > wrote: > > --- a/gcc/testsuite/gcc.test-framework/gen_directive_tests > > +++ b/gcc/testsuite/gcc.test-framework/gen_directive_tests > > @@ -322,8 +322,8 @@ two() { > >

[PATCH v2 2/3] gcc: Fix nonportable shell syntax in "test" and "[" commands [PR105831]

Fixes a fat finger error in the v1 patch, spotted by Jakub. -- >8 -- POSIX sh does not support the == for string comparisons, use = instead. The gen_directive_tests script uses a bash shebang so == does work, but there's no reason this script can't just use the more portable form anyway.

Re: [PATCH 3/3] contrib: Fix nonportable shell syntax in "test" and "[" commands [PR105831]

On Thu, May 18, 2023 at 01:56:47PM +0100, Jonathan Wakely via Gcc-patches wrote: > POSIX sh does not support the == for string comparisons, use = instead. > > These contrib scripts all use a bash shebang so == does work, but > there's no reason they can't just use the more portable form anyway. >

Re: [PATCH 1/3] gcc: Fix nonportable shell syntax in "test" and "[" commands [PR105831]

On Thu, May 18, 2023 at 01:56:45PM +0100, Jonathan Wakely via Gcc-patches wrote: > From: Michael B??uerle > > POSIX sh does not support the == for string comparisons, use = instead. > > gcc/ChangeLog: > > PR bootstrap/105831 > * config/nvptx/gen-opt.sh: Use = operator instead of

Re: [PATCH 2/3] gcc: Fix nonportable shell syntax in "test" and "[" commands [PR105831]

On Thu, May 18, 2023 at 01:56:46PM +0100, Jonathan Wakely via Gcc-patches wrote: > --- a/gcc/testsuite/gcc.test-framework/gen_directive_tests > +++ b/gcc/testsuite/gcc.test-framework/gen_directive_tests > @@ -322,8 +322,8 @@ two() { > echo "${GOOD_PROG}" >> $FILE1 > echo "${GOOD_PROG}" >

[PATCH 3/3] contrib: Fix nonportable shell syntax in "test" and "[" commands [PR105831]

POSIX sh does not support the == for string comparisons, use = instead. These contrib scripts all use a bash shebang so == does work, but there's no reason they can't just use the more portable form anyway. PR bootstrap/105831 contrib/ChangeLog: * bench-stringop: Use = operator

[PATCH 2/3] gcc: Fix nonportable shell syntax in "test" and "[" commands [PR105831]

POSIX sh does not support the == for string comparisons, use = instead. The gen_directive_tests script uses a bash shebang so == does work, but there's no reason this script can't just use the more portable form anyway. PR bootstrap/105831 gcc/ChangeLog: * config.gcc: Use =

[PATCH 1/3] gcc: Fix nonportable shell syntax in "test" and "[" commands [PR105831]

From: Michael Bäuerle POSIX sh does not support the == for string comparisons, use = instead. gcc/ChangeLog: PR bootstrap/105831 * config/nvptx/gen-opt.sh: Use = operator instead of ==. * configure.ac: Likewise. * configure: Regenerate. ---

[PATCH 0/3] Fix nonportable shell syntax in "test" and "[" commands

Tested powerpc64le-linux. I plan to push these as obvious, unless I hear objections. Jonathan Wakely (2): gcc: Fix nonportable shell syntax in "test" and "[" commands [PR105831] contrib: Fix nonportable shell syntax in "test" and "[" commands [PR105831] Michael Bäuerle (1): gcc:

[PING] [C PATCH] Fix ICEs related to VM types in C [PR106465, PR107557, PR108423, PR109450]

Ping. Ok, for trunk? Bootstrapped and tested on x86_64-linux-gnu with no regressions. Fix ICEs related to VM types in C [PR106465, PR107557, PR108423, PR109450] Size expressions were sometimes lost and not gimplified correctly, leading to ICEs and incorrect evaluation

Re: [PATCH] Fix internal error on small array with negative lower bound

On Thu, May 18, 2023 at 11:51 AM Eric Botcazou via Gcc-patches wrote: > > Hi, > > Ada supports arrays with negative indices, although the internal index type is > sizetype like in other languages, which is unsigned. This means that negative > values are represented by very large numbers, which

RE: [PATCH V11] VECT: Add decrement IV support in Loop Vectorizer

Synced with today(5/18/2023)'s upstream, passed the bootstrap and regression test in X86. Pan -Original Message- From: Gcc-patches On Behalf Of juzhe.zh...@rivai.ai Sent: Tuesday, May 16, 2023 6:23 PM To: gcc-patches@gcc.gnu.org Cc: richard.sandif...@arm.com; rguent...@suse.de; Ju-Zhe

[PATCH] rs6000: Update powerpc test fold-vec-extract-int.p8.c

Hello All: Update powerpc tests with extra zero_extend removal with default ree pass. Bootstrapped and Regtested on powerpc64-linux-gnu. Thanks & Regards Ajit rs6000: Update powerpc test fold-vec-extract-int.p8.c Update powerpc tests with extra zero_extend removal with default ree pass.

[PATCH] aarch64: Implement vector FP absolute compare intrinsics with builtins

Hi all, While optimising some vector math library code with intrinsics we stumbled upon the issue in the testcase. The compiler should be generating a FACGT instruction but instead we generate: foo(__Float32x4_t, __Float32x4_t, __Float32x4_t): fabsv0.4s, v0.4s adrpx0,

[commited trunk 7/9] arm testsuite: Remove reduntant tests

Following Andrea's overhaul of the MVE testsuite, these tests are now reduntant, as equivalent checks have been added to the each intrinsic's .c test. gcc/testsuite/ChangeLog: * gcc.target/arm/mve/intrinsics/mve_fp_vaddq_n.c: Removed. *

[commited trunk 9/9] arm testsuite: Shifts and get_FPSCR ACLE optimisation fixes

These newly updated tests were rewritten by Andrea. Some of them needed further manual fixing as follows: * The #shift immediate value not in the check-function-bodies as expected * The ACLE was specifying sub-optimal code: lsr+and instead of ubfx. In this case the test rewritten from the ACLE

[commited trunk 2/9] arm: Fix vstrwq* backend + testsuite

From: Andrea Corallo Hi all, this patch fixes the vstrwq* MVE instrinsics failing to emit the correct sequence of instruction due to a missing predicate. Also the immediate range is fixed to be multiples of 2 up between [-252, 252]. Best Regards Andrea gcc/ChangeLog: *

[commited trunk 8/9] arm testsuite: XFAIL or relax registers in some tests [PR109697]

Hi all, This is a simple testsuite tidy-up patch, addressing to types of errors: * The vcmp vector-scalar tests failing due to the compiler's preference of vector-vector comparisons, over vector-scalar comparisons. This is due to the lack of cost model for MVE and the compiler not knowing that

[commited trunk 4/9] arm: Stop vadcq, vsbcq intrinsics from overwriting the FPSCR NZ flags

Hi all, We noticed that calls to the vadcq and vsbcq intrinsics, both of which use __builtin_arm_set_fpscr_nzcvqc to set the Carry flag in the FPSCR, would produce the following code: ``` < r2 is the *carry input > vmrsr3, FPSCR_nzcvqc bic r3, r3, #536870912 orr r3, r3, r2, lsl #29

[commited trunk 5/9] arm: Fix overloading of MVE scalar constant parameters on vbicq

We found this as part of the wider testsuite updates. The applicable tests are authored by Andrea earlier in this patch series Ok for trunk? gcc/ChangeLog: * config/arm/arm_mve.h (__arm_vbicq): Change coerce on scalar constant. --- gcc/config/arm/arm_mve.h | 16

[committed gcc12 backport] arm: Fix overloading of MVE scalar constant parameters on vbicq, vmvnq_m

We found this as part of the wider testsuite updates. The applicable tests are authored by Andrea earlier in this patch series Ok for trunk? gcc/ChangeLog: * config/arm/arm_mve.h (__arm_vbicq): Change coerce on scalar constant. (__arm_vmvnq_m): Likewise. ---

[committed gcc12 backport] arm testsuite: Shifts and get_FPSCR ACLE optimisation fixes

These newly updated tests were rewritten by Andrea. Some of them needed further manual fixing as follows: * The #shift immediate value not in the check-function-bodies as expected * The ACLE was specifying sub-optimal code: lsr+and instead of ubfx. In this case the test rewritten from the ACLE

[committed gcc12 backport] arm testsuite: Remove reduntant tests

Following Andrea's overhaul of the MVE testsuite, these tests are now reduntant, as equivalent checks have been added to the each intrinsic's .c test. gcc/testsuite/ChangeLog: * gcc.target/arm/mve/intrinsics/mve_fp_vaddq_n.c: Removed. *

[committed gcc12 backport] arm testsuite: XFAIL or relax registers in some tests [PR109697]

Hi all, This is a simple testsuite tidy-up patch, addressing to types of errors: * The vcmp vector-scalar tests failing due to the compiler's preference of vector-vector comparisons, over vector-scalar comparisons. This is due to the lack of cost model for MVE and the compiler not knowing that

[committed gcc12 backport] arm: Stop vadcq, vsbcq intrinsics from overwriting the FPSCR NZ flags

Hi all, We noticed that calls to the vadcq and vsbcq intrinsics, both of which use __builtin_arm_set_fpscr_nzcvqc to set the Carry flag in the FPSCR, would produce the following code: ``` < r2 is the *carry input > vmrsr3, FPSCR_nzcvqc bic r3, r3, #536870912 orr r3, r3, r2, lsl #29

[committed gcc12 backport] [arm] complete vmsr/vmrs blank and case adjustments

From: Alexandre Oliva Back in September last year, some of the vmsr and vmrs patterns had an extraneous blank removed, and the case of register names lowered, but another instance remained, and so did a testcase. for gcc/ChangeLog * config/arm/vfp.md (*thumb2_movsi_vfp): Drop blank

[committed gcc12 backport] arm: Add vorrq_n overloading into vorrq _Generic

We found this as part of the wider testsuite updates. The applicable tests are authored by Andrea earlier in this patch series Ok for trunk? gcc/ChangeLog: * config/arm/arm_mve.h (__arm_vorrq): Add _n variant. --- gcc/config/arm/arm_mve.h | 10 +- 1 file changed, 9

[committed gcc12 backport] arm: Fix vstrwq* backend + testsuite

From: Andrea Corallo Hi all, this patch fixes the vstrwq* MVE instrinsics failing to emit the correct sequence of instruction due to a missing predicate. Also the immediate range is fixed to be multiples of 2 up between [-252, 252]. Best Regards Andrea gcc/ChangeLog: *

[PATCH] Fix internal error on small array with negative lower bound

Hi, Ada supports arrays with negative indices, although the internal index type is sizetype like in other languages, which is unsigned. This means that negative values are represented by very large numbers, which works with a bit of care. The attached test exposes a small loophole in

RE: [PATCH] Machine_Mode: Extend machine_mode from 8 to 16 bits

Committed with that change, thanks Richard Sandiford. Pan -Original Message- From: Richard Sandiford Sent: Thursday, May 18, 2023 4:57 PM To: Li, Pan2 Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.ch...@sifive.com; Wang, Yanzhang ; jeffreya...@gmail.com; rguent...@suse.de

Re: [PATCH] Machine_Mode: Extend machine_mode from 8 to 16 bits

pan2...@intel.com writes: > diff --git a/gcc/rtl-ssa/accesses.h b/gcc/rtl-ssa/accesses.h > index c5180b9308a..c2103a5cb5c 100644 > --- a/gcc/rtl-ssa/accesses.h > +++ b/gcc/rtl-ssa/accesses.h > @@ -215,7 +215,11 @@ private: > >// The values returned by the accessors above. >unsigned int

[PATCH 1/4] Missed opportunity to use [SU]ABD

From: oluade01 This adds a recognition pattern for the non-widening absolute difference (ABD). gcc/ChangeLog: * doc/md.texi (sabd, uabd): Document them. * internal-fn.def (ABD): Use new optab. * optabs.def (sabd_optab, uabd_optab): New optabs, *

Re: [aarch64] Code-gen for vector initialization involving constants

Prathamesh Kulkarni writes: > On Tue, 16 May 2023 at 00:29, Richard Sandiford > wrote: >> >> Prathamesh Kulkarni writes: >> > Hi Richard, >> > After committing the interleave+zip1 patch for vector initialization, >> > it seems to regress the s32 case for this patch: >> > >> > int32x4_t

[PATCH v1] tree-ssa-sink: Improve code sinking pass.

Hello All: This patch improves code sinking pass to sink statements before call to reduce register pressure. Review comments are incorporated. Bootstrapped and regtested on powerpc64-linux-gnu. Thanks & Regards Ajit tree-ssa-sink: Improve code sinking pass. Code Sinking sinks the blocks

RE: [PATCH] RISC-V: Support RVV VREINTERPRET from vbool*_t to vint*m1_t

Sorry for disturbing, update the V2 for resolving some typo and/or wording in commit log. https://gcc.gnu.org/pipermail/gcc-patches/2023-May/618882.html Pan -Original Message- From: Li, Pan2 Sent: Thursday, May 18, 2023 11:17 AM To: gcc-patches@gcc.gnu.org Cc: juzhe.zh...@rivai.ai;

[PATCH v2] RISC-V: Support RVV VREINTERPRET from vbool*_t to vint*m1_t

From: Pan Li This patch support the RVV VREINTERPRET from the vbool*_t to the vint*m1_t. Aka: vint*m1_t __riscv_vreinterpret_x_x(vbool*_t); These APIs help the users to convert vector the vbool*_t to the LMUL=1 signed integer vint*_t. According to the RVV intrinsic SPEC as below, the

[PATCH] RISC-V: Support RVV VREINTERPRET from vbool*_t to vuint*m1_t

From: Pan Li This patch support the RVV VREINTERPRET from the vbool*_t to the vuint*m1_t. Aka: vuint*m1_t __riscv_vreinterpret_x_x(vbool*_t); These APIs help the users to convert vector the vbool*_t to the LMUL=1 unsigned integer vint*_t. According to the RVV intrinsic SPEC as below, the

Re: [committed] tree-ssa-math-opts: correct -ffp-contract= check

On Wed, May 17, 2023 at 8:44 PM Alexander Monakov via Gcc-patches wrote: > > Since tree-ssa-math-opts may freely contract across statement boundaries > we should enable it only for -ffp-contract=fast instead of disabling it > for -ffp-contract=off. > > No functional change, since -ffp-contract=on

Re: [PATCH 1/2] vect: Refactor code for index == count in vect_transform_slp_perm_load_1

On Wed, May 17, 2023 at 9:19 AM Kewen.Lin wrote: > > Hi Richi, > > on 2023/5/17 14:34, Richard Biener wrote: > > On Wed, May 17, 2023 at 8:09 AM Kewen.Lin wrote: > >> > >> Hi, > >> > >> This patch is to refactor the handlings for the case (index > >> == count) in a loop of