[PATCH] [hardbool] implement OP=, ++ and --, volatile and atomics

2025-07-23 Thread Alexandre Oliva
assert (v); + + v = 1; + check_vtrue (add1 (&v)); + assert (v); + v = 1; + check_vtrue (preinc (&v)); + assert (v); + v = 1; + check_vtrue (postinc (&v)); + assert (v); + v = 1; + check_vfalse (sub1 (&v)); + assert (!v); + v = 1; + check_vfalse (predec (&v)); +

Re: [PATCH] testsuite: arm: Add effective-target vect_early_break to vect-tsvc-*

2025-07-11 Thread Alexandre Oliva
op the corresponding dg-require-effective-target directives. I also wonder whether it would make sense for check_vect_support_and_set_flags to try arm_v8_neon _ok and _hw, and go for that for the default options and actions. (*) provided that either of the identical patches that fix it get in https:/

[PATCH] [arm] prevent impossible tail- long-calls with static chain [PR119430]

2025-07-10 Thread Alexandre Oliva
) + || arm_current_function_pac_enabled_p ( { tree fntype = TREE_TYPE (TREE_TYPE (CALL_EXPR_FN (exp))); CUMULATIVE_ARGS cum; -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.nom.br/ Free Software Activist FSFLA co-founder GNU Toolchain Engineer Learn the truth about Richard Stallman at https://stallmansupport.org/

[PATCH, FYI] [vxworks] [x86] disable vxworks6 PIC on vxworks7

2025-07-07 Thread Alexandre Oliva
orks6. + This macro is only used by i386 so far. Other ports seem to keep on using + GOTTPIC from VxWorks7 on, but they don't test this macro. */ +#undef TARGET_VXWORKS_GOTTPIC +#define TARGET_VXWORKS_GOTTPIC (!TARGET_VXWORKS7) + /* On Vx6 and previous, the libraries to pick up depen

[FYI] [vxworks] add aarch64 to vxworks-dummy.h set

2025-07-07 Thread Alexandre Oliva
). case ${target} in -arm*-*-* | i[34567]86-*-* | mips*-*-* | powerpc*-*-* | sh*-*-* \ +aarch64*-*-* | arm*-*-* | i[34567]86-*-* | mips*-*-* | powerpc*-*-* | sh*-*-* \ | sparc*-*-* | x86_64-*-*) tm_file="vxworks-dummy.h ${tm_file}" ;; -- Alexandre Oliva, happy hac

[FYI] [vxworks] [ppc] match TARGET_VXWORKS64 to TARGET_64BIT

2025-07-04 Thread Alexandre Oliva
each + compilation. */ +#undef TARGET_VXWORKS64 +#define TARGET_VXWORKS64 TARGET_64BIT + /* CPP predefined macros. */ #undef TARGET_OS_CPP_BUILTINS -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.nom.br/ Free Software Activist FSFLA co-founder GNU Toolchain Engineer Mor

Re: [RFC] [lra] catch all to-sp eliminations [PR120424]

2025-06-26 Thread Alexandre Oliva
issue with reversing eliminations with sp offsets. > Thank you, Alex. You're welcome. This has been quite an adventure; the register allocation is indeed a very interesting piece of the compiler, with a fascinating amount of moving parts. Thanks for your work on it! -- Alexandre

[PATCH] [testsuite] restore default action from dfp.exp [PR120631]

2025-06-26 Thread Alexandre Oliva
e-end/120631 */ -/* { dg-do run } */ /* { dg-options "-O2" } */ _Decimal64 a = 123456789135790.0dd; -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.nom.br/ Free Software Activist FSFLA co-founder GNU Toolchain Engineer More tolerance and less prej

Re: [RFC] [lra] catch all to-sp eliminations [PR120424]

2025-06-25 Thread Alexandre Oliva
i386/i386.cc @@ -6035,6 +6035,11 @@ ix86_frame_pointer_required (void) if (crtl->profile && !flag_fentry) return true; + /* Exercise lra_update_fp2sp_elimination. + Requires -maccumulate-outgoing-args. */ + if (ix86_get_frame_size ()) +return true; + return false; } -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.nom.br/ Free Software Activist FSFLA co-founder GNU Toolchain Engineer More tolerance and less prejudice are key for inclusion and diversity. Excluding neuro-others for not behaving ""normal"" is *not* inclusive!

[PATCH] [lra] apply elimination offsets to MEM in autoinc address [PR120424]

2025-06-22 Thread Alexandre Oliva
maining case we need to consider here is -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.nom.br/ Free Software Activist FSFLA co-founder GNU Toolchain Engineer More tolerance and less prejudice are key for inclusion and diversity. Excluding neuro-others for not behaving &qu

[PATCH] [lra] rework deactivation of fp2sp elimination [PR120424]

2025-06-22 Thread Alexandre Oliva
on, so it may keep -1 as its prev_offset, and that +will make subsequent offsets incorrect. */ + ep->to_rtx = ep->from_rtx; setup_can_eliminate (ep, false); } else -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.nom.br/ Free Software Activist

[PATCH] [lra] reorder operations in lra_update_fp2sp_elimination [PR120424]

2025-06-22 Thread Alexandre Oliva
INTER_REGNUM && ep->to == STACK_POINTER_REGNUM) - setup_can_eliminate (ep, false); return n; } -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.nom.br/ Free Software Activist FSFLA co-founder GNU Toolchain Engineer More tolerance and less prejudice are key for inclusi

[RFC] [lra] catch all to-sp eliminations [PR120424]

2025-06-22 Thread Alexandre Oliva
_REGNUM]; if (ep->to == STACK_POINTER_REGNUM) { @@ -1499,7 +1499,7 @@ lra_eliminate (bool final_p, bool first_p) if (first_p) { - elimination_fp2sp_occured_p = false; + elimination_2sp_occurred_p = false; init_elimination (); } -- Alexandre Oliva

[PATCH] [genoutput] mark scratch outputs as eliminable [PR120424]

2025-06-22 Thread Alexandre Oliva
perand[opno].eliminable = 1; return; case MATCH_OPERATOR: -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.nom.br/ Free Software Activist FSFLA co-founder GNU Toolchain Engineer More tolerance and less prejudice are key for inclusion and diversity. Excluding neuro-others for not behaving ""normal"" is *not* inclusive!

[PATCH] [arm] require armv7 support for [PR120424] (was: Re: [PATCH, FYI?] [arm] [vxworks] require thumb2 for pr120424.C)

2025-06-19 Thread Alexandre Oliva
On Jun 19, 2025, Alexandre Oliva wrote: > Or maybe the requirements for this testcase should be stated as > arm_arch_v7? I'd have to add arm_arch_v7 to > check_effective_target_arm_arch_FUNC_ok et al, if there aren't reasons > why it's not there, but I'd be

[PATCH] [lra] recompute ranges upon disabling fp2sp elimination [PR120424]

2025-06-19 Thread Alexandre Oliva
(lra_reg_info[regno].live_ranges)); + } +} +} + /* Assign stack slot numbers to pseudos in array PSEUDO_REGNOS of length N. Sort pseudos in PSEUDO_REGNOS for subsequent assigning memory stack slots. */ -- Alexandre Oliva, happy hackerh

Re: [PATCH, FYI?] [arm] [vxworks] require thumb2 for pr120424.C

2025-06-18 Thread Alexandre Oliva
On Jun 18, 2025, "Richard Earnshaw (lists)" wrote: > On 18/06/2025 21:46, Alexandre Oliva wrote: >> The compiler, in kernel mode (that's implicit), rejects thumb mode: >> $ arm-wrs-vxworks7r2-gcc -march=armv7 -S whatever.c >> arm-wrs-vxworks7r2-gcc: error:

Re: [PATCH, FYI?] [arm] [vxworks] require thumb2 for pr120424.C

2025-06-18 Thread Alexandre Oliva
On Jun 18, 2025, Richard Earnshaw wrote: > On 18/06/2025 10:31, Alexandre Oliva wrote: >> On Jun 9, 2025, "Richard Earnshaw (lists)" wrote: >> >>> On 08/06/2025 14:15, Alexandre Oliva wrote: >>>> >>>> VxWorks kernel mode doesn&#x

Re: [PATCH, FYI?] [arm] [vxworks] require thumb2 for pr120424.C

2025-06-18 Thread Alexandre Oliva
On Jun 9, 2025, "Richard Earnshaw (lists)" wrote: > On 08/06/2025 14:15, Alexandre Oliva wrote: >> >> VxWorks kernel mode doesn't support thumb code, so the test fails. >> Require thumb2 support. > You already have -march=armv7, so that implies any th

Re: [PATCH] [lra] force reg update after spilling to memory [PR120424]

2025-06-16 Thread Alexandre Oliva
stalled followup fails to fix the ICE in your testing thereof? Thanks, and sorry if it was my failure to change the subject that caused confusion. -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.nom.br/ Free Software Activist FSFLA co-founder GNU Toolchain Engineer More to

[PATCH, FYI?] [arm] [vxworks] require thumb2 for pr120424.C

2025-06-08 Thread Alexandre Oliva
n-assembler-not {#-8} } } */ /* LRA register elimination gets confused when register spilling -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.nom.br/ Free Software Activist FSFLA co-founder GNU Toolchain Engineer More tolerance and less prejudice are key for inclusion and divers

Re: [PATCH] [lra] force reg update after spilling to memory [PR120424]

2025-06-06 Thread Alexandre Oliva
On Jun 6, 2025, Alexandre Oliva wrote: > Now, since lra_update_fp2sp_elimination checks that > !elimination_fp2sp_occured_p, we *could* disable the fp2sp elimination, > if it's selected, right away, so that it is not applied after we've > disabled it, and then we don

Re: [PATCH] [lra] force reg update after spilling to memory [PR120424]

2025-06-05 Thread Alexandre Oliva
NUM_ELIMINABLE_REGS]; ep++) + if (ep->from == FRAME_POINTER_REGNUM && ep->to == STACK_POINTER_REGNUM) + setup_can_eliminate (ep, false); return n; } -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.nom.br/ Free Software Activist FSFLA co-founder

Re: Fwd: [PATCH] testsuite: Fix up dg-do-if

2025-05-26 Thread Alexandre Oliva
/gcc-patches/2025-April/680779.html Maybe I should have split it out of the ppc series? ppc maintainers haven't been very responsive (to testsuite-related changes?), and it's not a ppc-specific change. I expected testsuite maintainers would have reviewed and approved it, but... not

[PATCH] [lra] force reg update after spilling to memory [PR120424]

2025-05-24 Thread Alexandre Oliva
ew file mode 100644 index 0..d0e7c28273e9c --- /dev/null +++ b/gcc/testsuite/gnat.dg/controlled9_pkg.ads @@ -0,0 +1,5 @@ +with Ada.Finalization; +package Controlled9_Pkg is + type T is new Ada.Finalization.Controlled with null record; + type T_Access is access all T; +end Controlled

[FYI] [vxworks] build partial libatomic

2025-05-22 Thread Alexandre Oliva
libatomic/configure.tgt b/libatomic/configure.tgt index 6db039d6e8bb6..606d249116af5 100644 --- a/libatomic/configure.tgt +++ b/libatomic/configure.tgt @@ -185,6 +185,10 @@ case "${target}" in nvptx*-*-*) ;; + *-*-vxworks*) +partial_libatomic=vxworks + ;; +

[PATCH v2] [aarch64] [vxworks] mark x18 as fixed, adjust tests

2025-05-22 Thread Alexandre Oliva
rame-pointer --param stack-clash-protection-guard-size=12 -fsanitize=shadow-call-stack -ffixed-x18 -fno-stack-protector" } */ +/* { dg-skip-if "conflicts with x18" { aarch64-*-vxworks* } } */ /* { dg-final { check-function-bodies "**" "" } } */ void f(int,

Re: [PATCH] [testsuite] [x86] double copysign requires -msse2

2025-05-21 Thread Alexandre Oliva
On May 20, 2025, Alexandre Oliva wrote: > (This patch, as posted, applies on top of this: > https://gcc.gnu.org/pipermail/gcc-patches/2025-May/683066.html > plus the missing bit in the followup I've just posted) Since the ppc bits are not approved (yet?), I've rebased the x

Re: [PATCH] [testsuite] [x86] memcpy-6 needs -msse2

2025-05-21 Thread Alexandre Oliva
On May 20, 2025, Alexandre Oliva wrote: > * memcpy-6.c: Bump to -msse2. I'd missed gcc.dg/ in the ChangeLog, and the checker was adamant that I ought to fix it ;-) -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.nom.br/ Free Software Activist FSFLA co

Re: [PATCH] [testsuite] tolerate missing std::stold

2025-05-21 Thread Alexandre Oliva
On May 20, 2025, Jonathan Wakely wrote: > On Tue, 20 May 2025, 05:00 Alexandre Oliva, wrote: > OK Thanks > Maybe we should just define it in terms of std::stod, so it always exists > but might not support the full accuracy of long double. That sounds desirable to me, FWIW, b

Re: [PATCH] [testsuite] [aarch64] match alt cache clear names in sme nonlocal_goto tests

2025-05-21 Thread Alexandre Oliva
On May 20, 2025, Richard Sandiford wrote: > Alexandre Oliva writes: >> -** bl __clear_cache >> +** bl .*ache.* > .* matches newlines, so how about: > bl [^\n]*[cC]ache[^\n]* > instead? OK if that works. Sure, thanks! Here's what

[PATCH] [aarch64] [vxworks] mark x18 as fixed, adjust tests

2025-05-21 Thread Alexandre Oliva
_call_stack_1.c @@ -3,4 +3,5 @@ int i; -/* { dg-error "'-fsanitize=shadow-call-stack' requires '-ffixed-x18'" "" {target "aarch64*-*-*" } 0 } */ +/* aarch64-*-vxworks has x18 as a fixed register. */ +/* { dg-error "'-fsanitize=s

[PATCH] [testsuite] [x86] memcpy-6 needs -msse2

2025-05-19 Thread Alexandre Oliva
i?86-*-* x86_64-*-* } } */ char a[32]; -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.nom.br/ Free Software Activist FSFLA co-founder GNU Toolchain Engineer More tolerance and less prejudice are key for inclusion and diversity. Excluding neuro-others for not behaving ""normal"" is *not* inclusive!

[PATCH] [testsuite] add missing require vect_early_break_hw for vect-tsvc

2025-05-19 Thread Alexandre Oliva
ask=0" } */ /* { dg-require-effective-target vect_float } */ +/* { dg-require-effective-target vect_early_break_hw } */ /* { dg-add-options vect_early_break } */ #include "tsvc.h" -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.nom.br/ Free Software Activist FS

[PATCH] [testsuite] [x86] forwprop-41 needs -msse

2025-05-19 Thread Alexandre Oliva
/testsuite/gcc.dg/tree-ssa/forwprop-41.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2 -fdump-tree-optimized -Wno-psabi -w" } */ +/* { dg-additional-options "-msse" { target i?86-*-* x86_64-*-* } } */ #define vector __attribute__((__vector_size__(16) )) -- Al

[PATCH] [testsuite] [x86] vect-simd-clone-1[678]e.c adjust

2025-05-19 Thread Alexandre Oliva
amp;& { ! lp64 } } } } } } */ + Some targets use another call for the epilogue loops. */ +/* { dg-final { scan-tree-dump-times {[\n\r] [^\n]* = foo\.simdclone} 2 "vect" { target { ! avx_runtime } } } } */ +/* { dg-final { scan-tree-dump-times {[\n\r] [^\n]* = foo\.simdclone}

[PATCH] [testsuite] [x86] no-callee-saved-16.c needs -fomit-frame-pointer

2025-05-19 Thread Alexandre Oliva
-options "-O2 -mtune-ctrl=^prologue_using_move,^epilogue_using_move" } */ +/* { dg-options "-O2 -fomit-frame-pointer -mtune-ctrl=^prologue_using_move,^epilogue_using_move" } */ typedef void (*fn_t) (void) __attribute__ ((no_callee_saved_registers)); -- Alexandre

[PATCH] [testsuite] [arm] adjust fp16-aapcs for gcc-14

2025-05-19 Thread Alexandre Oliva
r2, \[sp, #4\] -** bl swap -** ldrhr0, \[sp, #4\] @ __fp16 -** ... -*/ __fp16 F (__fp16 a, __fp16 b, __fp16 c) { -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.nom.br/ Free Software Activist FSFLA co-founder GNU Toolchain Engineer More tolerance and les

[PATCH] [gcc-14] testsuite: Improve check-function-bodies

2025-05-19 Thread Alexandre Oliva
+):$}} + set up_config(start) {{^([a-zA-Z_]\S*):$}} } # Regexp for the end of a function definition. -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.nom.br/ Free Software Activist FSFLA co-founder GNU Toolchain Engineer More tolerance and less prejudice are key

[PATCH] [testsuite] [x86] pr31985.c needs -fomit-frame-pointer to match movl count

2025-05-19 Thread Alexandre Oliva
nt c, unsigned int d) { -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.nom.br/ Free Software Activist FSFLA co-founder GNU Toolchain Engineer More tolerance and less prejudice are key for inclusion and diversity. Excluding neuro-others for not behaving ""normal"" is *not* inclusive!

[PATCH] [testsuite] [x86] pr108938-3.c needs -msse2 for bswap in foo2 with -m32

2025-05-19 Thread Alexandre Oliva
er-times "bswap\[\t ]+" 2 { target { ! ia32 } } } } */ /* { dg-final { scan-assembler-times "bswap\[\t ]+" 3 { target ia32 } } } */ -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.nom.br/ Free Software Activist FSFLA co-founder GNU Toolchain Engineer

[PATCH] [testsuite] [x86] strlenopt-80 needs -msse2 on ia32

2025-05-19 Thread Alexandre Oliva
+ { dg-additional-options "-msse2" { target i?86-*-* x86_64-*-* } } */ /* On powerpc configurations that have -mstrict-align by default, the memcpy calls for ncpylog >= 3 are not turned into MEM_REFs. -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.nom.br/ Fr

[PATCH] [testsuite] [x86] double copysign requires -msse2

2025-05-19 Thread Alexandre Oliva
ot;-O -fdump-tree-backprop-details" } */ -/* { dg-additional-options "-msse -mfpmath=sse" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */ +/* { dg-additional-options "-msse2 -mfpmath=sse" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */ /* { dg-ad

Re: [PATCH] [testsuite] [ppc] add -mpowerpc-gfxopt or -mcmpb to copysign tests

2025-05-19 Thread Alexandre Oliva
On May 8, 2025, Alexandre Oliva wrote: > * gcc.dg/fold-copysign-1.c: Add -mcmpb on ppc. Uhh, sorry, I've accidentally dropped this bit from the patch posted a couple of weeks ago. Here it is. BTW, Ping? https://gcc.gnu.org/pipermail/gcc-patches/2025-May/683066.html diff --g

[PATCH] [testsuite] require sysconf for vect-early-break_109-pr113588.c

2025-05-19 Thread Alexandre Oliva
sconf } */ /* { dg-final { scan-tree-dump "LOOP VECTORIZED" "vect" } } */ -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.nom.br/ Free Software Activist FSFLA co-founder GNU Toolchain Engineer More tolerance and less prejudice are key for inclusion

[PATCH] [testsuite] [aarch64] match alt cache clear names in sme nonlocal_goto tests

2025-05-19 Thread Alexandre Oliva
sm ** ... ** smstop sm -** bl __clear_cache +** bl .*ache.* ** smstart sm ** add x0, .* ** smstop sm -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.nom.br/ Free Software Activist FSFLA co-founder GNU Toolchain Engineer

[PATCH] [testsuite] [aarch64] use uint64_t in rwsr tests

2025-05-19 Thread Alexandre Oliva
aarch64/acle/rwsr.c b/gcc/testsuite/gcc.target/aarch64/acle/rwsr.c index 6feb0bef2d6f8..f63eb43bf7ee8 100644 --- a/gcc/testsuite/gcc.target/aarch64/acle/rwsr.c +++ b/gcc/testsuite/gcc.target/aarch64/acle/rwsr.c @@ -171,6 +171,6 @@ set_wsrf64 (double a) */ void set_custom () { - _

[PATCH] [testsuite] tolerate missing std::stold

2025-05-19 Thread Alexandre Oliva
AVE_BROKEN_STRTOLD) \ + || __DBL_MANT_DIG__ == __LDBL_MANT_DIG__ ostringstream os; long double d = 272.L; // 0x1.1p+8L; os << hexfloat << setprecision(1); @@ -140,6 +145,7 @@ test02() cout << "got: " << os.str() << endl; #endif VERIFY( os &&am

[PATCH] [testsuite] [arm] require fpic for pr115485

2025-05-19 Thread Alexandre Oliva
++.target/arm/pr115485.C @@ -1,4 +1,5 @@ /* { dg-do compile } */ +/* { dg-require-effective-target fpic } */ /* { dg-options "-fPIE -mno-pic-data-is-text-relative -mlong-calls -ffunction-sections" } */ struct c1 { -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.no

[PATCH] [testsuite] [arm] add -mno-long-calls

2025-05-19 Thread Alexandre Oliva
ctive-target arm_fp16_alternative_ok } */ -/* { dg-options "-mfloat-abi=softfp -O2" } */ +/* { dg-options "-mfloat-abi=softfp -O2 -mno-long-calls" } */ /* { dg-add-options arm_fp16_alternative } */ /* { dg-skip-if "incompatible float-abi" { arm*-*-* } { "-mfloat

[PATCH] [testsuite] [vxworks] tolerate missing __atomic_feraiseexcept

2025-05-19 Thread Alexandre Oliva
c_feraiseexcept (int excepts __attribute__ ((__unused__))) +{ +} +#endif + #define TEST_INCDEC(TYPE, VALUE, PREOP, POSTOP, PRE_P, CHANGE) \ do \ { \

[PATCH] [rs6000] add os-missing-powerpc64.h for powerpc-elf

2025-05-13 Thread Alexandre Oliva
On Apr 16, 2025, Alexandre Oliva wrote: > But I acknowledge that it's a bit of a risky proposition; I suppose it > would be more conservative to disable it uniformly on all targets, and > only enable it with -m32 when explicitly requested. I.e., make > OS_MISSING_POWERPC64 the

Re: [PATCH] [testsuite] [ppc] pr87600, pr89313: test for __PPC__ as well

2025-05-09 Thread Alexandre Oliva
On Apr 16, 2025, Alexandre Oliva wrote: > On Apr 14, 2025, Peter Bergner wrote: >> On 4/11/25 1:03 PM, Alexandre Oliva wrote: >>> gcc.dg/pr87600.h and gcc.dg/pr89313.c test for __powerpc__ and >>> __POWERPC__ to choose ppc register names, but ppc-elf defines neither;

Re: [PATCH] [testsuite] [ppc] block-cmp-8 should require powerpc64

2025-05-09 Thread Alexandre Oliva
On Apr 11, 2025, Alexandre Oliva wrote: > * gcc.target/powerpc/block-cmp-8.c: Require powerpc64 > instruction execution support. > --- a/gcc/testsuite/gcc.target/powerpc/block-cmp-8.c > +++ b/gcc/testsuite/gcc.target/powerpc/block-cmp-8.c > -/* { dg-require-e

[PATCH] [testsuite] [ppc] pr110071 requires power6 for shrink-wrapping

2025-05-08 Thread Alexandre Oliva
pping. */ +/* { dg-final { scan-rtl-dump-times "Performing shrink-wrapping" 1 "pro_and_epilogue" { target has_arch_pwr6 } } } */ -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.nom.br/ Free Software Activist FSFLA co-founder GNU Toolchain Engineer

[PATCH] add explicit ABI and align options to pr88233.c

2025-05-08 Thread Alexandre Oliva
g-final { scan-assembler-times {\mstxvd2x\M} 1 } } */ -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.nom.br/ Free Software Activist FSFLA co-founder GNU Toolchain Engineer More tolerance and less prejudice are key for inclusion and diversity. Excluding neuro-others for n

[PATCH] [testsuite] [ppc] adjust vsx-builtin-7.c xxpermdi/rldic counts

2025-05-08 Thread Alexandre Oliva
/* { dg-final { scan-assembler-times "vspltisb" 2 } } */ /* { dg-final { scan-assembler-times "vspltish" 2 } } */ /* { dg-final { scan-assembler-times "vspltisw" 2 { target be } } } */ -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.nom.

[PATCH] add explicit ABI and align options to pr88233.c

2025-05-08 Thread Alexandre Oliva
{ scan-assembler-times {\mlfd\M} 2 { target { le } } } } */ +/* { dg-final { scan-assembler-times {\mlxvd2x\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mstxvd2x\M} 1 } } */ -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.nom.br/ Free Software Activist FSFLA co-foun

[PATCH] [testsuite] [ppc] add -mpowerpc-gfxopt or -mcmpb to copysign tests

2025-05-08 Thread Alexandre Oliva
{ { i?86-*-* x86_64-*-* } && ilp32 } } } */ +/* { dg-additional-options "-mpowerpc-gfxopt" { target { powerpc*-*-* } } } */ /* { dg-do compile } */ float f(float x) { diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index 287e51bbfc661..2421ca225e8dd 100644 --

Re: [PATCH] [testsuite] [ppc] require float128 available for copysign

2025-05-08 Thread Alexandre Oliva
On Apr 11, 2025, Alexandre Oliva wrote: > for gcc/testsuite/ChangeLog > * lib/target-supports.exp (check_effective_target_ifn_copysign): > Require float128 on ppc. I hereby withdraw this patch, it was based on a misunderstanding. -- Alexandre Oliva, happy hacker

[PATCH] [vxworks] wrap base/b_NULL.h to override NULL

2025-05-08 Thread Alexandre Oliva
They're installed at the +top of the @file{include} tree, unless the optional @samp{/././} +sequence appears in the name, marking the beginning of the name under +which the header should be installed. GCC installs its own version of @code{}, from @file{ginclude/float.h}. This is done to cope w

[PATCH] [testsuite] [vxworks] skip macros from implicitly-included vxConfig.h

2025-05-08 Thread Alexandre Oliva
]*} module } } +// { dg-final { scan-lang-dump-not {Writing macro #define [a-z][_a-zA-Z0-9]* at [0-9]*} module } } -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.nom.br/ Free Software Activist FSFLA co-founder GNU Toolchain Engineer More tolerance and less prejudice a

[PATCH] libstdc++-v3: testsuite: lengthen stop_request wait_until timeout

2025-05-08 Thread Alexandre Oliva
e src; - auto abst = std::chrono::steady_clock::now() + 1.0s; + auto abst = std::chrono::steady_clock::now() + (ck ? 5.0s : 1.0s); auto tok = src.get_token(); std::thread t([ck, &ready, &mtx, &cv, abst, tok] { -- Alexandre Oliva, happy hackerhttps://blo

[PATCH] [testsuite] [ppc] expect vectorization in gen-vect-11c.c

2025-05-08 Thread Alexandre Oliva
-/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { xfail amdgcn*-*-* } } } */ +/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { xfail amdgcn*-*-* powerpc*-*-* } } } */ -- Alexandre Oliva, happy hackerhttps:/

[PATCH] [testsuite] [ppc] disable strict align for block-cmp-[14].c

2025-05-08 Thread Alexandre Oliva
target be } } */ -/* { dg-options "-O2 -mdejagnu-cpu=power7" } */ +/* { dg-options "-O2 -mdejagnu-cpu=power7 -mno-strict-align" } */ /* { dg-skip-if "" { has_arch_ppc64 && ilp32 } } */ /* { dg-final { scan-assembler-not {\mb[l]? memcmp\M} } } */ -- Alexandr

[PATCH] vxworks: undefine TARGET_FORTIFY_SOURCE_DEFAULT_LEVEL

2025-05-08 Thread Alexandre Oliva
(instead of passing -flinker-output=nolto-rel). */ #undef LTO_PLUGIN_SPEC #define LTO_PLUGIN_SPEC "%{!mrtp:-plugin-opt=-linker-output-auto-nolto-rel}" + +/* Undo the linux.h definition. */ +#undef TARGET_FORTIFY_SOURCE_DEFAULT_LEVEL -- Alexandre Oliva, happy hacker

[PATCH] [testsuite] [vxworks] add -gno-strict-dwarf to pr111409.c

2025-05-08 Thread Alexandre Oliva
dg-options "-gsplit-dwarf -g3 -dA -gno-strict-dwarf" } */ /* { dg-final { scan-assembler-times {\.section\t"?\.debug_macro} 1 } } */ /* { dg-final { scan-assembler-not {\.byte\s+0x7\s*#\s*Import} } } */ -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.nom.br/

[PATCH] libstdc++-v3: testsuite: increase future/members/poll timing tolerance

2025-05-08 Thread Alexandre Oliva
bstdc++/2020-November/051422.html -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.nom.br/ Free Software Activist FSFLA co-founder GNU Toolchain Engineer More tolerance and less prejudice are key for inclusion and diversity. Excluding neuro-others for not behaving "

[PATCH] libstdc++-v3: no -latomic on vxworks

2025-05-08 Thread Alexandre Oliva
-append link_flags " -latomic " +if { [istarget *-*-vxworks*] } { + # vxworks provides libatomic as part of libc. +} else { + append link_flags " -latomic " +} if [info exists TEST_ALWAYS_FLAGS] { set atomic_saved_TEST_ALWAYS_FLAGS

[PATCH] [testsuite] [analyzer] [vxworks] define __STDC_WANT_LIB_EXT1__ to 1

2025-05-08 Thread Alexandre Oliva
#include #include -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.nom.br/ Free Software Activist FSFLA co-founder GNU Toolchain Engineer More tolerance and less prejudice are key for inclusion and diversity. Excluding neuro-others for not behaving ""normal"" is *not* inclusive!

[PATCH] [testsuite] [vxworks] netinet includes atomic, reqs c++11

2025-05-08 Thread Alexandre Oliva
-exceptions" } */ /* { dg-skip-if "" { hppa*-*-hpux* powerpc*-*-aix* } } */ +/* On vxworks, netinet/in.h indirectly includes atomic, that requires C++11. */ +/* { dg-skip-if "" { *-*-vxworks* && { c++ && { ! c++11 } } } } */ #include #include

[PATCH] vxworks: libstdc++: include ioLib.h for dup()

2025-05-08 Thread Alexandre Oliva
fault) { _GLIBCXX_BEGIN_NAMESPACE_VERSION -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.nom.br/ Free Software Activist FSFLA co-founder GNU Toolchain Engineer More tolerance and less prejudice are key for inclusion and diversity. Excluding neuro-others for not behaving ""n

[PATCH] vxworks: libgcc: include string.h for memset

2025-05-08 Thread Alexandre Oliva
__TIMESPEC_TO_NSEC(timespec) \ ((long long)timespec.tv_sec * 10 + (long long)timespec.tv_nsec) -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.nom.br/ Free Software Activist FSFLA co-founder GNU Toolchain Engineer More tolerance and less prejudice are key for inclusion and

Re: [PATCH] [testsuite] [ppc] compile [PR112822] with -mvsx

2025-04-15 Thread Alexandre Oliva
erpc-elf and I confirm that it solves the failures that motivated the initial patch in this thread. -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.nom.br/ Free Software Activist FSFLA co-founder GNU Toolchain Engineer More tolerance and less prejudice are key for inclusion

Re: [PATCH] [testsuite] [ppc] pr87600, pr89313: test for __PPC__ as well

2025-04-15 Thread Alexandre Oliva
On Apr 14, 2025, Peter Bergner wrote: > On 4/11/25 1:03 PM, Alexandre Oliva wrote: >> gcc.dg/pr87600.h and gcc.dg/pr89313.c test for __powerpc__ and >> __POWERPC__ to choose ppc register names, but ppc-elf defines neither; >> it defines __PPC__, so test for that as well. &g

Re: [PATCH] [testsuite] [ppc] block-cmp-8 should require powerpc64

2025-04-15 Thread Alexandre Oliva
On Apr 15, 2025, Peter Bergner wrote: > On 4/14/25 11:35 PM, Alexandre Oliva wrote: >>> That said, that should be done in a separate patch. >> >> *nod*. Do you mean you're going to make that change, that I should, or >> that you hope someone else will? I&#

Re: [PATCH] [testsuite] [ppc] disable -mpowerpc64 for various ilp32 asm-out checks

2025-04-15 Thread Alexandre Oliva
n knowledge about the target environment makes it safe. > https://gcc.gnu.org/PR106680 -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.nom.br/ Free Software Activist FSFLA co-founder GNU Toolchain Engineer More tolerance and less prejudice are key for inclusion and diversity. Excluding neuro-others for not behaving ""normal"" is *not* inclusive!

Re: [PATCH] [testsuite] [ppc] compile [PR112822] with -mvsx

2025-04-15 Thread Alexandre Oliva
On Apr 15, 2025, Peter Bergner wrote: > On 4/14/25 11:30 PM, Alexandre Oliva wrote: >> On Apr 14, 2025, Peter Bergner wrote: >> >>> This is an architecture independent test case, so I'm surprised this >>> doesn't FAIL on non-powerpc targets since

Re: [PATCH] [testsuite] [ppc] disable -mpowerpc64 for various ilp32 asm-out checks

2025-04-14 Thread Alexandre Oliva
st me, well, I could live with that ;-) I can see that it would make sense to only enable it if explicitly requested. Please let me know what you maintainers decide, and I'll adjust as needed. Thanks, -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.nom.br/ Free Software A

Re: [PATCH] [testsuite] [ppc] block-cmp-8 should require powerpc64

2025-04-14 Thread Alexandre Oliva
nod*. Do you mean you're going to make that change, that I should, or that you hope someone else will? I'd rather avoid duplication, and this is likely a somewhat involved change, since the string powerpc64 appears all over gcc/testsuite/, with various meanings other than a dejagnu e

Re: [PATCH] [testsuite] [ppc] compile [PR112822] with -mvsx

2025-04-14 Thread Alexandre Oliva
m just sharing the reasons why I didn't take this path. -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.nom.br/ Free Software Activist FSFLA co-founder GNU Toolchain Engineer More tolerance and less prejudice are key for inclusion and diversity. Excluding neuro-others for not behaving ""normal"" is *not* inclusive!

RISC-V: revert pr114194 tests on gcc-14 [PR118601]

2025-04-14 Thread Alexandre Oliva
+,0\([a-x0-9]+\) +** sb\t[a-x0-9]+,1\([a-x0-9]+\) +** sb\t[a-x0-9]+,2\([a-x0-9]+\) +** sb\t[a-x0-9]+,3\([a-x0-9]+\) +** sb\t[a-x0-9]+,4\([a-x0-9]+\) +** ret +*/ +void foo1_5 (void *p) +{ + __builtin_memset (p, 1, 5); +} -- Alexandre Oliva, happy hackerhttps://blog.l

RISC-V: adjust testcase for gcc-14 [PR118182]

2025-04-14 Thread Alexandre Oliva
.. -** vmv.s.x .* +** vfmv.s.f .* ** ... ** vfredusum.vs .* ** ... -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.nom.br/ Free Software Activist FSFLA co-founder GNU Toolchain Engineer More tolerance and less prejudice are key for inclusion and dive

Re: [PATCH] [riscv] vec_dup immediate constants in pred_broadcast expand [PR118182]

2025-04-13 Thread Alexandre Oliva
h stuff, it's just that FAILs often catch my attention, especially if they seem like regressions. -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.nom.br/ Free Software Activist FSFLA co-founder GNU Toolchain Engineer More tolerance and less prejudice are key for inclusion and diversity. Excluding neuro-others for not behaving ""normal"" is *not* inclusive!

[PATCH] [riscv] vec_dup immediate constants in pred_broadcast expand [PR118182]

2025-04-11 Thread Alexandre Oliva
) +operands[3] = gen_rtx_VEC_DUPLICATE (mode, operands[3]); }) (define_insn_and_split "*pred_broadcast" -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.nom.br/ Free Software Activist FSFLA co-founder GNU Toolchain Engineer More tolerance and less prejudice are key for inclusion and diversity. Excluding neuro-others for not behaving ""normal"" is *not* inclusive!

[PATCH] [testsuite] [ppc] pr87600, pr89313: test for __PPC__ as well

2025-04-11 Thread Alexandre Oliva
) # define REG "r3" #elif defined (__s390__) # define REG "0" -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.nom.br/ Free Software Activist FSFLA co-founder GNU Toolchain Engineer More tolerance and less prejudice are key for inclusion and diversity. Excluding neuro-others for not behaving ""normal"" is *not* inclusive!

[PATCH] [testsuite] [ppc] use dg-do-if in vec-mul.c

2025-04-11 Thread Alexandre Oliva
or, return if it does not match. -switch [dg-process-target-1 [lindex $args 1]] { +switch [dg-process-target-1 [lindex $args 2]] { "N" { return } "P" { return } } -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.nom.br/ Free Software Activist FSFLA co-founder GNU Toolchain Engineer More tolerance and less prejudice are key for inclusion and diversity. Excluding neuro-others for not behaving ""normal"" is *not* inclusive!

[PATCH] [testsuite] [ppc] require vsx for vec-cmpne tests

2025-04-11 Thread Alexandre Oliva
arget powerpc_vsx_ok } */ /* Test that the vec_cmpne builtin generates the expected Altivec instructions. */ -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.nom.br/ Free Software Activist FSFLA co-founder GNU Toolchain Engineer More tolerance and less prejudice a

[PATCH] [testsuite] [ppc] adjust vsx-builtin-7.c xxpermdi count for ilp32

2025-04-11 Thread Alexandre Oliva
35 { target { le && lp64 } } } } */ /* { dg-final { scan-assembler-times "vspltisb" 2 } } */ /* { dg-final { scan-assembler-times "vspltish" 2 } } */ /* { dg-final { scan-assembler-times "vspltisw" 2 { target be } } } */ -- Alexandre Oliva, happy hacker

[PATCH] [testsuite] [ppc] tolerate -mfloat128 warning in pr99708.c

2025-04-11 Thread Alexandre Oliva
t128" } */ +/* { dg-prune-output ".-mfloat128. option may not be fully supported" } */ /* * PR target/99708 -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.nom.br/ Free Software Activist FSFLA co-founder GNU Toolchain Engineer More tolerance and

[PATCH] [testsuite] [ppc] skip -msoft-float tests when testing with -mhard-float

2025-04-11 Thread Alexandre Oliva
compatible and warns it. */ /* { dg-skip-if "aix long-double-128 soft-float" { powerpc*-*-aix* } } */ /* { dg-options "-mlong-double-128 -msoft-float" } */ +/* { dg-skip-if "" { *-*-* } { "-mhard-float" } } */ /* Verify there is no ICE. */ -- Ale

[PATCH] [testsuite] [ppc] allow implicit fuction declarations in pr92661.c

2025-04-11 Thread Alexandre Oliva
supports DFP or not. */ -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.nom.br/ Free Software Activist FSFLA co-founder GNU Toolchain Engineer More tolerance and less prejudice are key for inclusion and diversity. Excluding neuro-others for not behaving ""normal"" is *not* inclusive!

[PATCH] [testsuite] [ppc] add -mno-strict-align to pr111449-1.c

2025-04-11 Thread Alexandre Oliva
-require-effective-target powerpc_vsx } */ /* Ensure vector mode is used for 16-byte by pieces equality compare. */ -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.nom.br/ Free Software Activist FSFLA co-founder GNU Toolchain Engineer More tolerance and less prejudice

[PATCH] [testsuite] [ppc] require ifunc for target_clones test

2025-04-11 Thread Alexandre Oliva
+++ b/gcc/testsuite/gcc.target/powerpc/power11-3.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-mdejagnu-cpu=power8 -O2" } */ +/* { dg-require-ifunc "" } */ /* Check if we can set the power11 target via a target_clones attribute. */ -- Alexandre

[PATCH] [testsuite] [ppc] add -maltivec to pr111380-2.c

2025-04-11 Thread Alexandre Oliva
dg-require-effective-target powerpc_altivec_ok } */ +/* { dg-options "-O2 -mno-vsx -maltivec" } */ /* Verify it emits error message on inlining even without LTO. */ -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.nom.br/ Free Software Activist FSFLA co-founder GN

[PATCH] [testsuite] [ppc] add -mdejagnu-cpu=power7 to pr17381.c

2025-04-11 Thread Alexandre Oliva
*/ double d; float test1(float fParm) -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.nom.br/ Free Software Activist FSFLA co-founder GNU Toolchain Engineer More tolerance and less prejudice are key for inclusion and diversity. Excluding neuro-others for not behaving ""normal"" is *not* inclusive!

[PATCH] [testsuite] [ppc] add -mfloat128 to pr67808.c

2025-04-11 Thread Alexandre Oliva
DOUBLE __ibm128 #elif defined(__LONG_DOUBLE_IBM128__) -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.nom.br/ Free Software Activist FSFLA co-founder GNU Toolchain Engineer More tolerance and less prejudice are key for inclusion and diversity. Excluding neuro-others for not behaving ""normal"" is *not* inclusive!

[PATCH] [testsuite] [ppc] block-cmp-8 should require powerpc64

2025-04-11 Thread Alexandre Oliva
{ target ilp32 } } */ /* { dg-options "-O2 -mpowerpc64" } */ -/* { dg-require-effective-target has_arch_ppc64 } */ +/* { dg-require-effective-target powerpc64 } */ /* { dg-timeout-factor 2 } */ /* Verify memcmp on m32 mpowerpc64 */ -- Alexandre Oliva, happy hacker

[PATCH] [testsuite] [ppc] disable -mpowerpc64 for various ilp32 asm-out checks

2025-04-11 Thread Alexandre Oliva
target { powerpc*-*-* } } } */ -/* { dg-options "-mdejagnu-cpu=power9 -mvsx" } */ +/* { dg-options "-mdejagnu-cpu=power9 -mvsx -mno-powerpc64" } */ /* { dg-require-effective-target ilp32 } */ /* { dg-require-effective-target powerpc_vsx } */ diff --git a/gcc/testsuite/gcc.target

[PATCH] [testsuite] [ppc] newlib sets FE_VXSOFT on raise FE_INVALID

2025-04-11 Thread Alexandre Oliva
ns are correctly expanded and match the expected result. -- Alexandre Oliva, happy hackerhttps://blog.lx.oliva.nom.br/ Free Software Activist FSFLA co-founder GNU Toolchain Engineer More tolerance and less prejudice are key for inclusion and diversity. Excluding neuro-others

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