Re: [PATCH] i386: Honour -mdirect-extern-access when calling __fentry__

2023-05-12 Thread Ard Biesheuvel via Gcc-patches
On Fri, 12 May 2023 at 19:05, Uros Bizjak wrote: > > On Fri, May 12, 2023 at 4:07 PM Ard Biesheuvel wrote: > > > > > > > Note that the GOT reference in question is in fact a data > > > > > > reference: we > > > > > > explicitly load the address of __fentry__ from the GOT, which > > > > > >

Re: [PATCH] i386: Honour -mdirect-extern-access when calling __fentry__

2023-05-12 Thread Ard Biesheuvel via Gcc-patches
On Thu, 11 May 2023 at 08:08, Uros Bizjak wrote: > > On Thu, May 11, 2023 at 12:04 AM H.J. Lu wrote: > > > > On Wed, May 10, 2023 at 2:17 AM Uros Bizjak wrote: > > > > > > On Tue, May 9, 2023 at 10:58 AM Ard Biesheuvel wrote: > > > > > > > > The small and medium PIC code models generate

[PATCH] i386: Honour -mdirect-extern-access when calling __fentry__

2023-05-09 Thread Ard Biesheuvel via Gcc-patches
The small and medium PIC code models generate profiling calls that always load the address of __fentry__() via the GOT, even if -mdirect-extern-access is in effect. This deviates from the behavior with respect to other external references, and results in a longer opcode that relies on linker

Re: [PING^3][PATCH,v2,1/1,AARCH64][PR102768] aarch64: Add compiler support for Shadow Call Stack

2022-01-26 Thread Ard Biesheuvel via Gcc-patches
On Wed, 26 Jan 2022 at 11:40, Dan Li wrote: > > Thanks, Ard, > > On 1/26/22 00:10, Ard Biesheuvel wrote: > > On Wed, 26 Jan 2022 at 08:53, Dan Li wrote: > >> > >> Hi, all, > >> > >> Sorry for bothering. > >> > >> I'm trying to commit aarch64 scs code to the gcc and there is an issue > >> that

Re: [PING^3][PATCH,v2,1/1,AARCH64][PR102768] aarch64: Add compiler support for Shadow Call Stack

2022-01-26 Thread Ard Biesheuvel via Gcc-patches
On Wed, 26 Jan 2022 at 08:53, Dan Li wrote: > > Hi, all, > > Sorry for bothering. > > I'm trying to commit aarch64 scs code to the gcc and there is an issue > that I'm not sure about, could someone give me some suggestions? > (To avoid noise, I did't cc PING^3 [1] to the kernel mail list :) ) > >

Re: [PATCH v6 1/1] [ARM] Add support for TLS register based stack protector canary access

2022-01-21 Thread Ard Biesheuvel via Gcc-patches
On Fri, 21 Jan 2022 at 11:47, Kyrylo Tkachov wrote: > > > -Original Message- > > From: Gcc-patches > bounces+kyrylo.tkachov=arm@gcc.gnu.org> On Behalf Of Ard > > Biesheuvel via Gcc-patches > > Sent: Wednesday, January 19, 2022 5:44 PM > > To:

Re: [PATCH v5 1/1] [ARM] Add support for TLS register based stack protector canary access

2022-01-20 Thread Ard Biesheuvel via Gcc-patches
On Wed, 19 Jan 2022 at 18:02, Ard Biesheuvel wrote: > > On Wed, 19 Jan 2022 at 17:54, Kyrylo Tkachov wrote: > > > > Hi Ard, > > > > > -Original Message- > > > From: Gcc-patches > > bounces+kyrylo.tkachov=arm....@gcc.gnu.org> On Behalf

[PATCH v6 1/1] [ARM] Add support for TLS register based stack protector canary access

2022-01-19 Thread Ard Biesheuvel via Gcc-patches
Add support for accessing the stack canary value via the TLS register, so that multiple threads running in the same address space can use distinct canary values. This is intended for the Linux kernel running in SMP mode, where processes entering the kernel are essentially threads running the same

[PATCH v6 0/1] implement TLS register based stack canary for ARM

2022-01-19 Thread Ard Biesheuvel via Gcc-patches
Bugzilla: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102352 In the Linux kernel, user processes calling into the kernel are essentially threads running in the same address space, of a program that never terminates. This means that using a global variable for the stack protector canary value is

Re: [PATCH v5 1/1] [ARM] Add support for TLS register based stack protector canary access

2022-01-19 Thread Ard Biesheuvel via Gcc-patches
On Wed, 19 Jan 2022 at 17:54, Kyrylo Tkachov wrote: > > Hi Ard, > > > -Original Message- > > From: Gcc-patches > bounces+kyrylo.tkachov=arm@gcc.gnu.org> On Behalf Of Ard > > Biesheuvel via Gcc-patches > > Sent: Monday, November 15, 2021 6:04 PM

Re: [PATCH v5 1/1] [ARM] Add support for TLS register based stack protector canary access

2022-01-14 Thread Ard Biesheuvel via Gcc-patches
(+ Richard Earnshaw) On Wed, 12 Jan 2022 at 19:29, Ard Biesheuvel wrote: > > On Wed, 17 Nov 2021 at 18:12, Ard Biesheuvel wrote: > > > > (+ Ramana) > > > > Ping? > > > On Mon, 15 Nov 2021 at 19:04, Ard Biesheuvel wrote: > > > > > > Add support for accessing the stack canary value via the TLS

Re: [PATCH v5 1/1] [ARM] Add support for TLS register based stack protector canary access

2022-01-12 Thread Ard Biesheuvel via Gcc-patches
On Wed, 17 Nov 2021 at 18:12, Ard Biesheuvel wrote: > > (+ Ramana) > Ping? > On Mon, 15 Nov 2021 at 19:04, Ard Biesheuvel wrote: > > > > Add support for accessing the stack canary value via the TLS register, > > so that multiple threads running in the same address space can use > > distinct

Re: [PATCH v4 1/1] [ARM] Add support for TLS register based stack protector canary access

2021-12-13 Thread Ard Biesheuvel via Gcc-patches
On Wed, 17 Nov 2021 at 10:09, Ramana Radhakrishnan wrote: > > Thanks Ard and Qing. > > > > I have been busy with other things in the last few weeks and I don’t work on > GCC as part of my day job : however I’ll try to find some time to review this > patch set in the coming days. > > Hello

Re: [PATCH v5 1/1] [ARM] Add support for TLS register based stack protector canary access

2021-11-17 Thread Ard Biesheuvel via Gcc-patches
(+ Ramana) On Mon, 15 Nov 2021 at 19:04, Ard Biesheuvel wrote: > > Add support for accessing the stack canary value via the TLS register, > so that multiple threads running in the same address space can use > distinct canary values. This is intended for the Linux kernel running in > SMP mode,

[PATCH v5 1/1] [ARM] Add support for TLS register based stack protector canary access

2021-11-15 Thread Ard Biesheuvel via Gcc-patches
Add support for accessing the stack canary value via the TLS register, so that multiple threads running in the same address space can use distinct canary values. This is intended for the Linux kernel running in SMP mode, where processes entering the kernel are essentially threads running the same

[PATCH v5 0/1] implement TLS register based stack canary for ARM

2021-11-15 Thread Ard Biesheuvel via Gcc-patches
Bugzilla: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102352 In the Linux kernel, user processes calling into the kernel are essentially threads running in the same address space, of a program that never terminates. This means that using a global variable for the stack protector canary value is

Re: [PATCH v4 1/1] [ARM] Add support for TLS register based stack protector canary access

2021-11-09 Thread Ard Biesheuvel via Gcc-patches
On Tue, 9 Nov 2021 at 21:45, Qing Zhao wrote: > > Hi, Ard, > > Sorry for the late reply (since I don’t have the right to approve a patch, I > has been waiting for any arm port maintainer to review this patch). > The following is the arm port maintainer information I got from MAINTAINERS > file

Re: [PATCH v4 0/1] implement TLS register based stack canary for ARM

2021-11-09 Thread Ard Biesheuvel via Gcc-patches
On Thu, 28 Oct 2021 at 13:27, Ard Biesheuvel wrote: > > Bugzilla: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102352 > > In the Linux kernel, user processes calling into the kernel are > essentially threads running in the same address space, of a program that > never terminates. This means that

[PATCH v4 1/1] [ARM] Add support for TLS register based stack protector canary access

2021-10-28 Thread Ard Biesheuvel via Gcc-patches
Add support for accessing the stack canary value via the TLS register, so that multiple threads running in the same address space can use distinct canary values. This is intended for the Linux kernel running in SMP mode, where processes entering the kernel are essentially threads running the same

[PATCH v4 0/1] implement TLS register based stack canary for ARM

2021-10-28 Thread Ard Biesheuvel via Gcc-patches
Bugzilla: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102352 In the Linux kernel, user processes calling into the kernel are essentially threads running in the same address space, of a program that never terminates. This means that using a global variable for the stack protector canary value is

[PATCH v3 1/1] [ARM] Add support for TLS register based stack protector canary access

2021-10-26 Thread Ard Biesheuvel via Gcc-patches
Add support for accessing the stack canary value via the TLS register, so that multiple threads running in the same address space can use distinct canary values. This is intended for the Linux kernel running in SMP mode, where processes entering the kernel are essentially threads running the same

[PATCH v3 0/1] implement TLS register based stack canary for ARM

2021-10-26 Thread Ard Biesheuvel via Gcc-patches
Bugzilla: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102352 In the Linux kernel, user processes calling into the kernel are essentially threads running in the same address space, of a program that never terminates. This means that using a global variable for the stack protector canary value is

Re: [RFC PATCH v2 1/1] [ARM] Add support for TLS register based stack protector canary access

2021-10-22 Thread Ard Biesheuvel via Gcc-patches
On Thu, 21 Oct 2021 at 18:51, Ard Biesheuvel wrote: > > Add support for accessing the stack canary value via the TLS register, > so that multiple threads running in the same address space can use > distinct canary values. This is intended for the Linux kernel running in > SMP mode, where

[RFC PATCH v2 1/1] [ARM] Add support for TLS register based stack protector canary access

2021-10-21 Thread Ard Biesheuvel via Gcc-patches
Add support for accessing the stack canary value via the TLS register, so that multiple threads running in the same address space can use distinct canary values. This is intended for the Linux kernel running in SMP mode, where processes entering the kernel are essentially threads running the same

[RFC PATCH v2 0/1] implement TLS register based stack canary for ARM

2021-10-21 Thread Ard Biesheuvel via Gcc-patches
Bugzilla: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102352 In the Linux kernel, user processes calling into the kernel are essentially threads running in the same address space, of a program that never terminates. This means that using a global variable for the stack protector canary value is

Re: [RFC PATCH 0/1] implement TLS register based stack canary for ARM

2021-10-21 Thread Ard Biesheuvel via Gcc-patches
On Thu, 21 Oct 2021 at 12:23, Ard Biesheuvel wrote: > > Bugzilla: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102352 > > In the Linux kernel, user processes calling into the kernel are > essentially threads running in the same address space, of a program that > never terminates. This means that

[RFC PATCH 1/1] [ARM] Add support for TLS register based stack protector canary access

2021-10-21 Thread Ard Biesheuvel via Gcc-patches
Add support for accessing the stack canary value via the TLS register, so that multiple threads running in the same address space can use distinct canary values. This is intended for the Linux kernel running in SMP mode, where processes entering the kernel are essentially threads running the same

[RFC PATCH 0/1] implement TLS register based stack canary for ARM

2021-10-21 Thread Ard Biesheuvel via Gcc-patches
Bugzilla: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102352 In the Linux kernel, user processes calling into the kernel are essentially threads running in the same address space, of a program that never terminates. This means that using a global variable for the stack protector canary value is