Re: [PATCH 2/2] ARC: Use intrinsics for __builtin_sub_overflow*()

OK, Thank you for your contribution, Claudiu On Wed, Sep 6, 2023 at 3:50 PM Shahab Vahedi wrote: > > This patch covers signed and unsigned subtractions. The generated code > would be something along these lines: > > signed: > sub.f r0, r1, r2 > b.v @label > > unsigned: > sub.f

Re: [PATCH 1/2] ARC: Use intrinsics for __builtin_add_overflow*()

Ok. Thank you for your contribution, Claudiu On Wed, Sep 6, 2023 at 3:50 PM Shahab Vahedi wrote: > > This patch covers signed and unsigned additions. The generated code > would be something along these lines: > > signed: > add.f r0, r1, r2 > b.v @label > > unsigned: > add.f r0,

Re: [PATCH] Avoid depending on destructor order

Thanks, I haven't observed it. Waiting for it, Claudiu On Mon, Sep 26, 2022 at 2:49 PM Thomas Neumann wrote: > > Hi Claudiu, > > > This change prohibits compiling of ARC backend: > > > >> + gcc_assert (in_shutdown || ob); > > > > in_shutdown is only defined when ATOMIC_FDE_FAST_PATH is

Re: [PATCH] Avoid depending on destructor order

Hi Thomas, This change prohibits compiling of ARC backend: > + gcc_assert (in_shutdown || ob); in_shutdown is only defined when ATOMIC_FDE_FAST_PATH is defined, while gcc_assert is outside of any ifdef. Please can you revisit this line and change it accordingly. Thanks, Claudiu

Re: [PATCH] arc: Fix for new ifcvt behavior [PR104154]

Hi Robin, The patch looks good. Please go ahead and merge it, please let me know if you cannot. Thank you, Claudiu On Mon, Feb 21, 2022 at 9:57 AM Robin Dapp via Gcc-patches < gcc-patches@gcc.gnu.org> wrote: > Hi, > > I figured I'd just go ahead and post this patch as well since it seems > to

Re: [committed] arc: Fail conditional move expand patterns

Hi Robin, I don't know how I missed your arc related patch, I'll bootstrap and test your patch asap. Thanks, Claudiu On Fri, Feb 25, 2022 at 3:29 PM Robin Dapp wrote: > > If the movcc comparison is not valid it triggers an assert in the > > current implementation. This behavior is not

Re: [PATCH] arc: Add --with-fpu support for ARCv2 cpus

Thanks a lot guys. Patch is pushed. //Claudiu On Mon, Jun 14, 2021 at 12:34 AM Jeff Law wrote: > > > > On 6/13/2021 4:06 AM, Bernhard Reutner-Fischer wrote: > > On Fri, 11 Jun 2021 14:25:24 +0300 > > Claudiu Zissulescu wrote: > > > >> Hi Bernhard, > >> > >> Please find attached my latest

Re: [PATCH] arc: Use separate predicated patterns for mpyd(u)

Gentle PING. On Wed, Oct 7, 2020 at 12:39 PM Claudiu Zissulescu wrote: > > From: Claudiu Zissulescu > > The compiler can match mpyd.eq r0,r1,r0 as a predicated instruction, > which is incorrect. The mpyd(u) instruction takes as input two 32-bit > registers, returning into a double 64-bit

Re: [PATCH] arc: Improve/add instruction patterns to better use MAC instructions.

Gentle PING. On Fri, Oct 9, 2020 at 5:24 PM Claudiu Zissulescu wrote: > > From: Claudiu Zissulescu > > ARC MYP7+ instructions add MAC instructions for vector and scalar data > types. This patch adds a madd pattern for 16it datum that is using the > 32bit MAC instruction, and dot_prod patterns

Re: [PATCH] [ARC] Allow more ABIs in GLIBC_DYNAMIC_LINKER

Done. Thank you for your support, Claudiu On Thu, Apr 9, 2020 at 2:38 AM Vineet Gupta wrote: > > Hi Claudiu, > > For glibc needs can this be backported to gcc-9 please ! > > Thx, > -Vineet > > On 3/31/20 3:06 AM, Claudiu Zissulescu Ianculescu wrote: > > Pushed. > > > > Thank you, > > Claudiu >

Re: [PATCH] [ARC] Allow more ABIs in GLIBC_DYNAMIC_LINKER

Pushed. Thank you, Claudiu On Sun, Mar 29, 2020 at 2:05 AM Vineet Gupta via Gcc-patches wrote: > > Enable big-endian suffixed dynamic linker per glibc multi-abi support. > > And to avoid a future churn and version pairingi hassles, also allow > arc700 although glibc for ARC currently doesn't