repeating them in my patch series.
Please pick up Jiawei's [PATCH 1/5] before picking up my patch series.
Fei Gao (1):
[RISC-V] support cm.push cm.pop cm.popret in zcmp
gcc/config/riscv/predicates.md| 148 +++
gcc/config/riscv/riscv-protos.h |2 +
g
On 2023-05-08 10:48 Kito Cheng wrote:
>
>diff --git a/gcc/config/riscv/zc.md b/gcc/config/riscv/zc.md
>new file mode 100644
>index 000..1c2f390269e
>--- /dev/null
>+++ b/gcc/config/riscv/zc.md
>@@ -0,0 +1,55 @@
>...
>+(define_insn "gpr_multi_pop"
>+ [(unspec_volatile [(match_operand 0 "c
O3/-Ofast or -Os/-Oz.
>
I see and fully agree.
I'll find a better way to resolve the conflict,
My current idea is to diasble zcmp when shrink-wrap-separate is actually
active.
Thanks Kito and Andrew Pinski for your patience.
BR,
Fei
>On Mon, May 8, 2023 at 4:54 PM Fei Gao wrote:
On 2023-05-08 16:05 Kito Cheng wrote:
>
>> > diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
>> > index 45a63cab9c9..629e5e45cac 100644
>> > --- a/gcc/config/riscv/riscv.cc
>> > +++ b/gcc/config/riscv/riscv.cc
>> > @@ -5729,7 +5729,8 @@ riscv_get_separate_components (void)
>> >
both, or delete.
BR,
Fei
>On Sat, May 6, 2023 at 4:41 PM Fei Gao wrote:
>>
>> zcmp aims to reduce code size, while shrink-wrap-separate prefers
>> speed to code size. So disable shrink-wrap-separate if zcmp
>> enabled, just like what save-restore has done.
>>
>
On 2023-05-05 23:57 Sinan wrote:
>
>> hi Jiawei
>>
>> Please ignore my previous reply. I accidently sent the email before I
>> finished it.
>> Sorry for that!
>>
>> I downloaded the series of patches from you and found in some cases
>> it fails to generate zcmp push and pop insns.
>>
>> TC:
>>
>
5513 100644
--- a/gcc/config/riscv/riscv.md
+++ b/gcc/config/riscv/riscv.md
@@ -106,6 +106,10 @@
;; Zihintpause unspec
UNSPECV_PAUSE
+ ;; zc unspecs
+ UNSPECV_GPR_MULTI_PUSH
+ UNSPECV_GPR_MULTI_POP
+
;; XTheadFmv unspec
UNSPEC_XTHEADFMV
UNSPEC_XTHEADFMV_HW
@@ -135,6 +139,8 @@
zcmp aims to reduce code size, while shrink-wrap-separate prefers
speed to code size. So disable shrink-wrap-separate if zcmp
enabled, just like what save-restore has done.
author: Zhangjin Liao liaozhang...@eswincomputing.com
gcc/ChangeLog:
* config/riscv/riscv.cc (riscv_get_separate_co
add
a0,a4,a0
cm.popret {ra,s0-s1},32
cm.popret {ra, s0-s1}, 32
Fei Gao (2):
[RISC-V] disable shrink-wrap-separate if zcmp enabled.
[RISC-V] support cm.push cm.pop cm.popret in zcmp
gcc/config/riscv/predicates.md
Currently in rv32e, stack allocation for GPR callee-saved registers is
always 12 bytes w/o save-restore. Actually, for the case without save-restore,
less stack memory can be reserved. This patch decouples stack allocation for
rv32e w/o save-restore and makes riscv_compute_frame_info more readable.
hi Jiawei
Please ignore my previous reply. I accidently sent the email before I finished
it.
Sorry for that!
I downloaded the series of patches from you and found in some cases
it fails to generate zcmp push and pop insns.
TC:
char my_getchar();
int test_s0()
{
int a = my_getchar();
hi Jiawei
I downloaded the series of patches from you and found in some cases
it fails to generate zcmp push and pop insns.
test.c
char my_getchar();
int test_s0()
{
int a = my_getchar();
int b = my_getchar();
return a+b;
}
On Thu Apr 6 06:21:17 GMT 2023 Jiawei jia.
Currently in rv32e, stack allocation for GPR callee-saved registers is
always 12 bytes w/o save-restore. Actually, for the case without save-restore,
less stack memory can be reserved. This patch decouples stack allocation for
rv32e w/o save-restore and makes riscv_compute_frame_info more readable.
ping.
BR,
Fei
On 2023-02-03 16:52 Fei Gao wrote:
>
>
>Gentle ping.
>
>The patch I previously submitted:
>| Date: Wed, 30 Nov 2022 00:38:08 -0800
>| Subject: [PATCH] RISC-V: optimize stack manipulation in save-restore
>| Message-ID:
>
>I split the patches as per
ping.
BR
Fei
On 2023-02-03 16:52 Fei Gao wrote:
>
>
>Gentle ping.
>
>The patch I previously submitted:
>| Date: Wed, 30 Nov 2022 00:38:08 -0800
>| Subject: [PATCH] RISC-V: optimize stack manipulation in save-restore
>| Message-ID:
>
>I split the patches as per
Gentle ping.
The patch I previously submitted:
| Date: Wed, 30 Nov 2022 00:38:08 -0800
| Subject: [PATCH] RISC-V: optimize stack manipulation in save-restore
| Message-ID:
I split the patches as per Palmer's review comment.
BR
Fei
>gcc/ChangeLog:
>
> * config/riscv/riscv.cc (riscv_first
Gentle ping.
The patch I previously submitted:
| Date: Wed, 30 Nov 2022 00:38:08 -0800
| Subject: [PATCH] RISC-V: optimize stack manipulation in save-restore
| Message-ID:
I split the patches as per Palmer's review comment.
BR
Fei
>The stack that save-restore reserves is not well accumulated
Gentle ping.
The patch I previously submitted:
| Date: Wed, 30 Nov 2022 00:38:08 -0800
| Subject: [PATCH] RISC-V: optimize stack manipulation in save-restore
| Message-ID:
I split the patches as per Palmer's review comment.
BR
Fei
>frame->total_size to remaining_size conversion is done as an
Gentle ping.
The patch I previously submitted:
| Date: Wed, 30 Nov 2022 00:38:08 -0800
| Subject: [PATCH] RISC-V: optimize stack manipulation in save-restore
| Message-ID:
I split the patches as per Palmer's review comment.
BR
Fei
On 2022-12-01 18:03 Fei Gao wrote:
>
>The pa
Hi Palmer and all,
I have split the patches and triggerred a new thread.
https://www.mail-archive.com/gcc-patches@gcc.gnu.org/msg297206.html
Could you please review at your convenience?
Thanks & BR,
Fei
On 2022-12-01 11:07 Fei Gao wrote:
>
>On 2022-12-01 06:50 Palmer Dabb
The patches allow less instructions to be used in stack allocation
and deallocation if save-restore enabled, and also make the stack
manipulation codes more readable.
Fei Gao (3):
RISC-V: add a new parameter in riscv_first_stack_step.
RISC-V: optimize stack manipulation in save-restore
gcc/ChangeLog:
* config/riscv/riscv.cc (riscv_first_stack_step): make codes more
readable.
(riscv_expand_epilogue): likewise.
---
gcc/config/riscv/riscv.cc | 17 ++---
1 file changed, 10 insertions(+), 7 deletions(-)
diff --git a/gcc/config/riscv/riscv.cc b/gcc/confi
frame->total_size to remaining_size conversion is done as an independent patch
without
functionality change as per review comment.
gcc/ChangeLog:
* config/riscv/riscv.cc (riscv_first_stack_step): add a new function
parameter remaining_size.
(riscv_compute_frame_info): adapt new
The stack that save-restore reserves is not well accumulated in stack
allocation and deallocation.
This patch allows less instructions to be used in stack allocation and
deallocation if save-restore enabled.
before patch:
bar:
callt0,__riscv_save_4
addisp,sp,-64
...
On 2022-12-01 06:50 Palmer Dabbelt wrote:
>
>On Wed, 30 Nov 2022 00:37:17 PST (-0800), gao...@eswincomputing.com wrote:
>> The stack that save-restore reserves is not well accumulated in stack
>> allocation and deallocation.
>> This patch allows less instructions to be used in stack allocation a
The stack that save-restore reserves is not well accumulated in stack
allocation and deallocation.
This patch allows less instructions to be used in stack allocation and
deallocation if save-restore enabled,
and also a much clear logic for save-restore stack manipulation.
before patch:
b
In current riscv stack frame allocation, 2 steps are used. The first step
allocates memories at least for callee saved GPRs and FPRs, and the second step
allocates the rest if stack size is greater than signed 12-bit range. But it's
observed in some cases, like gcc.target/riscv/stack_frame.c in
esulting in a corruption in the stack storing fs4 after interrupt context
saving and a failure to get the correct value of fs4 later.
This patch fixes issue above, adapts testcases identified in regression tests,
and add a new testcase for the change.
Fei Gao (1):
RISC-V: fix stack access b
In current riscv stack frame allocation, 2 steps are used. The first step
allocates memories at least for callee saved GPRs and FPRs, and the second step
allocates the rest if stack size is greater than signed 12-bit range. But it's
observed in some cases, like gcc.target/riscv/stack_frame.c in
esulting in a corruption in the stack storing fs4 after interrupt context
saving and a failure to get the correct value of fs4 later.
This patch fixes issue above, adapts testcases identified in regression tests,
and add a new testcase for the change.
Fei Gao (1):
RISC-V: fix stack access b
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