RE: [PATCH] [X86_64]: Enable support for next generation AMD Zen5 CPU with znver5 scheduler Model

[Public] Hi Honza, > -Original Message- > From: Jan Hubicka > Sent: Tuesday, March 12, 2024 4:11 AM > To: Anbazhagan, Karthiban > Cc: gcc-patches@gcc.gnu.org; Kumar, Venkataramanan > ; Joshi, Tejas Sanjay > ; Nagarajan, Muthu kumar raj > ; Gopalasubramanian,

RE: Zen4 tuning part 1 - cost tables

[AMD Official Use Only - General] Hi Honza, Thank you for posting the tuning patch. > -Original Message- > From: Jan Hubicka > Sent: Tuesday, December 6, 2022 3:31 PM > To: gcc-patches@gcc.gnu.org; mjam...@suse.cz; Alexander Monakov > ; Kumar, Venkataramanan > ; J

RE: [PATCH 2/2] i386: correct x87 multiplication modeling in znver.md

[AMD Official Use Only - General] Hi, Thank you for fixing this. > -Original Message- > From: Alexander Monakov > Sent: Tuesday, November 1, 2022 9:57 PM > To: gcc-patches@gcc.gnu.org > Cc: Jan Hubička ; Joshi, Tejas Sanjay > ; Kumar, Venkataramanan > ; Alexander

RE: [PATCH] [X86_64]: Enable support for next generation AMD Zen4 CPU

[AMD Official Use Only - General] Hi Alexander, Thank you for looking in to this issue. > -Original Message- > From: Alexander Monakov > Sent: Tuesday, October 25, 2022 12:18 AM > To: Jan Hubička > Cc: Kumar, Venkataramanan ; Jakub > Jelinek ; Richard Biener >

RE: [PATCH] [X86_64]: Enable support for next generation AMD Zen4 CPU

[AMD Official Use Only - General] Hi Richi and Jakub > -Original Message- > From: Jakub Jelinek > Sent: Saturday, October 22, 2022 10:41 PM > To: Richard Biener > Cc: Kumar, Venkataramanan ; Joshi, > Tejas Sanjay ; gcc-patches@gcc.gnu.org; > honza.hubi...@gm

RE: [PATCH] [X86_64]: Enable support for next generation AMD Zen4 CPU

Hi all, > -Original Message- > From: Joshi, Tejas Sanjay > Sent: Monday, October 17, 2022 8:09 PM > To: gcc-patches@gcc.gnu.org > Cc: Kumar, Venkataramanan ; > honza.hubi...@gmail.com; Uros Bizjak > Subject: RE: [PATCH] [X86_64]: Enable support for next gene

RE: [PATCH] [X86_64]: Enable support for next generation AMD Zen3 CPU

[AMD Public Use] Hi Honza, > -Original Message- > From: Jan Hubicka > Sent: Wednesday, March 31, 2021 1:27 PM > To: Kumar, Venkataramanan > Cc: Uros Bizjak ; gcc-patches@gcc.gnu.org > Subject: Re: [PATCH] [X86_64]: Enable support for next generation AMD Zen3 &

RE: [PATCH] [X86_64]: Enable support for next generation AMD Zen3 CPU

[AMD Public Use] Hi Honza, > -Original Message- > From: Jan Hubicka > Sent: Wednesday, March 31, 2021 1:15 AM > To: Kumar, Venkataramanan > Cc: Uros Bizjak ; gcc-patches@gcc.gnu.org > Subject: Re: [PATCH] [X86_64]: Enable support for next generation AMD Zen3 &

RE: znver3 tuning part 1

[AMD Public Use] Hi Honza, > -Original Message- > From: Jan Hubicka > Sent: Monday, March 22, 2021 4:31 PM > To: Kumar, Venkataramanan > Cc: gcc-patches@gcc.gnu.org; mjam...@suse.cz > Subject: Re: znver3 tuning part 1 > > [CAUTION: External Email] > >

RE: znver3 tuning part 1

[AMD Official Use Only - Internal Distribution Only] Hi Honza, Thank you for working on this. > -Original Message- > From: Gcc-patches On Behalf Of Jan > Hubicka > Sent: Monday, March 15, 2021 3:33 PM > To: gcc-patches@gcc.gnu.org; mjam...@suse.cz > Subject: znver3 tuning part 1 > >

RE: [PATCH] [X86_64]: Enable support for next generation AMD Zen3 CPU

anything to Change log files while pushing. The Change log contents are part of my commit message. Regards, Venkat. > -Original Message- > From: Gcc-patches On Behalf Of > Kumar, Venkataramanan via Gcc-patches > Sent: Saturday, December 5, 2020 1:09 PM > To: Jan Hubick

RE: [PATCH] [X86_64]: Enable support for next generation AMD Zen3 CPU

[AMD Public Use] Hi Honza, > -Original Message- > From: Jan Hubicka > Sent: Saturday, December 5, 2020 1:06 AM > To: Uros Bizjak > Cc: Kumar, Venkataramanan ; gcc- > patc...@gcc.gnu.org > Subject: Re: [PATCH] [X86_64]: Enable support for next generation AMD >

RE: [PATCH] [X86_64]: Enable support for next generation AMD Zen3 CPU

[AMD Public Use] Hi Uros, > -Original Message- > From: Uros Bizjak > Sent: Friday, December 4, 2020 11:31 PM > To: Kumar, Venkataramanan > Cc: gcc-patches@gcc.gnu.org; Jan Hubicka (hubi...@ucw.cz) > > Subject: Re: [PATCH] [X86_64]: Enable support for next gene

RE: [PATCH] [X86_64]: Enable support for next generation AMD Zen3 CPU

[AMD Public Use] Hi Uros > -Original Message- > From: Uros Bizjak > Sent: Friday, December 4, 2020 2:30 PM > To: Kumar, Venkataramanan > Cc: gcc-patches@gcc.gnu.org; Jan Hubicka (hubi...@ucw.cz) > > Subject: Re: [PATCH] [X86_64]: Enable support for next gene

RE: [PATCH] [X86_64]: Enable support for next generation AMD Zen3 CPU

[AMD Public Use] Hi Honza, > -Original Message- > From: Jan Hubicka > Sent: Friday, December 4, 2020 5:25 PM > To: Kumar, Venkataramanan > Cc: gcc-patches@gcc.gnu.org; Uros Bizjak > Subject: Re: [PATCH] [X86_64]: Enable support for next generation AMD > Z

[PATCH] [X86_64]: Enable support for next generation AMD Zen3 CPU

[AMD Public Use] Hi Maintainers, PFA, the patch that enables support for the next generation AMD Zen3 CPU via -march=znver3. This is a very basic enablement patch. As of now the cost, tuning and scheduler changes are kept same as znver2. Further changes to the cost and tunings will be done

RE: [PATCH] [X86_64]: Enable support for next generation AMD Zen3 CPU

[AMD Public Use] Thanks Uros, I forgot to change. Please ignore this thread . I will send fresh one. Regards, Venkat. -Original Message- From: Uros Bizjak Sent: Thursday, December 3, 2020 8:44 PM To: Kumar, Venkataramanan Cc: gcc-patches@gcc.gnu.org; Jan Hubicka Subject: Re

[PATCH] [X86_64]: Enable support for next generation AMD Zen3 CPU

[AMD Official Use Only - Internal Distribution Only] Hi Maintainers, PFA, the patch that enables support for the next generation AMD Zen3 CPU via -march=znver3. This is a very basic enablement patch. As of now the cost, tuning and scheduler changes are kept same as znver2. Further changes to

RE: [patch][x86_64]: AMD znver2 enablement

Hi Uros and Honza, I have committed the znver2 patch. Ref:https://gcc.gnu.org/viewcvs/gcc?limit_changes=0=revision=265775 Thanks you. regards, Venkat. > -Original Message- > From: gcc-patches-ow...@gcc.gnu.org > On Behalf Of Kumar, Venkataramanan > Sent: Sunday, November 4

RE: [patch][x86_64]: AMD znver2 enablement

Hi Uros, > -Original Message- > From: Uros Bizjak > Sent: Friday, November 2, 2018 9:06 PM > To: Kumar, Venkataramanan > Cc: gcc-patches@gcc.gnu.org; Jan Hubicka > Subject: Re: [patch][x86_64]: AMD znver2 enablement > > On Wed, Oct 31, 2018 at 6:25 AM Kumar,

[patch][x86_64]: AMD znver2 enablement

Hi Maintainers, PFA, the patch that enables support for the next generation AMD Zen CPU via -march=znver2. As of now, znver2 is using the same costs and scheduler descriptions written for znver1. We will update scheduler descriptions and costing for znver2 later as we get more information.

RE: [PATCH] Improve TRUTH_{AND,OR}IF_EXPR expansion (PR rtl-optimization/78200)

Hi Jakub, > -Original Message- > From: Jakub Jelinek <ja...@redhat.com> > Sent: Tuesday, March 27, 2018 4:43 PM > To: Kumar, Venkataramanan <venkataramanan.ku...@amd.com> > Cc: Richard Biener <rguent...@suse.de>; gcc-patches@gcc.gnu.org > Subject: Re: [

RE: [PATCH] Improve TRUTH_{AND,OR}IF_EXPR expansion (PR rtl-optimization/78200)

Hi Jakub, > -Original Message- > From: Jakub Jelinek <ja...@redhat.com> > Sent: Tuesday, March 27, 2018 2:40 PM > To: Richard Biener <rguent...@suse.de> > Cc: gcc-patches@gcc.gnu.org; Kumar, Venkataramanan > <venkataramanan.ku...@amd.com> > Subject

RE: [PATCH] Improve TRUTH_{AND,OR}IF_EXPR expansion (PR rtl-optimization/78200)

Hi Jakub, > -Original Message- > From: Jakub Jelinek <ja...@redhat.com> > Sent: Tuesday, March 27, 2018 2:40 PM > To: Richard Biener <rguent...@suse.de> > Cc: gcc-patches@gcc.gnu.org; Kumar, Venkataramanan > <venkataramanan.ku...@amd.com> > Subject

RE: [PATCH 0/5] x86: CVE-2017-5715, aka Spectre

Hi > -Original Message- > From: H.J. Lu [mailto:hjl.to...@gmail.com] > Sent: Sunday, January 14, 2018 7:52 PM > To: Jan Hubicka <hubi...@ucw.cz> > Cc: Kumar, Venkataramanan <venkataramanan.ku...@amd.com>; gcc- > patc...@gcc.gnu.org; Dharmakan, Rohit a

RE: [PATCH 2/5] x86: Add -mindirect-branch-loop=

Hi Arjan, > -Original Message- > From: Van De Ven, Arjan [mailto:arjan.van.de@intel.com] > Sent: Saturday, January 13, 2018 10:16 PM > To: David Woodhouse <dw...@infradead.org>; Kumar, Venkataramanan > <venkataramanan.ku...@amd.com>; H.J. Lu <hjl.t

RE: [PATCH 0/5] x86: CVE-2017-5715, aka Spectre

Hi HJ, > -Original Message- > From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches- > ow...@gcc.gnu.org] On Behalf Of H.J. Lu > Sent: Sunday, January 14, 2018 9:07 AM > To: gcc-patches@gcc.gnu.org > Subject: [PATCH 0/5] x86: CVE-2017-5715, aka Spectre > > This set of patches for GCC

RE: [PATCH 2/5] x86: Add -mindirect-branch-loop=

Hi All, > -Original Message- > From: H.J. Lu [mailto:hjl.to...@gmail.com] > Sent: Saturday, January 13, 2018 1:11 AM > To: Kumar, Venkataramanan <venkataramanan.ku...@amd.com> > Cc: Nagarajan, Muthu kumar raj <muthukumarraj.nagara...@amd.com>; > GCC Pa

RE: [PATCH 2/5] x86: Add -mindirect-branch-loop=

Hi HJ, > -Original Message- > From: Kumar, Venkataramanan > Sent: Friday, January 12, 2018 8:39 PM > To: 'H.J. Lu' <hjl.to...@gmail.com>; 'Martin Jambor' <mjam...@suse.cz> > Cc: Nagarajan, Muthu kumar raj <muthukumarraj.nagara...@amd.com>; > 'GCC Patch

RE: [PATCH 2/5] x86: Add -mindirect-branch-loop=

Hi all, > -Original Message- > From: Kumar, Venkataramanan > Sent: Friday, January 12, 2018 8:16 PM > To: 'H.J. Lu' <hjl.to...@gmail.com>; Martin Jambor <mjam...@suse.cz> > Cc: Nagarajan, Muthu kumar raj <muthukumarraj.nagara...@amd.com>; > GCC Patches

RE: [PATCH 2/5] x86: Add -mindirect-branch-loop=

Hi all, > -Original Message- > From: H.J. Lu [mailto:hjl.to...@gmail.com] > Sent: Friday, January 12, 2018 7:36 PM > To: Martin Jambor <mjam...@suse.cz> > Cc: Nagarajan, Muthu kumar raj <muthukumarraj.nagara...@amd.com>; > Kumar, Venkataramanan <v

RE: [RFC] [Patch X86_64]: Pass to split FMA to MUL and ADD

Hi Maarc, > -Original Message- > From: Marc Glisse [mailto:marc.gli...@inria.fr] > Sent: Tuesday, November 7, 2017 12:52 PM > To: Kumar, Venkataramanan <venkataramanan.ku...@amd.com> > Cc: gcc-patches@gcc.gnu.org; Dharmakan, Rohit arul raj > <rohitarulraj.dhar

[RFC] [Patch X86_64]: Pass to split FMA to MUL and ADD

Hi, The attached patch implements an RTL pass which splits generated FMA instruction into MUL/ADD sequence. The pass is enabled for Zen and done when we find it is profitable to split the FMA. On Zen, we found that for a tight loop with FMA (reduction) operation as show below, generating

RE: Add scatter/gather costs

Hi Honza, > -Original Message- > From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches- > ow...@gcc.gnu.org] On Behalf Of Jan Hubicka > Sent: Thursday, October 26, 2017 12:49 AM > To: gcc-patches@gcc.gnu.org > Subject: Add scatter/gather costs > > Hi, > this patch adds computation of

RE: Zen tuning part 2: Increase branch_cost to 3

Hi Honza, -Original Message- From: Jan Hubicka [mailto:hubi...@ucw.cz] Sent: Thursday, October 5, 2017 8:41 PM To: gcc-patches@gcc.gnu.org; Kumar, Venkataramanan <venkataramanan.ku...@amd.com> Subject: Zen tuning part 2: Increase branch_cost to 3 Hi, this patch increases branc

RE: [PATCH] [X86_64] Fix alignment for znver1 arch.

> Cc: gcc-patches@gcc.gnu.org; Kumar, Venkataramanan > <venkataramanan.ku...@amd.com> > Subject: Re: [PATCH] [X86_64] Fix alignment for znver1 arch. > > On Tue, Feb 14, 2017 at 8:48 AM, Pawar, Amit <amit.pa...@amd.com> wrote: > > Hi maintainers, > > > > Plea

[Patch, x86_64] Fix znver1 imov/imovx load reservations.

Hi Maintainers, The below patch fixes integer load type reservations for -march=znver1. Bootstrapped and regtested on x86_64-pc-linux-gnu. Ok to commit to trunk ? (-Snip) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 9659fbf..19b4066 100644 --- a/gcc/ChangeLog +++

RE: [PATCH, i386]: Fine tune prefetchw emission (PR 77270)

Hi Uros, > -Original Message- > From: Uros Bizjak [mailto:ubiz...@gmail.com] > Sent: Monday, August 22, 2016 12:36 AM > To: gcc-patches@gcc.gnu.org > Cc: Kumar, Venkataramanan <venkataramanan.ku...@amd.com>; NightStrike > StrikeNight <nightstr...@gmail.com>

RE: [Patch V2] Fix SLP PR58135.

Hi Christophe, > -Original Message- > From: Christophe Lyon [mailto:christophe.l...@linaro.org] > Sent: Tuesday, May 24, 2016 8:45 PM > To: Kumar, Venkataramanan <venkataramanan.ku...@amd.com> > Cc: Richard Biener <richard.guent...@gmail.com>; gcc-patche

RE: [Patch V2] Fix SLP PR58135.

Hi Richard, > -Original Message- > From: Richard Biener [mailto:richard.guent...@gmail.com] > Sent: Thursday, May 19, 2016 4:08 PM > To: Kumar, Venkataramanan <venkataramanan.ku...@amd.com> > Cc: gcc-patches@gcc.gnu.org > Subject: Re: [Patch V2] Fix SLP PR58135. &

RE: [Patch V2] Fix SLP PR58135.

Hi Richard, > -Original Message- > From: Richard Biener [mailto:richard.guent...@gmail.com] > Sent: Tuesday, May 17, 2016 5:40 PM > To: Kumar, Venkataramanan <venkataramanan.ku...@amd.com> > Cc: gcc-patches@gcc.gnu.org > Subject: Re: [Patch V2] Fix SLP PR58135. &

[Patch V2] Fix SLP PR58135.

Hi Richard, I created the patch by passing -b option to git. Now the patch is more readable. As per your suggestion I tried to fix the PR by splitting the SLP store group at vector boundary after the SLP tree is built. Boot strap PASSED on x86_64. Checked the patch with check_GNU_style.sh.

[Patch] Fix SLP PR58135.

Hi Richard, As per your suggestion I tried to fix the PR by splitting the SLP store group at vector boundary after the SLP tree is built. Boot strap PASSED on x86_64. Checked the patch with check_GNU_style.sh. The gfortran.dg/pr46519-1.f test now does SLP vectorization. Hence it generated 2

[Patch] [x86_64]: minor latency changes for znver1.md

Hi Uros, The below patch changes the latency values for fp type load reservations. It passes normal bootstrap and bootstrap with BOOT_CFLAGS="-O2 -g - march=znver1 -mno-clzero -mno-sha " on avx2 target. Also compiled and ran SPEC2006 with -march=znver1 and -Ofast . Ok for trunk? ChangeLog

RE: [Patch x86_64]: fix order of cost table initialization for -march=znver1.

Hi Maintainers, > -Original Message- > From: Kumar, Venkataramanan > Sent: Tuesday, March 08, 2016 7:27 PM > To: Uros Bizjak (ubiz...@gmail.com); gcc-patches@gcc.gnu.org > Cc: Richard Beiner (richard.guent...@gmail.com); Kumar, Venkataramanan > Subject: RE: [Patch

RE: [Patch x86_64]: fix order of cost table initialization for -march=znver1.

Hi Uros, > -Original Message- > From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches- > ow...@gcc.gnu.org] On Behalf Of Kumar, Venkataramanan > Sent: Tuesday, March 08, 2016 7:21 PM > To: Uros Bizjak (ubiz...@gmail.com); gcc-patches@gcc.gnu.org > Cc: Richard Bei

[Patch x86_64]: fix order of cost table initialization for -march=znver1.

Hi Uros, While debugging GCC to see if cost of multiplication for DI mode is set correctly for znver1 target. I found that the order of cost table insertion is wrong for znver1 and it worked because btver2 had same cost for multiply . The patch corrects the mistake I made. 2016-03-08

RE: [Patch X86_64]: Fix multiplication cost for -march=znver1.

Hi Uros, > -Original Message- > From: Uros Bizjak [mailto:ubiz...@gmail.com] > Sent: Saturday, March 05, 2016 9:06 PM > To: Kumar, Venkataramanan > Cc: gcc-patches@gcc.gnu.org; Richard Beiner (richard.guent...@gmail.com) > Subject: Re: [Patch X86_64]: Fix multiplicati

RE: [Patch X86_64] : Fix type attribute for sseimul reservations in znver1.md

Hi Uros, > -Original Message- > From: Uros Bizjak [mailto:ubiz...@gmail.com] > Sent: Friday, March 04, 2016 1:10 AM > To: Kumar, Venkataramanan > Cc: gcc-patches@gcc.gnu.org > Subject: Re: [Patch X86_64] : Fix type attribute for sseimul reservations in > znver1.md >

[Patch X86_64]: Fix multiplication cost for -march=znver1.

Hi Maintainers, The below patch changes multiplication cost for -march=znver1 target. GCC Bootstrap tested with BOOT_CFLAGS="-O2 -g -march=znver1". (---Snip---) diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index d8a2909..b5dde5e 100644 --- a/gcc/config/i386/i386.c +++

[Patch X86_64] : Fix type attribute for sseimul reservations in znver1.md

Hi Maintainers, The below patch corrects the type attribute for "sseimul" type reservations in znver1.md. (snip) diff --git a/gcc/config/i386/znver1.md b/gcc/config/i386/znver1.md index 3db3bed..feeccd7 100644 --- a/gcc/config/i386/znver1.md +++ b/gcc/config/i386/znver1.md @@ -913,28 +913,28

RE: [PATCH] Fix PR68621

riginal Message- > From: Marek Polacek [mailto:pola...@redhat.com] > Sent: Tuesday, March 01, 2016 10:23 PM > To: Kumar, Venkataramanan > Cc: Richard Beiner (richard.guent...@gmail.com); gcc-patches@gcc.gnu.org; > hjl.to...@gmail.com > Subject: Re: [PATCH] Fix PR68621 > > On Tue,

[PATCH] Fix PR68621

Hi Richard, As discussed in PR, tried to adjust the test case by initializing array, but looks like for building with -fpic it needs visibility to be set a hidden. The below patch does that. Ok for trunk ? diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 82e538e..f6bcb07

RE: [Patch X86_64]: Minor changes to znver1 pipe reservations.

Hi Uros, > -Original Message- > From: Uros Bizjak [mailto:ubiz...@gmail.com] > Sent: Friday, February 12, 2016 11:06 PM > To: Kumar, Venkataramanan > Cc: gcc-patches@gcc.gnu.org > Subject: Re: [Patch X86_64]: Minor changes to znver1 pipe reservations. > > On Fri,

[Patch X86_64]: Minor changes to znver1 pipe reservations.

Hi Maintainers, Below patch does some minor changes to pipe reservations in znver1.md. GCC bootstrap completed. GCC regression testing underway. Ok for trunk if the testing passes? ChangeLog - 2016-02-12  Venkataramanan Kumar      * 

RE: Turnoff prefetching for -march=znver1

Hi Uros, > -Original Message- > From: Uros Bizjak [mailto:ubiz...@gmail.com] > Sent: Wednesday, February 03, 2016 2:20 AM > To: Stepanyan, Victoria > Cc: gcc-patches@gcc.gnu.org; ger...@pfeifer.com; rguent...@suse.de; > Kumar, Venkataramanan > Subject: Re: Turnoff p

[RFC] non-unit stride loads for size power of 2.

Hi The code below it looks like we always call “vect_permute_load_chain” to load non-unit strides of size powers of 2. (---snip---) /* If reassociation width for vector type is 2 or greater target machine can execute 2 or more vector instructions in parallel. Otherwise try to get

RE: [Patch AArch64] Use software sqrt expansion always for -mlow-precision-recip-sqrt

Hi James, > -Original Message- > From: James Greenhalgh [mailto:james.greenha...@arm.com] > Sent: Monday, January 11, 2016 5:24 PM > To: gcc-patches@gcc.gnu.org > Cc: n...@arm.com; marcus.shawcr...@arm.com; > richard.earns...@arm.com; Kumar, Venkataramanan; > phil

RE: Add support for CLZERO ISA

Hi Uros, > -Original Message- > From: Stepanyan, Victoria > Sent: Thursday, November 26, 2015 1:43 AM > To: Uros Bizjak; gcc-patches@gcc.gnu.org > Cc: Kumar, Venkataramanan > Subject: RE: Add support for CLZERO ISA > > Thank you for the feedback, PFA fi

RE: [RFC] [Patch] PR67326 - relax trap assumption by looking at similar DRS

Hi Richard, > -Original Message- > From: Richard Biener [mailto:richard.guent...@gmail.com] > Sent: Tuesday, November 24, 2015 9:07 PM > To: Kumar, Venkataramanan > Cc: Jakub Jelinek (ja...@redhat.com); gcc-patches@gcc.gnu.org > Subject: Re: [RFC] [Patch] PR67326 - rel

[RFC] [Patch] PR67326 - relax trap assumption by looking at similar DRS

Hi Richard, As per Jakub suggestion in https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67326, the below patch fixes the regression in tree if conversion. Basically allowing if conversion to happen for a candidate DR, if we find similar DR with same dimensions and that DR will not trap. To find

RE: [RFC] [PATCH V2]: RE: [RFC] [Patch] Relax tree-if-conv.c trap assumptions.

Hi Richard, > -Original Message- > From: Richard Biener [mailto:richard.guent...@gmail.com] > Sent: Monday, November 16, 2015 3:28 PM > To: Kumar, Venkataramanan > Cc: Bernhard Reutner-Fischer; Andrew Pinski; gcc-patches@gcc.gnu.org > Subject: Re: [RFC] [PATCH V2]

RE: [RFC] [PATCH V2]: RE: [RFC] [Patch] Relax tree-if-conv.c trap assumptions.

Hi Richard and Bernhard. > -Original Message- > From: Richard Biener [mailto:richard.guent...@gmail.com] > Sent: Tuesday, November 10, 2015 5:33 PM > To: Kumar, Venkataramanan > Cc: Andrew Pinski; gcc-patches@gcc.gnu.org > Subject: Re: [RFC] [PATCH V2]: RE: [RFC]

RE: gcc-6/changes.html : Document AMD znver1

I committed it on behalf of Victoria. Regards, Venkat. > -Original Message- > From: Gerald Pfeifer [mailto:ger...@pfeifer.com] > Sent: Friday, November 13, 2015 1:08 AM > To: Stepanyan, Victoria > Cc: gcc-patches@gcc.gnu.org; ubiz...@gmail.com; rguent...@suse.de; > Kum

[RFC] [PATCH V2]: RE: [RFC] [Patch] Relax tree-if-conv.c trap assumptions.

Hi Richard, > -Original Message- > From: Richard Biener [mailto:richard.guent...@gmail.com] > Sent: Friday, October 30, 2015 5:00 PM > To: Kumar, Venkataramanan > Cc: Andrew Pinski; gcc-patches@gcc.gnu.org > Subject: Re: [RFC] [Patch] Relax tree-if-conv.c trap assump

[RFC] [Patch] Relax tree-if-conv.c trap assumptions.

Hi Richard, I am trying to "if covert the store" in the below test case and later help it to get vectorized under -Ofast -ftree-loop-if-convert-stores -fno-common #define LEN 4096  __attribute__((aligned(32))) float array[LEN]; void test() { for (int i = 0; i < LEN; i++) {    if (array[i] >

RE: [RFC] [Patch] Relax tree-if-conv.c trap assumptions.

Hi Andrew, > -Original Message- > From: Andrew Pinski [mailto:pins...@gmail.com] > Sent: Friday, October 30, 2015 3:38 PM > To: Kumar, Venkataramanan > Cc: Richard Beiner (richard.guent...@gmail.com); gcc-patches@gcc.gnu.org > Subject: Re: [RFC] [Patch] Relax t

RE: [Patch] [x86_64] libgcc changes to add znver1

Hi Uros, > -Original Message- > From: Uros Bizjak [mailto:ubiz...@gmail.com] > Sent: Friday, October 30, 2015 2:33 PM > To: Kumar, Venkataramanan > Cc: gcc-patches@gcc.gnu.org > Subject: Re: [Patch] [x86_64] libgcc changes to add znver1 > > On Thu, Oct 29

[Patch] [x86_64] libgcc changes to add znver1

Hi Uros, As per your comments in https://gcc.gnu.org/ml/gcc-patches/2015-09/msg02326.html please find the patch that also adds changes to libgcc. It was bootstrapped and regressed tested on x86_64. Ok for trunk? Change logs gcc/ChangeLog 2015-10-29 Venkataramanan Kumar

RE: [Patch] [x86_64]: Add bdver4 for multi versioning and fix AMD cpu model detection.

Hi Uros, > -Original Message- > From: Uros Bizjak [mailto:ubiz...@gmail.com] > Sent: Tuesday, October 13, 2015 9:12 PM > To: Kumar, Venkataramanan > Cc: gcc-patches@gcc.gnu.org > Subject: Re: [Patch] [x86_64]: Add bdver4 for multi versioning and fix AMD > cpu model d

RE: [Patch] [x86_64]: Add bdver4 for multi versioning and fix AMD cpu model detection.

Hi Uros, I realized both GCC 4.9 and GCC 5 branches includes processor subtype AMDFAM15H_BDVER4. So I need to back port not only model selection fix but also the detection of model for bdver4. Is that fine? Regards, Venkat. > -Original Message- > From: Kumar, Venkataramanan

[Patch] [x86_64]: Add bdver4 for multi versioning and fix AMD cpu model detection.

Hi Uros, Please find below patch that adds bdver4 target for multi versioning. Also I while computing model, the extended_model is incorrectly left shifted by 4. I have removed it now. Is below patch Ok for trunk ? GCC bootstrap and regressions passed. diff --git a/libgcc/ChangeLog

RE: [Patch] [x86_64]: Add bdver4 for multi versioning and fix AMD cpu model detection.

Thank you Uros, I will test and commit model selection change in all release branches as well. Regards, Venkat. > -Original Message- > From: Uros Bizjak [mailto:ubiz...@gmail.com] > Sent: Friday, October 09, 2015 3:25 PM > To: Kumar, Venkataramanan > Cc: gcc-patc

RE: [Patch] [x86_64] znver1 enablement

t; To: Kumar, Venkataramanan > Cc: gcc-patches@gcc.gnu.org > Subject: Re: [Patch] [x86_64] znver1 enablement > > On Wed, Sep 30, 2015 at 12:05 PM, Kumar, Venkataramanan > <venkataramanan.ku...@amd.com> wrote: > > Hi Maintainers, > > > > The attached patch en

[Patch] [x86_64] znver1 enablement

Hi Maintainers, The attached patch enables -march=znver1 (AMD family 17h Zen processor). Costs and tunings are copied from bdver4, but we will be adjusting them later for znver1. Also a basic scheduler description for znver1 is added and we will update this as we get more information.

vectorize conditional expressions in aarch64

Hi , For the below code x86_64 is able to vectorize. #define LEN 32000 __attribute__((aligned(32))) float a[LEN], b[LEN],c[LEN]; void test() { for (int i = 0; i LEN; i++) {    if (b[i] (float)0.) {     a[i] = b[i];    } } } X86_64 ASM L2:     vmovaps b(%rax), %ymm0    

RE: [RFC] [Patch]: Try and vectorize with shift for mult expr with power 2 integer constant.

Hi Richard, -Original Message- From: Richard Biener [mailto:richard.guent...@gmail.com] Sent: Wednesday, August 05, 2015 5:11 PM To: Kumar, Venkataramanan Cc: Jeff Law; Jakub Jelinek; gcc-patches@gcc.gnu.org Subject: Re: [RFC] [Patch]: Try and vectorize with shift for mult expr

RE: [RFC] [Patch]: Try and vectorize with shift for mult expr with power 2 integer constant.

Hi Richard, -Original Message- From: Richard Biener [mailto:richard.guent...@gmail.com] Sent: Wednesday, August 05, 2015 2:21 PM To: Kumar, Venkataramanan Cc: Jeff Law; Jakub Jelinek; gcc-patches@gcc.gnu.org Subject: Re: [RFC] [Patch]: Try and vectorize with shift for mult expr

RE: [RFC] [Patch]: Try and vectorize with shift for mult expr with power 2 integer constant.

Hi Jeff, -Original Message- From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches- ow...@gcc.gnu.org] On Behalf Of Jeff Law Sent: Monday, August 03, 2015 11:42 PM To: Kumar, Venkataramanan; Jakub Jelinek Cc: Richard Beiner (richard.guent...@gmail.com); gcc-patches@gcc.gnu.org

RE: [RFC] [Patch]: Try and vectorize with shift for mult expr with power 2 integer constant.

Hi Richard, -Original Message- From: Richard Biener [mailto:richard.guent...@gmail.com] Sent: Tuesday, August 04, 2015 4:07 PM To: Kumar, Venkataramanan Cc: Jeff Law; Jakub Jelinek; gcc-patches@gcc.gnu.org Subject: Re: [RFC] [Patch]: Try and vectorize with shift for mult expr

RE: [RFC] [Patch]: Try and vectorize with shift for mult expr with power 2 integer constant.

Hi Jakub, Thank you for reviewing the patch. I have incorporated your comments in the attached patch. -Original Message- From: Jakub Jelinek [mailto:ja...@redhat.com] Sent: Wednesday, July 29, 2015 1:24 AM To: Kumar, Venkataramanan Cc: Richard Beiner (richard.guent...@gmail.com

RE: [PATCH v3][aarch64] Implemented reciprocal square root (rsqrt) estimation in -ffast-math

to decide on the default tuning. Regards, Venkat. -Original Message- From: Benedikt Huber [mailto:benedikt.hu...@theobroma-systems.com] Sent: Wednesday, July 29, 2015 11:18 PM To: gcc-patches@gcc.gnu.org Cc: philipp.toms...@theobroma-systems.com; Kumar, Venkataramanan; pins...@gmail.com

[RFC] [Patch]: Try and vectorize with shift for mult expr with power 2 integer constant.

Hi Richard, For Aarch64 target, I was trying to vectorize the expression arr[i]=arr[i]*4; via vector shifts instructions since they don't have vector mults. unsigned long int __attribute__ ((aligned (64)))arr[100]; int i; #if 1 void test_vector_shifts() { for(i=0; i=99;i++)

RE: [PATCH] [aarch64] Implemented reciprocal square root (rsqrt) estimation in -ffast-math

in your case. Regards, Venkat. -Original Message- From: Evandro Menezes [mailto:e.mene...@samsung.com] Sent: Wednesday, July 15, 2015 3:45 AM To: Kumar, Venkataramanan; pins...@gmail.com; 'Dr. Philipp Tomsich' Cc: 'James Greenhalgh'; 'Benedikt Huber'; gcc-patches@gcc.gnu.org; 'Marcus

[Patch wwwdocs] gcc-6/changes.html : Document AMD monitorx and mwaitx

Hi Richard and Gerald, This patch adds the documentation in changes.html for the GCC trunk (gcc-6) . Please let me know if it is good to commit. Index: htdocs/gcc-6/changes.html === RCS file:

RE: [Patch wwwdocs] gcc-5/changes.html : Document AMD monitorx and mwaitx

Hi Richard, -Original Message- From: Richard Biener [mailto:richard.guent...@gmail.com] Sent: Thursday, July 09, 2015 8:03 PM To: Kumar, Venkataramanan Cc: Gerald Pfeifer (ger...@pfeifer.com); gcc-patches@gcc.gnu.org Subject: Re: [Patch wwwdocs] gcc-5/changes.html : Document AMD

[Patch wwwdocs] gcc-5/changes.html : Document AMD monitorx and mwaitx

Hi Gerald, This patch documents about  AMD instructions mwaitx and monitorx in GCC- 5 changes.html. Please let me know if this ok to commit? Index: htdocs/gcc-5/changes.html === RCS file:

RE: [PATCH] [aarch64] Implemented reciprocal square root (rsqrt) estimation in -ffast-math

-Original Message- From: Dr. Philipp Tomsich [mailto:philipp.toms...@theobroma-systems.com] Sent: Monday, June 29, 2015 2:17 PM To: Kumar, Venkataramanan Cc: pins...@gmail.com; Benedikt Huber; gcc-patches@gcc.gnu.org Subject: Re: [PATCH] [aarch64] Implemented reciprocal square root

RE: [PATCH] [aarch64] Implemented reciprocal square root (rsqrt) estimation in -ffast-math

Hi, -Original Message- From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches- ow...@gcc.gnu.org] On Behalf Of Benedikt Huber Sent: Monday, June 29, 2015 11:04 PM To: Kumar, Venkataramanan Cc: pins...@gmail.com; Dr. Philipp Tomsich; gcc-patches@gcc.gnu.org Subject: Re: [PATCH

RE: [PATCH] [aarch64] Implemented reciprocal square root (rsqrt) estimation in -ffast-math

Hi, -Original Message- From: pins...@gmail.com [mailto:pins...@gmail.com] Sent: Monday, June 29, 2015 10:23 PM To: Dr. Philipp Tomsich Cc: James Greenhalgh; Kumar, Venkataramanan; Benedikt Huber; gcc- patc...@gcc.gnu.org; Marcus Shawcroft; Ramana Radhakrishnan; Richard Earnshaw

RE: [PATCH] [aarch64] Implemented reciprocal square root (rsqrt) estimation in -ffast-math

, Venkat. -Original Message- From: pins...@gmail.com [mailto:pins...@gmail.com] Sent: Sunday, June 28, 2015 8:35 PM To: Kumar, Venkataramanan Cc: Dr. Philipp Tomsich; Benedikt Huber; gcc-patches@gcc.gnu.org Subject: Re: [PATCH] [aarch64] Implemented reciprocal square root (rsqrt

RE: [PATCH] [aarch64] Implemented reciprocal square root (rsqrt) estimation in -ffast-math

Changing to 1 step for float and 2 steps for double gives better gains now for gromacs on cortex-a57. Regards, Venkat. -Original Message- From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches- ow...@gcc.gnu.org] On Behalf Of Benedikt Huber Sent: Thursday, June 25, 2015 4:09 PM

RE: [PATCH] [aarch64] Implemented reciprocal square root (rsqrt) estimation in -ffast-math

I got around ~12% gain with -Ofast -mcpu=cortex-a57. Regards, Venkat. -Original Message- From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches- ow...@gcc.gnu.org] On Behalf Of Dr. Philipp Tomsich Sent: Thursday, June 25, 2015 9:13 PM To: Kumar, Venkataramanan Cc: Benedikt

RE: [PATCH] [aarch64] Implemented reciprocal square root (rsqrt) estimation in -ffast-math

Hi, If I understand correct, current implementation replaces fdiv fsqrt by frsqrte for i=0 to 3 fmul frsqrts fmul So I think gains depends latency of frsqrts insn. I see patch has patterns for vector versions of frsqrts, but does not enable them? Regards, Venkat. -Original

RE: [PATCH] [aarch64] Implemented reciprocal square root (rsqrt) estimation in -ffast-math

Hi, is there a plan to support -mrecip=rsqrt for Aarch64? Regards, Venkat. -Original Message- From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches- ow...@gcc.gnu.org] On Behalf Of Benedikt Huber Sent: Thursday, June 18, 2015 5:34 PM To: gcc-patches@gcc.gnu.org Cc:

RE: [PATCH] [X86_64]: Add support for MONITORX and MWAITX ISA

Bizjak [mailto:ubiz...@gmail.com] Sent: Friday, June 12, 2015 4:02 PM To: Kumar, Venkataramanan Cc: gcc-patches@gcc.gnu.org Subject: Re: [PATCH] [X86_64]: Add support for MONITORX and MWAITX ISA On Fri, Jun 12, 2015 at 12:27 PM, Kumar, Venkataramanan venkataramanan.ku...@amd.com wrote: Ok

RE: [PATCH] [X86_64]: Add support for MONITORX and MWAITX ISA

Hi Uros, -Original Message- From: Uros Bizjak [mailto:ubiz...@gmail.com] Sent: Thursday, June 11, 2015 3:50 PM To: Kumar, Venkataramanan Cc: gcc-patches@gcc.gnu.org Subject: Re: [PATCH] [X86_64]: Add support for MONITORX and MWAITX ISA On Thu, Jun 11, 2015 at 11:49 AM, Kumar

[PATCH] [X86_64]: Add support for MONITORX and MWAITX ISA

Hi Maintainers, This patch adds support for new MONITORX and MWAITX instructions and also enables them via builtins. The ISA is enabled by new -mmwaitx option and is available for AMD bdver4 target (-march=bdver4). MONITORX and MWAITX implements same functionality as old MONITOR and MWAIT.

RE: [Patch] [X86_64]: fix operand constraints in sse3_mwait

https://gcc.gnu.org/viewcvs/gcc?view=revisionrevision=224147 Trunk https://gcc.gnu.org/viewcvs/gcc?view=revisionrevision=224146 regards, Venkat. -Original Message- From: Kumar, Venkataramanan Sent: Thursday, June 04, 2015 8:44 PM To: Uros Bizjak (ubiz...@gmail.com); gcc-patches

[Patch] [X86_64]: fix operand constraints in sse3_mwait

Hi Uros, As discussed here https://gcc.gnu.org/ml/gcc/2015-06/msg00043.html I am going to install the following patch to trunk. GCC bootstrap and regressions tests passed. Regards, Venkat. diff --git a/gcc/ChangeLog b/gcc/ChangeLog index ab5c004..2fa6e96 100644 --- a/gcc/ChangeLog +++

  1   2   >