Hi Richard,
Based on your suggestions in the other thread, the patch uses force_reg
to avoid creating pseudo if value is already in a register.
Bootstrap+test passes on aarch64-linux-gnu.
OK to commit ?
Thanks,
Prathamesh
[aarch64] Use force_reg instead of copy_to_mode_reg.
Use force_reg instead
On Fri, 21 Apr 2023 at 14:47, Richard Sandiford
wrote:
>
> Prathamesh Kulkarni writes:
> > Hi,
> > I tested the interleave+zip1 for vector init patch and it segfaulted
> > during bootstrap while trying to build
> > libgfortran/generated/matmul_i2.c.
> > R
On Wed, 12 Apr 2023 at 14:29, Richard Sandiford
wrote:
>
> Prathamesh Kulkarni writes:
> > On Thu, 6 Apr 2023 at 16:05, Richard Sandiford
> > wrote:
> >>
> >> Prathamesh Kulkarni writes:
> >> > On Tue, 4 Apr 2023 at 23:35, Richard Sandiford
On Wed, 19 Apr 2023 at 16:17, Richard Biener wrote:
>
> On Wed, Apr 19, 2023 at 11:21 AM Prathamesh Kulkarni
> wrote:
> >
> > On Tue, 11 Apr 2023 at 19:36, Prathamesh Kulkarni
> > wrote:
> > >
> > > On Tue, 11 Apr 2023 at 14:17, Richard Biener
>
On Tue, 11 Apr 2023 at 19:36, Prathamesh Kulkarni
wrote:
>
> On Tue, 11 Apr 2023 at 14:17, Richard Biener
> wrote:
> >
> > On Wed, Apr 5, 2023 at 10:39 AM Prathamesh Kulkarni via Gcc-patches
> > wrote:
> > >
> > > Hi,
> > > For t
On Tue, 31 Jan 2023 at 11:51, Richard Sandiford
wrote:
>
> Prathamesh Kulkarni writes:
> > On Mon, 23 Jan 2023 at 22:26, Richard Sandiford
> > wrote:
> >>
> >> Prathamesh Kulkarni writes:
> >> > On Wed, 18 Jan 2023 at 19:59, Richard Sandiford
&g
On Tue, 11 Apr 2023 at 14:17, Richard Biener wrote:
>
> On Wed, Apr 5, 2023 at 10:39 AM Prathamesh Kulkarni via Gcc-patches
> wrote:
> >
> > Hi,
> > For the following test:
> >
> > svint32_t f(svint32_t v)
> > {
> > return svrev_s32 (svrev_s32
On Thu, 6 Apr 2023 at 16:05, Richard Sandiford
wrote:
>
> Prathamesh Kulkarni writes:
> > On Tue, 4 Apr 2023 at 23:35, Richard Sandiford
> > wrote:
> >> > diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc
> >> > b/gcc/config/aarch64
On Tue, 4 Apr 2023 at 23:35, Richard Sandiford
wrote:
>
> Prathamesh Kulkarni writes:
> > On Mon, 13 Mar 2023 at 13:03, Richard Biener wrote:
> >> On GIMPLE it would be
> >>
> >> _1 = { a, ... }; // (a)
> >> _2 = { _1, ... }; // (b)
> >
Hi,
For the following test:
svint32_t f(svint32_t v)
{
return svrev_s32 (svrev_s32 (v));
}
We generate 2 rev instructions instead of nop:
f:
rev z0.s, z0.s
rev z0.s, z0.s
ret
The attached patch tries to fix that by trying to recognize the following
pattern in
On Mon, 13 Feb 2023 at 11:58, Prathamesh Kulkarni
wrote:
>
> On Fri, 3 Feb 2023 at 12:46, Prathamesh Kulkarni
> wrote:
> >
> > Hi Richard,
> > While digging thru aarch64_expand_vector_init, I noticed it gives
> > priority to loading a constant first:
> >
On Mon, 13 Mar 2023 at 13:03, Richard Biener wrote:
>
> On Fri, 10 Mar 2023, Richard Sandiford wrote:
>
> > Sorry for the slow reply.
> >
> > Prathamesh Kulkarni writes:
> > > Unfortunately it regresses code-gen for the following case:
> > >
> >
On Sun, 19 Feb 2023 at 01:01, Maciej W. Rozycki wrote:
>
> On Sat, 18 Feb 2023, Andrew Pinski via Gcc-patches wrote:
>
> > > > If we have division and remainder calculations with the same operands:
> > > >
> > > > a = b / c;
> > > > d = b % c;
> > > >
> > > > We can replace the calculation of
On Fri, 3 Feb 2023 at 12:46, Prathamesh Kulkarni
wrote:
>
> Hi Richard,
> While digging thru aarch64_expand_vector_init, I noticed it gives
> priority to loading a constant first:
> /* Initialise a vector which is part-variable. We want to first try
> to build
On Mon, 6 Feb 2023 at 17:43, Richard Sandiford
wrote:
>
> Prathamesh Kulkarni writes:
> > On Fri, 3 Feb 2023 at 20:47, Richard Sandiford
> > wrote:
> >>
> >> Prathamesh Kulkarni writes:
> >> > On Fri, 3 Feb 2023 at 07:10, Prathamesh Kulkarni
&
On Mon, 6 Feb 2023 at 20:14, Roger Sayle wrote:
>
>
> Perhaps I'm missing something (I'm not too familiar with SVE semantics), but
> is there
> a reason that the solution for PR96473 uses a VEC_PERM_EXPR and not just a
> VEC_DUPLICATE_EXPR? The folding of sv1d1rq (svptrue_..., ...) doesn't seem
On Fri, 3 Feb 2023 at 20:47, Richard Sandiford
wrote:
>
> Prathamesh Kulkarni writes:
> > On Fri, 3 Feb 2023 at 07:10, Prathamesh Kulkarni
> > wrote:
> >>
> >> On Thu, 2 Feb 2023 at 20:50, Richard Sandiford
> >> wrote:
> >> >
> >
Hi Richard,
While digging thru aarch64_expand_vector_init, I noticed it gives
priority to loading a constant first:
/* Initialise a vector which is part-variable. We want to first try
to build those lanes which are constant in the most efficient way we
can. */
which results in
On Fri, 3 Feb 2023 at 07:10, Prathamesh Kulkarni
wrote:
>
> On Thu, 2 Feb 2023 at 20:50, Richard Sandiford
> wrote:
> >
> > Prathamesh Kulkarni writes:
> > >> >> > I have attached a patch that extends the transform if one half is
> > >&
On Thu, 2 Feb 2023 at 20:50, Richard Sandiford
wrote:
>
> Prathamesh Kulkarni writes:
> >> >> > I have attached a patch that extends the transform if one half is dup
> >> >> > and other is set of constants.
> >> >> > For eg:
&g
On Wed, 1 Feb 2023 at 21:56, Richard Sandiford
wrote:
>
> Prathamesh Kulkarni writes:
> > On Thu, 12 Jan 2023 at 21:21, Richard Sandiford
> > wrote:
> >>
> >> Prathamesh Kulkarni writes:
> >> > On Tue, 6 Dec 2022 at 07:01, Prathamesh Kulkarni
&
On Tue, 17 Jan 2023 at 17:24, Prathamesh Kulkarni
wrote:
>
> On Mon, 26 Dec 2022 at 09:56, Prathamesh Kulkarni
> wrote:
> >
> > On Tue, 13 Dec 2022 at 11:35, Prathamesh Kulkarni
> > wrote:
> > >
> > > On Tue, 6 Dec 2022 at 21:00, Richard Sandi
On Thu, 12 Jan 2023 at 21:21, Richard Sandiford
wrote:
>
> Prathamesh Kulkarni writes:
> > On Tue, 6 Dec 2022 at 07:01, Prathamesh Kulkarni
> > wrote:
> >>
> >> On Mon, 5 Dec 2022 at 16:50, Richard Sandiford
> >> wrote:
> >&
On Mon, 23 Jan 2023 at 22:26, Richard Sandiford
wrote:
>
> Prathamesh Kulkarni writes:
> > On Wed, 18 Jan 2023 at 19:59, Richard Sandiford
> > wrote:
> >>
> >> Prathamesh Kulkarni writes:
> >> > On Tue, 17 Jan 2023 at 18:29, Richard Sandiford
&g
On Wed, 18 Jan 2023 at 19:59, Richard Sandiford
wrote:
>
> Prathamesh Kulkarni writes:
> > On Tue, 17 Jan 2023 at 18:29, Richard Sandiford
> > wrote:
> >>
> >> Prathamesh Kulkarni writes:
> >> > Hi Richard,
> >> > For the fo
On Wed, 18 Jan 2023 at 20:00, Richard Sandiford
wrote:
>
> Prathamesh Kulkarni writes:
> > Hi Richard,
> > Based on your suggestion in the other thread, the patch uses
> > exact_log2 (INTVAL (operands[2])) >= 0 to gate for vec_merge patterns.
> > Bootstrap+test
Hi Richard,
Based on your suggestion in the other thread, the patch uses
exact_log2 (INTVAL (operands[2])) >= 0 to gate for vec_merge patterns.
Bootstrap+test in progress on aarch64-linux-gnu.
Does it look OK ?
Thanks,
Prathamesh
[aarch64] Use exact_log2 (INTVAL (operands[2])) >= 0 to gate for
On Tue, 17 Jan 2023 at 18:29, Richard Sandiford
wrote:
>
> Prathamesh Kulkarni writes:
> > Hi Richard,
> > For the following (contrived) test:
> >
> > void foo(int32x4_t v)
> > {
> > v[3] = 0;
> > return v;
> > }
> >
> >
On Mon, 26 Dec 2022 at 09:56, Prathamesh Kulkarni
wrote:
>
> On Tue, 13 Dec 2022 at 11:35, Prathamesh Kulkarni
> wrote:
> >
> > On Tue, 6 Dec 2022 at 21:00, Richard Sandiford
> > wrote:
> > >
> > > Prathamesh Kulkarni via Gcc-patches writes:
&g
Hi Richard,
For the following (contrived) test:
void foo(int32x4_t v)
{
v[3] = 0;
return v;
}
-O2 code-gen:
foo:
fmovs1, wzr
ins v0.s[3], v1.s[0]
ret
I suppose we can instead emit the following code-gen ?
foo:
ins v0.s[3], wzr
ret
combine produces:
On Thu, 12 Jan 2023 at 21:02, Richard Sandiford
wrote:
>
> Prathamesh Kulkarni writes:
> > On Fri, 5 Aug 2022 at 17:49, Richard Sandiford
> > wrote:
> >>
> >> Prathamesh Kulkarni writes:
> >> > Hi Richard,
> >> > Follow
On Fri, 5 Aug 2022 at 17:49, Richard Sandiford
wrote:
>
> Prathamesh Kulkarni writes:
> > Hi Richard,
> > Following from off-list discussion, in the attached patch, I wrote pattern
> > similar to vec_duplicate_reg, which seems to work for the svld1rq
> &
On Wed, 28 Dec 2022 at 04:01, Jonny Grant wrote:
>
>
>
> On 26/12/2022 09:19, Prathamesh Kulkarni wrote:
> > On Mon, 26 Dec 2022 at 14:25, Jonny Grant wrote:
> >>
> >>
> >>
> >> From 6ff344979af46dbcd739dd9068d6d595547e4c27 Mon Sep 17 00:00
On Mon, 26 Dec 2022 at 14:25, Jonny Grant wrote:
>
>
>
> From 6ff344979af46dbcd739dd9068d6d595547e4c27 Mon Sep 17 00:00:00 2001
> From: Jonathan Grant
> Date: Sun, 25 Dec 2022 22:38:44 +
> Subject: [PATCH] add srandom random initstate setstate
>
> ---
> gcc/c-family/known-headers.cc | 4
On Tue, 13 Dec 2022 at 11:35, Prathamesh Kulkarni
wrote:
>
> On Tue, 6 Dec 2022 at 21:00, Richard Sandiford
> wrote:
> >
> > Prathamesh Kulkarni via Gcc-patches writes:
> > > On Fri, 4 Nov 2022 at 14:00, Prathamesh Kulkarni
> > > wrote:
> > &g
On Tue, 6 Dec 2022 at 07:01, Prathamesh Kulkarni
wrote:
>
> On Mon, 5 Dec 2022 at 16:50, Richard Sandiford
> wrote:
> >
> > Richard Sandiford via Gcc-patches writes:
> > > Prathamesh Kulkarni writes:
> > >> Hi,
> > >> For the following tes
On Tue, 6 Dec 2022 at 21:00, Richard Sandiford
wrote:
>
> Prathamesh Kulkarni via Gcc-patches writes:
> > On Fri, 4 Nov 2022 at 14:00, Prathamesh Kulkarni
> > wrote:
> >>
> >> On Mon, 31 Oct 2022 at 15:27, Richard Sandiford
> >> wrote:
> >>
On Tue, 6 Dec 2022 at 00:08, Richard Sandiford
wrote:
>
> Prathamesh Kulkarni writes:
> > Hi,
> > The following test:
> >
> > #include "arm_sve.h"
> >
> > svint8_t
> > test_s8(int8_t *x)
> > {
> > return svld1rq_s8 (svptr
On Mon, 5 Dec 2022 at 16:50, Richard Sandiford
wrote:
>
> Richard Sandiford via Gcc-patches writes:
> > Prathamesh Kulkarni writes:
> >> Hi,
> >> For the following test-case:
> >>
> >> int16x8_t foo(int16_t x, int16_t y)
> >
On Mon, 5 Dec 2022 at 09:51, Patrick Palka via Gcc-patches
wrote:
>
> These functions currently repeatedly dereference tp during the subtree
> walk, dereferences which the compiler can't CSE because it can't
> guarantee that the subtree walking doesn't modify *tp.
>
> But we already implicitly
Hi,
The following test:
#include "arm_sve.h"
svint8_t
test_s8(int8_t *x)
{
return svld1rq_s8 (svptrue_b8 (), [0]);
}
ICE's with -march=armv8.2-a+sve -O1 -fno-tree-ccp -fno-tree-forwprop:
during GIMPLE pass: fre
pr107920.c: In function ‘test_s8’:
pr107920.c:7:1: internal compiler error: in
On Tue, 29 Nov 2022 at 20:43, Andrew Pinski wrote:
>
> On Tue, Nov 29, 2022 at 6:40 AM Prathamesh Kulkarni via Gcc-patches
> wrote:
> >
> > Hi,
> > For the following test-case:
> >
> > int16x8_t foo(int16_t x, int16_t y)
> > {
>
Hi,
For the following test-case:
int16x8_t foo(int16_t x, int16_t y)
{
return (int16x8_t) { x, y, x, y, x, y, x, y };
}
Code gen at -O3:
foo:
dupv0.8h, w0
ins v0.h[1], w1
ins v0.h[3], w1
ins v0.h[5], w1
ins v0.h[7], w1
ret
On Mon, 21 Nov 2022 at 14:37, Prathamesh Kulkarni
wrote:
>
> On Fri, 4 Nov 2022 at 14:00, Prathamesh Kulkarni
> wrote:
> >
> > On Mon, 31 Oct 2022 at 15:27, Richard Sandiford
> > wrote:
> > >
> > > Prathamesh Kulkarni writes:
> >
On Fri, 4 Nov 2022 at 14:00, Prathamesh Kulkarni
wrote:
>
> On Mon, 31 Oct 2022 at 15:27, Richard Sandiford
> wrote:
> >
> > Prathamesh Kulkarni writes:
> > > On Wed, 26 Oct 2022 at 21:07, Richard Sandiford
> > > wrote:
> > >>
> > &g
On Fri, 11 Nov 2022 at 07:58, Michael Collison wrote:
>
> This patches transforms ((x & 0x1) == 0) ? y : z y -into
> (-(typeof(y))(x & 0x1) & z) y, where op is a '^' or a '|'. It also
> transforms (cond (and (x , 0x1) != 0), (z op y), y ) into (-(and (x ,
> 0x1)) & z ) op y.
>
> Matching this
On Fri, 4 Nov 2022 at 18:18, Siddhesh Poyarekar wrote:
>
> Use string length of input to strdup to determine the usable size of the
> resulting object. Avoid doing the same for strndup since there's a
> chance that the input may be too large, resulting in an unnecessary
> overhead or worse, the
On Mon, 31 Oct 2022 at 15:27, Richard Sandiford
wrote:
>
> Prathamesh Kulkarni writes:
> > On Wed, 26 Oct 2022 at 21:07, Richard Sandiford
> > wrote:
> >>
> >> Sorry for the slow response. I wanted to find some time to think
> >> about this a bi
On Fri, 4 Nov 2022 at 05:36, Hongyu Wang via Gcc-patches
wrote:
>
> Hi,
>
> This is a follow-up patch for PR98167
>
> The sequence
> c1 = VEC_PERM_EXPR (a, a, mask)
> c2 = VEC_PERM_EXPR (b, b, mask)
> c3 = c1 op c2
> can be optimized to
> c = a op b
> c3 = VEC_PERM_EXPR
On Wed, 26 Oct 2022 at 21:07, Richard Sandiford
wrote:
>
> Sorry for the slow response. I wanted to find some time to think
> about this a bit more.
>
> Prathamesh Kulkarni writes:
> > On Fri, 30 Sept 2022 at 21:38, Richard Sandiford
> > wrote:
> >>
&g
On Mon, 17 Oct 2022 at 16:02, Prathamesh Kulkarni
wrote:
>
> On Mon, 10 Oct 2022 at 16:18, Prathamesh Kulkarni
> wrote:
> >
> > On Fri, 30 Sept 2022 at 21:38, Richard Sandiford
> > wrote:
> > >
> > > Richard Sandiford via Gcc-patches writes:
> &
On Mon, 10 Oct 2022 at 16:18, Prathamesh Kulkarni
wrote:
>
> On Fri, 30 Sept 2022 at 21:38, Richard Sandiford
> wrote:
> >
> > Richard Sandiford via Gcc-patches writes:
> > > Prathamesh Kulkarni writes:
> > >> Sorry to ask a silly question but in whi
On Fri, 30 Sept 2022 at 21:38, Richard Sandiford
wrote:
>
> Richard Sandiford via Gcc-patches writes:
> > Prathamesh Kulkarni writes:
> >> Sorry to ask a silly question but in which case shall we select 2nd vector
> >> ?
> >> For num_poly_int_coeffs ==
On Tue, 27 Sept 2022 at 01:59, Richard Sandiford
wrote:
>
> Prathamesh Kulkarni writes:
> > On Fri, 23 Sept 2022 at 21:33, Richard Sandiford
> > wrote:
> >>
> >> Prathamesh Kulkarni writes:
> >> > On Tue, 20 Sept 2022 at 18:09, Richard San
On Fri, 23 Sept 2022 at 21:33, Richard Sandiford
wrote:
>
> Prathamesh Kulkarni writes:
> > On Tue, 20 Sept 2022 at 18:09, Richard Sandiford
> > wrote:
> >>
> >> Prathamesh Kulkarni writes:
> >> > On Mon, 12 Sept 2022 at 19:57, Richard San
On Tue, 20 Sept 2022 at 18:09, Richard Sandiford
wrote:
>
> Prathamesh Kulkarni writes:
> > On Mon, 12 Sept 2022 at 19:57, Richard Sandiford
> > wrote:
> >>
> >> Prathamesh Kulkarni writes:
> >> >> The VLA encoding encodes the
On Mon, 12 Sept 2022 at 19:57, Richard Sandiford
wrote:
>
> Prathamesh Kulkarni writes:
> > On Mon, 5 Sept 2022 at 15:51, Richard Sandiford
> > wrote:
> >>
> >> Sorry for the slow reply. I wrote a response a couple of weeks ago
> >>
On Mon, 5 Sept 2022 at 15:51, Richard Sandiford
wrote:
>
> Sorry for the slow reply. I wrote a response a couple of weeks ago
> but I think it get lost in a machine outage.
>
> Prathamesh Kulkarni writes:
> > Hi,
> > The attached prototype patch extends fold_vec
On Mon, 5 Sept 2022 at 14:39, Richard Biener wrote:
>
> On Mon, Sep 5, 2022 at 10:54 AM Prathamesh Kulkarni
> wrote:
> >
> > On Mon, 29 Aug 2022 at 11:53, Prathamesh Kulkarni
> > wrote:
> > >
> > > On Thu, 18 Aug 2022 at 18:20, Prathamesh Kulkarni
On Mon, 29 Aug 2022 at 11:53, Prathamesh Kulkarni
wrote:
>
> On Thu, 18 Aug 2022 at 18:20, Prathamesh Kulkarni
> wrote:
> >
> > On Thu, 18 Aug 2022 at 18:14, Prathamesh Kulkarni
> > wrote:
> > >
> > > On Wed, 17 Aug 2022 at 17:01, Richard Biener
On Mon, 29 Aug 2022 at 11:38, Prathamesh Kulkarni
wrote:
>
> On Wed, 17 Aug 2022 at 18:09, Prathamesh Kulkarni
> wrote:
> >
> > Hi,
> > The attached prototype patch extends fold_vec_perm to fold VEC_PERM_EXPR
> > in VLA manner, and currently handles the follow
On Thu, 18 Aug 2022 at 18:20, Prathamesh Kulkarni
wrote:
>
> On Thu, 18 Aug 2022 at 18:14, Prathamesh Kulkarni
> wrote:
> >
> > On Wed, 17 Aug 2022 at 17:01, Richard Biener
> > wrote:
> > >
> > > On Tue, Aug 16, 2022 at 6:30 PM Richard Sandi
On Wed, 17 Aug 2022 at 18:09, Prathamesh Kulkarni
wrote:
>
> Hi,
> The attached prototype patch extends fold_vec_perm to fold VEC_PERM_EXPR
> in VLA manner, and currently handles the following cases:
> (a) fixed len arg0, arg1 and fixed len sel.
> (b) fixed len arg0, arg1 and
On Thu, 18 Aug 2022 at 18:14, Prathamesh Kulkarni
wrote:
>
> On Wed, 17 Aug 2022 at 17:01, Richard Biener
> wrote:
> >
> > On Tue, Aug 16, 2022 at 6:30 PM Richard Sandiford
> > wrote:
> > >
> > > Prathamesh Kulkarni writes:
> > > > On
On Wed, 17 Aug 2022 at 17:01, Richard Biener wrote:
>
> On Tue, Aug 16, 2022 at 6:30 PM Richard Sandiford
> wrote:
> >
> > Prathamesh Kulkarni writes:
> > > On Tue, 9 Aug 2022 at 18:42, Richard Biener
> > > wrote:
> > >>
> > >> On
Hi,
The attached prototype patch extends fold_vec_perm to fold VEC_PERM_EXPR
in VLA manner, and currently handles the following cases:
(a) fixed len arg0, arg1 and fixed len sel.
(b) fixed len arg0, arg1 and vla sel
(c) vla arg0, arg1 and vla sel with arg0, arg1 being VECTOR_CST.
It seems to work
On Tue, 9 Aug 2022 at 18:42, Richard Biener wrote:
>
> On Tue, Aug 9, 2022 at 12:10 PM Prathamesh Kulkarni
> wrote:
> >
> > On Mon, 8 Aug 2022 at 14:27, Richard Biener
> > wrote:
> > >
> > > On Mon, Aug 1, 2022 at 5:17 AM Prathamesh Kulkarni
>
On Mon, 8 Aug 2022 at 14:27, Richard Biener wrote:
>
> On Mon, Aug 1, 2022 at 5:17 AM Prathamesh Kulkarni
> wrote:
> >
> > On Thu, 21 Jul 2022 at 12:21, Richard Biener
> > wrote:
> > >
> > > On Wed, Jul 20, 2022 at 5:36 PM Prathamesh Kulkarni
>
On Fri, 5 Aug 2022 at 18:26, Andre Vieira (lists)
wrote:
>
> Hi,
>
> This patch is part of the WIP patch that follows in this series. It's
> goal is to teach forwprop to handle VLA VEC_PERM_EXPRs with VLS
> CONSTRUCTORs as arguments as preparation for the 'VLA constructor' hook
> approach.
Hi Richard,
Following from off-list discussion, in the attached patch, I wrote pattern
similar to vec_duplicate_reg, which seems to work for the svld1rq tests.
Does it look OK ?
Sorry, I didn't fully understand your suggestion on integrating with
vec_duplicate_reg
pattern. For vec_duplicate_reg,
On Thu, 4 Aug 2022 at 00:41, Sam Feifer via Gcc-patches
wrote:
>
> This patch adds a new optimization to match.pd. The pattern, -x & 1,
> now gets simplified to x & 1, reducing the number of instructions
> produced.
Hi Sam,
No comments on patch, but wondering if we can similarly add another
On Thu, 21 Jul 2022 at 12:21, Richard Biener wrote:
>
> On Wed, Jul 20, 2022 at 5:36 PM Prathamesh Kulkarni
> wrote:
> >
> > On Mon, 18 Jul 2022 at 11:57, Richard Biener
> > wrote:
> > >
> > > On Fri, Jul 15, 2022 at 3:49 PM Prathamesh Kulkarni
>
On Wed, 20 Jul 2022 at 23:31, Immad Mir via Gcc-patches
wrote:
>
> This patch adds three new function attributes to GCC that
> are used for static analysis of usage of file descriptors:
>
> 1) __attribute__ ((fd_arg(N))): The attributes may be applied to a function
> that
> takes on open file
On Mon, 18 Jul 2022 at 11:57, Richard Biener wrote:
>
> On Fri, Jul 15, 2022 at 3:49 PM Prathamesh Kulkarni
> wrote:
> >
> > On Thu, 14 Jul 2022 at 17:22, Richard Sandiford
> > wrote:
> > >
> > > Richard Biener writes:
> > > > On Thu, J
On Thu, 14 Jul 2022 at 17:22, Richard Sandiford
wrote:
>
> Richard Biener writes:
> > On Thu, Jul 14, 2022 at 9:55 AM Prathamesh Kulkarni
> > wrote:
> >>
> >> On Wed, 13 Jul 2022 at 12:22, Richard Biener
> >> wrote:
> >> >
> >
Hi,
For following test case:
svint32_t foo()
{
int32x4_t v = (int32x4_t) { 1, 2, 3, 4 };
svint32_t v2 = svld1rq_s32 (svptrue_b8(), [0]);
return v2;
}
After applying workaround in forwprop to not simplify VEC_PERM_EXPR in
simplify_permutation to avoid type error in middle end (or using
On Wed, 13 Jul 2022 at 12:22, Richard Biener wrote:
>
> On Tue, Jul 12, 2022 at 9:12 PM Prathamesh Kulkarni via Gcc-patches
> wrote:
> >
> > Hi Richard,
> > For the following test:
> >
> > svint32_t f2(int a, int b, int c, int d)
> > {
> > i
Hi Richard,
For the following test:
svint32_t f2(int a, int b, int c, int d)
{
int32x4_t v = (int32x4_t) {a, b, c, d};
return svld1rq_s32 (svptrue_b8 (), [0]);
}
The compiler emits following ICE with -O3 -mcpu=generic+sve:
foo.c: In function ‘f2’:
foo.c:4:11: error: non-trivial conversion in
Hi,
My recent commit to emit asm name with -fdump-statistics-asmname
caused following ICE
for attached fortran test case.
during IPA pass: icf
power.fppized.f90:6:26:
6 | END SUBROUTINE power_print
| ^
internal compiler error: Segmentation fault
0xfddc13
On Wed, 6 Jul 2022 at 03:08, David Malcolm via Gcc-patches
wrote:
>
> On Tue, 2022-07-05 at 21:49 +0200, Tim Lange wrote:
> > This patch fixes the ICE reported in PR106181 by Arseny Solokha. With
> > this patch, the allocation size checker tries to handle floating-point
> > operands of allocation
On Mon, 20 Jun 2022 at 12:52, Richard Biener wrote:
>
> On Thu, Jun 16, 2022 at 5:05 PM Prathamesh Kulkarni via Gcc-patches
> wrote:
> >
> > Hi,
> > I just noticed -fdump-statistics supports asmname sub-option, which
> > according to the doc states:
> &g
Hi,
I just noticed -fdump-statistics supports asmname sub-option, which
according to the doc states:
"If DECL_ASSEMBLER_NAME has been set for a given decl, use that in the dump
instead of DECL_NAME. Its primary use is ease of use working backward from
mangled names in the assembly file."
When
On Mon, 6 Jun 2022 at 16:29, Richard Sandiford
wrote:
>
> Prathamesh Kulkarni writes:
> >> > {
> >> >/* The pattern matching functions above are written to look for a
> >> > small
> >> > number to begin the sequence (0, 1, N/2).
On Wed, 1 Jun 2022 at 14:12, Richard Sandiford
wrote:
>
> Prathamesh Kulkarni writes:
> > On Thu, 12 May 2022 at 16:15, Richard Sandiford
> > wrote:
> >>
> >> Prathamesh Kulkarni writes:
> >> > On Wed, 11 May 2022 at 12:44, Richard Sandiford
&g
On Mon, 23 May 2022 at 22:57, Prathamesh Kulkarni
wrote:
>
> On Mon, 9 May 2022 at 21:21, Prathamesh Kulkarni
> wrote:
> >
> > On Mon, 9 May 2022 at 19:22, Richard Sandiford
> > wrote:
> > >
> > > Prathamesh Kulkarni writes:
> > > > On T
On Thu, 12 May 2022 at 16:15, Richard Sandiford
wrote:
>
> Prathamesh Kulkarni writes:
> > On Wed, 11 May 2022 at 12:44, Richard Sandiford
> > wrote:
> >>
> >> Prathamesh Kulkarni writes:
> >> > On Fri, 6 May 2022 at 16:00, Richard Sandiford
&g
On Mon, 30 May 2022 at 13:04, Christophe Lyon wrote:
>
> Hi Prathamesh,
>
>
> On 5/27/22 09:11, Prathamesh Kulkarni via Gcc-patches wrote:
> > Hi,
> > I forgot to adjust prototype for arm_vectorize_vec_perm_const, which,
> > resulted in following
> >
Hi,
I forgot to adjust prototype for arm_vectorize_vec_perm_const, which,
resulted in following
build error:
# 00:05:33 make[3]: [Makefile:1787:
armv8l-unknown-linux-gnueabihf/bits/largefile-config.h] Error 1
(ignored)
# 00:10:53
On Thu, 26 May 2022 at 00:37, Richard Biener wrote:
>
>
>
> > Am 25.05.2022 um 21:03 schrieb Prathamesh Kulkarni
> > :
> >
> > On Wed, 25 May 2022 at 18:27, Richard Biener
> > wrote:
> >>
> >>> On Tue, May 24, 2022
On Wed, 25 May 2022 at 18:27, Richard Biener wrote:
>
> On Tue, May 24, 2022 at 9:22 PM Prathamesh Kulkarni via Gcc-patches
> wrote:
> >
> > On Tue, 24 May 2022 at 14:50, Richard Sandiford
> > wrote:
> > >
> > > Prathamesh Kulkarni writes:
> >
On Tue, 24 May 2022 at 14:50, Richard Sandiford
wrote:
>
> Prathamesh Kulkarni writes:
> > diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
> > index c5006afc00d..0a3c733ada9 100644
> > --- a/gcc/doc/tm.texi
> > +++ b/gcc/doc/tm.texi
> > @@ -6088,14 +6088,18 @@
On Fri, 29 Apr 2022 at 19:44, Marek Polacek via Gcc-patches
wrote:
>
> This patch fixes crashes with invalid attributes. Arguably it could
> make sense to assert seen_error() too.
>
> Bootstrapped/regtested on x86_64-pc-linux-gnu, ok for trunk = GCC 13?
>
> PR c++/96637
>
>
On Mon, 23 May 2022 at 18:14, Richard Sandiford
wrote:
>
> Prathamesh Kulkarni writes:
> > On Wed, 18 May 2022 at 17:27, Richard Sandiford
> > wrote:
> >>
> >> Prathamesh Kulkarni writes:
> >> > Hi,
> >> > The attached patch adds anot
On Tue, 24 May 2022 at 11:50, Richard Biener via Gcc-patches
wrote:
>
> When facing multiple PHI defs and one feeding the other we can
> postpone processing uses of one and thus can proceed.
>
> Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed.
>
> 2022-05-20 Richard Biener
>
>
On Mon, 9 May 2022 at 21:21, Prathamesh Kulkarni
wrote:
>
> On Mon, 9 May 2022 at 19:22, Richard Sandiford
> wrote:
> >
> > Prathamesh Kulkarni writes:
> > > On Tue, 3 May 2022 at 18:25, Richard Sandiford
> > > wrote:
> > >>
> > >>
Hi Richard,
The attached patch addresses formatting nits for affected targets.
Tested with make all-gcc stage1 (except for gcn).
Sorry if this sounds like a naive question, but what target triplet
should I use to build gcn port ?
Thanks,
Prathamesh
diff --git a/gcc/config/aarch64/aarch64.cc
On Wed, 18 May 2022 at 17:27, Richard Sandiford
wrote:
>
> Prathamesh Kulkarni writes:
> > Hi,
> > The attached patch adds another parameter machine_mode op_mode to
> > vec_perm_const
> > hook to specify mode of input operands. The motivation for doing this
>
Hi,
The attached patch adjusts vec_perm_const hook to accommodate the new parameter.
For rationale, please see:
https://gcc.gnu.org/pipermail/gcc-patches/2022-May/595128.html
Unfortunately, I am not sure how to cross test this patch.
make all-gcc stage-1 seems to build fine.
Is it OK to commit
Hi,
The attached patch adjusts vec_perm_const hook to accommodate the new parameter.
For rationale, please see:
https://gcc.gnu.org/pipermail/gcc-patches/2022-May/595128.html
Unfortunately, I am not sure how to cross test this patch.
make all-gcc stage-1 seems to build fine.
Is it OK to commit
Hi,
The attached patch adjusts vec_perm_const hook to accommodate the new parameter.
For rationale, please see:
https://gcc.gnu.org/pipermail/gcc-patches/2022-May/595128.html
Unfortunately, I am not sure how to cross test this patch.
make all-gcc stage-1 seems to build fine.
Is it OK to commit
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