TARGET_HARD_REGNO_CALL_PART_CLOBBERED but I would
have to extend it to include the call instruction as an argument so the
the code could determine if the call being made was to a simd or non-simd
function.
Steve Ellcey
sell...@cavium.com
2018-07-25 Steve Ellcey
* config/aarch64/aarch64.c
e call
generated in nptl/pthread_spin_lock.c. That would be useful if we
built a lipthread specifically for a platform that had LSE.
Steve Ellcey
sell...@cavium.com
? Is this a useful
feature to have in GCC?
Steve Ellcey
sell...@cavium.com
2018-07-24 Steve Ellcey
PR target/86538
* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
Add define of __ARM_FEATURE_LSE.
diff --git a/gcc/config/aarch64/aarch64-c.c b/gcc/config/aarch64
testing but any feedback on what I have so far would be
helpful.
Steve Ellcey
sell...@cavium.com
2018-07-23 Steve Ellcey
* config/aarch64/aarch64.c (aarch64_attribute_table): New array.
(aarch64_simd_decl_p): New function.
(aarch64_reg_save_mode): New function
On Fri, 2018-07-20 at 11:11 +, Wilco Dijkstra wrote:
> Steve Ellcey wrote:
>
> > Yes, I see where I missed this in aarch64_push_regs
> > and aarch64_pop_regs. I think that is why the second of
> > Wilco's two examples (f2) is wrong. I am unclear about
> > exac
why the second of
Wilco's two examples (f2) is wrong. I am unclear about
exactly what is meant by writeback and why we have it and
how that and callee_adjust are used. Any chance someone
could help me understand this part of the prologue/epilogue
code better? The comments in aarch64.c/aarch64.h
to generate this code I would appreciate some ideas. Just doing
lots of calculations with lots of intermediate values doesn't seem to be enough.
Steve Ellcey
sell...@cavium.com
[1]
https://developer.arm.com/products/software-development-tools/hpc/arm-compiler-for-hpc/vector-function-abi
2018-07-18
) and use that to set
'actual_call_used_reg_set'. In process_bb_live we know exactly what
function we are calling and can check to see if it is a 'normal'
function or a SIMD function.
Steve Ellcey
sell...@cavium.com
look at this patch and
tell me if it seems reasonable or not. It passed bootstrap and I
am running tests now. I am just wondering if there is any reason why
this target function would need to be called on non-call instructions
or if doing so is just an oversight/bug.
Steve Ellcey
sell
t=$T/install
-Wl,--dynamic-linker=$T/install/lib/ld-linux-aarch64.so.1 -Wl,-
rpath=$T/install/lib64'"
and without my patch a number of pch tests fail.
Steve Ellcey
sell...@cavium.com
2018-06-22 Steve Ellcey
* gcc.h (driver): Add explicit_link_args field.
* gcc.c (driver::drive
On Fri, 2018-06-08 at 11:17 +, Joseph Myers wrote:
> On Wed, 2 May 2018, Steve Ellcey wrote:
>
> >
> > I tracked this down to driver::maybe_run_linker where it sees the linker
> > flags and increments num_linker_inputs, this causes the routine to call
> > t
patch yet
though so I will fix that before doing the checkin.
Steve Ellcey
sell...@cavium.com
se, but someone else will need to approve.
>
> Thanks,
> Richard
Here is an updated version with the quotes put back (using %qs) and the
long lines split up. Retested with no regressions.
Steve Ellcey
sell...@cavium.com
2018-06-05 Steve Ellcey
PR target/79924
* config/
Ping.
Steve Ellcey
sell...@cavium.com
On Thu, 2018-01-11 at 15:44 -0800, Steve Ellcey wrote:
> This is a patch for PR target/79924, which says the error messages
> called from aarch64_err_no_fpadvsimd cannot be translated due to
> how they are constructed. To make them tra
Ping^2
Steve Ellcey
sell...@cavium.com
On Thu, 2018-05-17 at 14:50 -0700, Steve Ellcey wrote:
> Ping.
>
> Steve Ellcey
> sell...@cavium.com
>
>
> On Wed, 2018-05-02 at 12:47 -0700, Steve Ellcey wrote:
> >
> > This is a new version of a patch I sent out last
Ping.
Steve Ellcey
sell...@cavium.com
On Wed, 2018-05-02 at 12:47 -0700, Steve Ellcey wrote:
> This is a new version of a patch I sent out last year to stop gcc from
> trying to do a link when creating precompiled headers and a linker
> flag is also given.
>
> When I build and
I think this patch is causing a glibc testing error. The
tests math/bug-nextafter and math/bug-nexttoward are failing
due to underflow not getting set. Here is a test case that
should print nothing but is currently printing the
'did not underflow' message.
#include
#include
#include
issue.
>
> Thanks,
> Andrew
OK, I checked into that and undid the change to thunderx2t99_loadpair
and fixed thunderx2t99_asimd_load1_ldp to match it. Everything else is
the same.
Steve Ellcey
sell...@cavium.com
2018-05-09 Steve Ellcey <sell...@cavium.com>
and correct schedule file for T99.
Steve Ellcey
sell...@cavium.com
2018-05-04 Steve Ellcey <sell...@cavium.com>
* config/aarch64/thunderx2t99.md (thunderx2t99_ls_both): Delete.
(thunderx2t99_multiple): Delete psuedo-units from used cpus.
Add u
Ellcey
sell...@cavium.com
2018-05-02 Steve Ellcey <sell...@cavium.com>
* gcc.c (create_pch_flag): New variable.
(driver::prepare_infiles): Set create_pch_flag
when we are creating precompiled headers.
(driver::maybe_run_linker): Do no
and follow up comments.
Should I go ahead and add this documentation?
2018-02-20 Steve Ellcey <sell...@cavium.com>
* doc/extend.texi (__builtin_extend_pointer): Document builtin.
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index d38840e..94e47aa 100644
--- a/gcc/doc/exten
the code change I updated asm-2.c
with the error message that you getin ILP32 mode and I added asm-4.c
which does not give an error message in either LP64 or ILP32 mode.
Steve Ellcey
sell...@cavium.com
2018-02-16 Steve Ellcey <sell...@cavium.com>
PR target/83335
*
for it to be there.
Tested with no regressions, OK to checkin?
Steve Ellcey
sell...@cavium.com
2018-01-11 Steve Ellcey <sell...@cavium.com>
PR target/79924
* config/aarch64/aarch64-protos.h (aarch64_err_no_fpadvsimd): Remove
second argument.
* config/aarch64/aarch64-pro
.
Verified that it fixed gcc.target/aarch64/asm-2.c in ILP32
mode and that it caused no regressions.
Steve Ellcey
sell...@cavium.com
2018-01-05 Steve Ellcey <sell...@cavium.com>
PR target/83335
* config/aarch64/aarch64.c (aarch64_print_address_internal):
Allow non
in both LP64 and ILP32 modes).
OK to checkin?
Steve Ellcey
sell...@cavium.com
2018-01-04 Steve Ellcey <sell...@cavium.com>
PR target/83466
* config/aarch64/aarch64.c (aarch64_load_symref_appropriately):
Do address calculation in ptr_mode instead of Pmode.
diff
Ellcey
sell...@cavium.com
2018-01-04 Steve Ellcey <sell...@cavium.com>
* config/aarch64/thunderx2-t99.md (thunderx2t99_ls_both): Delete.
(thunderx2t99_multiple) Delete psuedo-units from used cpus.
(thunderx2t99_loadpair) Fix cpu unit or
On Thu, 2017-12-21 at 23:54 +0100, Matthias Klose wrote:
> On 21.12.2017 22:59, Steve Ellcey wrote:
> >
> > > As far as I understand it from Linaro connect and conversations with
> > > Debian/Ubuntu port maintainers, the correct triplet should be:
> > >
On Thu, 2017-12-21 at 20:55 +, James Greenhalgh wrote:
> On Thu, Dec 21, 2017 at 06:56:22PM +0000, Steve Ellcey wrote:
> >
> > This one line patch for multi-arch support on Aarch64 and ILP32 was
> > submitted over a year ago and pinged a number of time since then,
This one line patch for multi-arch support on Aarch64 and ILP32 was
submitted over a year ago and pinged a number of time since then,
since no one has objected and since it is only one line I am going
to check it in as an obvious fix.
Steve Ellcey
sell...@cavium.com
2017-12-21 Andrew Pinski
ACX_PROG_CC_WARNING_OPTS macro to test this. This will
cause the GCC being built to send the option in question to the
assembler and if the assembler complains that is enough to cause us to
not set enable_aarch64_lse, and thus not set try_ifunc.
Steve Ellcey
sell...@cavium.com
2017-12-07 Steve Ellcey <s
unction ?
>
> Thanks,
> James
It should be possible to check for assembler support. I will work on a
patch to do that.
Steve Ellcey
sell...@cavium.com
FYI: Since James approved the Aarch64 part and since I think the
generic part can be considered trivial, I have gone ahead and checked
this patch in.
Steve Ellcey
sell...@cavium.com
On Tue, 2017-11-28 at 16:12 -0800, Steve Ellcey wrote:
> On Tue, 2017-11-21 at 17:35 +, James Greenhalgh wr
ould honor
backslashes so I didn't break it up. The falkor_extra definition in
falkor.md that I looked at is more than 80 characters and that is one
of the reasons I wasn't sure backslashes would be honored. But I see
other places (power8.md) where the backslashes are used so I will make
that change if and when the patch is approved.
Steve Ellcey
sell...@cavium.com
with no regressions on a thunderx2.
I know we are in stage3 but I hope this type of plaform specific
change is still OK to checkin.
Steve Ellcey
sell...@cavium.com
2017-11-30 Steve Ellcey <sell...@cavium.com>
* config/aarch64/thunderx2-t99.md (thunderx2t99_branch): Ad
/
> * gcc.dg/asm-4.c: Skip on AArch64 with ILP32 as test is incorrect.
>
This fixed the build problems on my system with ILP32.
Steve Ellcey
sell...@cavium.com
FYI: Here is a cut down test case showing the failure:
int foo (void) { }
extern void plunk ();
int splat (void)
{
static int once = 0;
plunk (, foo);
}
% obj/gcc/gcc/cc1 -mabi=ilp32 -O2 -quiet x.i
during RTL pass: final
x.i: In function ‘splat’:
x.i:7:1: internal compiler error:
-elf/gcc1/aarch64_be-none-elf/ilp32/libgcc'
> make[3]: *** [multi-do] Error 1
I am seeing this failure too, on my aarch64-linux-gnu build where I
have ILP32 enabled.
Steve Ellcey
sell...@cavium.com
' so there is no real change for any
other platform.
Steve Ellcey
sell...@cavium.com
of XPASS by removing aarch64 from the list
of expected failures.
Steve Ellcey
sell...@cavium.com
2017-11-20 Steve Ellcey <sell...@cavium.com>
PR target/81356
* gfortran.dg/pr45636.f90 (aarch64*-*-*): Remove from xfail list.
diff --git a/gcc/testsuite/gfortran.dg/pr45636.f90
wprop2
> "memset" 0 (found 2 times)
>
> Is it expected?
>
> Christophe
I think it is. I hadn't seen this failure before but I may not have
tested my change with Fortran. I am going to consider fixing this an
obvious change and will check in the fix (removing aarch
csetw0, eq
1c: 3440 cbz w0, 24 <libat_compare_exchange_8+0x24>
20: d65f03c0 ret
24: f924 str x4, [x1]
28: d65f03c0 ret
2c: d503201f nop
Steve Ellcey
sell...@cavium.com
Re-ping with a CC to the Aarch64 maintainers.
Steve Ellcey
sell...@cavium.com
On Tue, 2017-10-24 at 11:11 -0700, Steve Ellcey wrote:
> Ping.
>
> Steve Ellcey
> sell...@cavium.com
>
> On Tue, 2017-10-03 at 11:57 -0700, Steve Ellcey wrote:
> >
> > On Mon, 2017-
re-re-ping.
Steve Ellcey
sell...@cavium.com
On Tue, 2017-10-24 at 11:16 -0700, Steve Ellcey wrote:
> Re-ping.
>
> Steve Ellcey
> sell...@cavium.com
>
> On Mon, 2017-09-25 at 10:36 -0700, Steve Ellcey wrote:
> >
> > Ping.
> >
> > Steve Ellcey
> &g
Re-ping with an added cc to the aarch64 maintainers.
Steve Ellcey
On Tue, 2017-10-24 at 11:06 -0700, Steve Ellcey wrote:
> Ping.
>
> Steve Ellcey
>
> On Fri, 2017-10-06 at 14:01 -0700, Steve Ellcey wrote:
> >
> > This patch is a follow up to a discussion at:
>
'gcc foo.h main.c' so now I only
skip the link phase when creating pch's is the only thing being done.
Steve Ellcey
sell...@cavium.com
2017-11-14 Steve Ellcey <sell...@cavium.com>
* gcc.c (create_pch_flag): New variable.
(driver::prepare_infiles): Set create_pch_fl
d got no regressions, OK to checkin?
2017-11-14 Steve Ellcey <sell...@cavium.com>
* gcc.c (driver::maybe_run_linker): Ignore linker options
when checking for linker inputs.
diff --git a/gcc/gcc.c b/gcc/gcc.c
index 43e6d59..61c7561 100644
--- a/gcc/gcc.c
+++ b/gcc/gcc.c
@@ -
1569.html
using '%<target(\"cpu=\")%>' was also suggested by Martin in that
same thread at:
https://gcc.gnu.org/ml/gcc-patches/2017-09/msg01277.html
https://gcc.gnu.org/ml/gcc-patches/2017-09/msg01469.html
as being more consistent with other usage (mainly config/i386/i386.c).
Steve Ellcey
sell...@cavium.com
ighting it's
> trivial to tell which subcase of usage is being referred to.
>
> R.
I have no problem with that. Here is a version that uses "pragma or
attribute".
Tested on ToT with no regressions. Ok to checkin?
Steve Ellcey
sell...@cavium.com
ChangeLog:
2017-10-30 Steve
Ping. There was discussion of larger fixes for this including a
type promotion pass but this patch seems small, safe, and in line
with other platforms (like arm32).
Steve Ellcey
sell...@cavium.com
On Thu, 2017-09-14 at 11:43 -0700, Steve Ellcey wrote:
> On Thu, 2017-09-14 at 11:53 -0600, J
Re-ping.
Steve Ellcey
sell...@cavium.com
On Mon, 2017-09-25 at 10:36 -0700, Steve Ellcey wrote:
> Ping.
>
> Steve Ellcey
> sell...@cavium.com
>
>
> On Fri, 2017-09-15 at 11:22 -0700, Steve Ellcey wrote:
> >
> > PR 81356 points out that doing a __
Ping.
Steve Ellcey
sell...@cavium.com
On Tue, 2017-10-03 at 11:57 -0700, Steve Ellcey wrote:
> On Mon, 2017-10-02 at 15:38 +0100, Szabolcs Nagy wrote:
> >
> >
> > looks good to me, but i cannot approve.
> >
> > (this will make libatomic depend on ifuncs on aa
Ping.
Steve Ellcey
On Fri, 2017-10-06 at 14:01 -0700, Steve Ellcey wrote:
> This patch is a follow up to a discussion at:
>
> https://gcc.gnu.org/ml/gcc/2017-06/msg00126.html
>
> For some reason the simd version of fnma in aarch64-simd.md
> is not in the canonical form
Thanks for looking at this Frederic, I don't see your name in the
MAINTAINERS list so I assume I still need approval from one of the
diagnostic message maintainers (Dodji or David) or maybe an Aarch64
maintainer or a global maintainer.
Ping?
Steve Ellcey
sell...@cavium.com
On Sun, 2017-10-08
Ping.
Steve Ellcey
sell...@cavium.com
On Mon, 2017-09-25 at 16:25 -0700, Steve Ellcey wrote:
> This is a new version of my patch to fix PR target/79868, where some
> error messages are impossible to translate correctly due to how the
> strings are dynamically constructed. It also incl
code generation (an extra dup instruction).
I have moved the 'neg', rebuilt GCC and retested with this patch
There were no regressions. OK to checkin?
2017-10-06 Steve Ellcey <sell...@cavium.com>
* config/aarch64/aarch64-simd.md (fnma4): Move neg operator
to can
ti_mem_insns. Would please interested parties help me
> test it?
>
> Comments?
This patch is not applying to my ToT. The code
in autopref_rank_for_schedule doesn't seem to match what I have in my
tree.
Steve Ellcey
t on this email to see if one on them can
review/approve Wilco's patch which was applied and then reverted. If
not, can one of the global maintainers revert the original patch that
broke the bootstrap?
Steve Ellcey
sell...@cavium.com
On Wed, 2017-10-04 at 16:41 +0100, Richard Earnshaw (lists) wrote:
> On 02/10/17 10:05, Sudi Das wrote:
> >
> > 2017-10-02 Sudakshina Das
> >
> > * config/aarch64/aarch64-protos.h (enum simd_immediate_check): New
> > check type
> > for aarch64_simd_valid_immediate.
>
s been fixed but it involved a change to
libatomic/ibatomic_i.h that conflicted with this patch so I am
including an updated version that will apply cleanly to the top of
tree. Only libatomic_i.h changed.
Steve Ellcey
sell...@cavium.com
2017-10-03 Steve Ellcey <sell...@cavium.com>
anges I can take
> mine out.
>
> Martin
I haven't submitted anything for this problem. This patch fixed things
for my aarch64 build. I definitely needed the libatomic_i.h changes as
well as the configure change.
Steve Ellcey
sell...@cavium.com
On Wed, 2017-09-20 at 08:37 -0700, Steve Ellcey wrote:
> On Tue, 2017-09-19 at 09:16 -0600, Martin Sebor wrote:
> > On 09/18/2017 03:44 PM, Joseph Myers wrote:
> > > On Mon, 18 Sep 2017, Martin Sebor wrote:
> > > > It's meant as an escape hatch. It allows d
rences, and
changed HWCAP_TYPE to IFUNC_RESOLVER_ARGS.
Here is the new patch, tested with no regressions.
Steve Ellcey
sell...@cavium.com
2017-09-29 Steve Ellcey <sell...@cavium.com>
* Makefile.am (ARCH_AARCH64_LINUX): Add IFUNC_OPTIONS and
libatomic_la_LIBADD.
* config/l
On Fri, 2017-09-29 at 21:43 +0200, Christophe Lyon wrote:
> On 29 September 2017 at 21:39, Steve Ellcey <sell...@cavium.com>
> wrote:
> >
> > On Fri, 2017-09-29 at 21:14 +0300, Alexander Monakov wrote:
> > >
> > >
tch ranking heuristic is still wrong if
> multi_mem_insn_p
> may be true; please try this patch.
>
> * haifa-sched.c (autopref_rank_data): Remove.
> (autopref_rank_for_schedule): Only use min_offset difference.
This fixed the build for me on aarch64. I am still running the
testsuite.
Steve Ellcey
sell...@cavium.com
Ping.
Steve Ellcey
sell...@cavium.com
On Thu, 2017-08-31 at 10:24 -0700, Steve Ellcey wrote:
> On Tue, 2017-08-29 at 12:25 +0100, Szabolcs Nagy wrote:
> >
> >
> > in glibc the hwcap is not used, because it has accesses to
> > cached dispatch info, but in libatomic u
and with other GCC errors. This was worked out with help
from Martin Sebor. I also had to fix some tests to match the new error
string formats.
Tested on Aarch64 with no regressions, OK to checkin?
Steve Ellcey
sell...@cavium.com
2017-09-25 Steve Ellcey <sell...@cavium.com>
PR target
Ping.
Steve Ellcey
sell...@cavium.com
On Fri, 2017-09-15 at 11:22 -0700, Steve Ellcey wrote:
> PR 81356 points out that doing a __builtin_strcpy of an empty string on
> aarch64 does a copy from memory instead of just writing out a zero byte.
> In looking at this I found that it wa
On Thu, 2017-09-21 at 12:37 +, Joseph Myers wrote:
> On Tue, 5 Sep 2017, Steve Ellcey wrote:
>
> >
> > 2017-09-05 Steve Ellcey <sell...@cavium.com>
> >
> > * config.gcc: Add new case statement to set
> > default_gnu_indirec
64/target_attr_12.c
gcc.target/aarch64/target_attr_17.c
But I thought we should try and get some agreement on the format of the
messages before updating the tests. If we think these changes look
good I can submit a final patch that includes the testsuite changes.
Steve Ellcey
sell...@cavium.com
201
On Tue, 2017-09-19 at 10:49 -0600, Martin Sebor wrote:
> On 09/19/2017 09:54 AM, Steve Ellcey wrote:
> > On Tue, 2017-09-19 at 09:50 +0200, Frédéric Marchal wrote:
> > >
> > > >
> > > > error (is_pragma
> > > >
7-09/msg00285.html
Steve Ellcey
sell...@cavium.com
unction" != xyes &&
test x"$multi_arch" = xyes; then
AC_MSG_WARN([--enable-multi-arch support recommends a gcc with gnu-
indirect-function support.
Please use a gcc which supports it by default or configure gcc with --
enable-gnu-indirect-function])
fi
Steve Ellcey
sell...@cavium.com
Interesting new data point. aarch64 GCC does not enable the
resolver/indirect function feature by default (--enable-gnu-indirect-
function is not set by default). If I enable this on the GCC build
then GCC can build glibc. Without it, the glibc build fails.
Steve Ellcey
sell...@cavium.com
On Wed, 2017-09-20 at 10:17 -0600, Martin Sebor wrote:
>
> The comment copied below from sysdeps/aarch64/multiarch/memmove.c
> suggests this might be deliberate:
>
> /* Redefine memmove so that the compiler won't complain about the
> type
> mismatch with the IFUNC selector in strong_alias,
ne in r252976.
>
> Thanks
> Martin
This patch is causing my gcc/glibc ToT build to fail on aarch64. I am
not sure if everything should be working at this point or not or if
there is more that needs to be done. The problem is with the memcpy,
memmove, etc. ifuncs on aarch64.
Steve Ellcey
se
t; Frederic
Are '%<...%>' described somewhere? These aren't normal printf options
are they? I don't think I have ever used them before. I am also not
sure why you have '%s=' means vs. '%s'. Is it even worth breaking the
word 'arch' out of the string vs. having something like:
error (is_pragma
? G_("missing name in %<#pragma target \"arch\"%>)
: G_("missing name in % attribute"));
Steve Ellcey
sell...@cavium.com
patch.
OK to checkin?
Steve Ellcey
sell...@cavium.com
2017-09-18 Steve Ellcey <sell...@cavium.com>
PR target/79868
* config/aarch64/aarch64-c.c (aarch64_pragma_target_parse):
Change argument type on aarch64_process_target_attr call.
* config/aarch64/a
as well.
Bootstrapped and tested without regressions, OK to checkin?
Steve Ellcey
sell...@cavium.com
2017-09-15 Steve Ellcey <sell...@cavium.com>
PR target/81356
* config/aarch64/aarch64.c (aarch64_use_by_pieces_infrastructure_p):
t I thought it helped make it clear what we were doing and the
compiler should optimize it away anyway.
OK to checkin this fix while we consider longer term options?
Steve Ellcey
sell...@cavium.com
2017-09-14 Steve Ellcey <sell...@cavium.com>
PR target/77729
*
On Thu, 2017-09-14 at 09:03 -0600, Jeff Law wrote:
> On 09/13/2017 03:46 PM, Steve Ellcey wrote:
> >
> > In arm32 rtl expansion, when reading the QI memory location, I see
> > these instructions get generated:
> >
> > (insn 10 3 11 2 (set (reg:SI 119)
> >
On Wed, 2017-09-13 at 22:39 +, Wilco Dijkstra wrote:
> Steve Ellcey wrote:
>
> > And in aarch64 rtl expansion I see:
> >
> > (insn 10 9 11 (set (reg:QI 81)
> > (mem:QI (reg/v/f:DI 80 [ string ]) [0 *string_9(D)+0 S1
> A8])) "pr77729.c":3
rch64 I only know that I set the bottom 8
bits and I don't know anything about the higher bits, meaning I have to
keep the AND instruction to mask out the upper bits on aarch64.
I think we should change the movqi/movhi expansions on aarch64 to
recognize that the ldrb/ldrh instructions zero out the up
This patch fixes the documentation issues pointed out in PR target/82066.
It may be considered obvious enough to just check in but I'd rather have
someone look it over to make sure I didn't mess something up.
Steve Ellcey
sell...@cavium.com
2017-09-13 Steve Ellcey <sell...@cavium.
and testsuite run that had no regressions.
OK to checkin?
2017-09-13 Steve Ellcey <sell...@cavium.com>
PR target/77729
* config/aarch64/aarch64.c (aarch64_rtx_costs):
Handle cost of *iorqi3_uxtw instruction.
* config/aarch64/aarch64.md (*iorqi3_uxtw
Ping, also adding fort...@gcc.gnu.org which I seem to left out when
sending this to gcc-patches@gcc.gnu.org.
Steve
On Fri, 2017-08-25 at 09:46 -0700, Steve Ellcey wrote:
> My earlier patch to update tests and resolve PR tree-
> optimization/80925
> did not include FORTRAN, jus
On Tue, 2017-09-12 at 09:39 -0700, Ian Lance Taylor wrote:
> On Tue, Sep 12, 2017 at 3:59 AM, Wilco Dijkstra <Wilco.Dijkstra@arm.c
> om> wrote:
> >
> > Steve Ellcey wrote:
> > >
> > > This patch fixes the ttest failures on aarch64 by adding
> > &
On Tue, 2017-09-12 at 09:39 -0700, Ian Lance Taylor wrote:
> On Tue, Sep 12, 2017 at 3:59 AM, Wilco Dijkstra <Wilco.Dijkstra@arm.c
> om> wrote:
> >
> > Steve Ellcey wrote:
> > >
> > > This patch fixes the ttest failures on aarch64 by adding
> > &
This patch fixes the ttest failures on aarch64 by adding AM_CFLAGS to
the test options, like btest already does and as Wilco says works for
him in Comment #4 of the bug report.
Tested by me on aarch64. Ok to checkin?
Steve Ellcey
sell...@cavium.com
2017-09-11 Steve Ellcey <s
ting of default_gnu_indirect_function, but I
don't think I changed any defaults.
Steve Ellcey
sell...@cavium.com
2017-09-05 Steve Ellcey <sell...@cavium.com>
* config.gcc: Add new case statement to set
default_gnu_indirect_function. Remove it from x86_64-*-linux*,
)
Steve Ellcey
sell...@cavium.com
it they can change
the type if necessary.
Steve Ellcey
sell...@cavium.com
2017-08-31 Steve Ellcey <sell...@cavium.com>
* Makefile.am (ARCH_AARCH64_LINUX_LSE): Add IFUNC_OPTIONS and
libatomic_la_LIBADD.
* config/linux/aarch64/host-config.h: New file.
* config
batomic configure.tgt script as well
to set the resolver arg type when I resbumit the gcc libatomic patch so
that we can have the correct prototype in libatomic_i.h.
Steve Ellcey
sell...@cavium.com
asm__ (".type " "__libc_memcpy" ", %gnu_indirect_function");
extern __typeof (__libc_memcpy) memcpy __attribute__ ((alias
("__libc_memcpy")));
Steve Ellcey
sell...@cavium.com
the problem to these 3 tests that are printing
out 0 valued character variables. The variables are supposed to be 0,
because that is what the test is checking for, so my fix is to print
out the ichar value of the character variable instead of the variable
itself.
Steve Ellcey
sell...@cavium.com
My earlier patch to update tests and resolve PR tree-optimization/80925
did not include FORTRAN, just C and C++. This patch makes the same
changes as the earlier patches but for FORTRAN. Tested on aarch64.
OK to checkin?
Steve Ellcey
sell...@cavium.com
Orginal patches/discussion is at:
https
Ping.
> 2017-08-07 Steve Ellcey <sell...@cavium.com>
>
> * Makefile.am (ARCH_AARCH64_LINUX_LSE): Add IFUNC_OPTIONS and
> libatomic_la_LIBADD.
> * config/linux/aarch64/host-config.h: New file.
> * config/linux/aarch64/init.c: New file
think it is worth the time
to find it and so I would like to just remove the check so that the
testcase no longer fails.
OK for checkin? Tested on aarch64.
Steve Ellcey
sell...@cavium.com
2017-08-10 Steve Ellcey <sell...@cavium.com>
PR target/81643
* gcc.target/a
the error using that. I am not sure why.
Steve Ellcey
sell...@cavium.com
On Fri, 2017-08-04 at 16:27 +0200, Rainer Orth wrote:
> Richard Biener <richard.guent...@gmail.com> writes:
>
> >
> > On Fri, Jul 28, 2017 at 8:22 PM, Steve Ellcey <sell...@cavium.com>
> >
It would probably help if I included the patch.
Steve Ellcey
sell...@cavium.com
2017-08-07 Steve Ellcey <sell...@cavium.com>
* Makefile.am (ARCH_AARCH64_LINUX_LSE): Add IFUNC_OPTIONS and
libatomic_la_LIBADD.
* config/linux/aarch64/host-config.h: Ne
it is useful, both for testing and for end
users.
Tested on aarch64, OK for checkin?
Steve Ellcey
sell...@cavium.com
2017-08-07 Steve Ellcey <sell...@cavium.com>
* Makefile.am (ARCH_AARCH64_LINUX_LSE): Add IFUNC_OPTIONS and
libatomic_la_LIBADD.
* config/linux/aarch6
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