Hi Thomas,
On 5/25/23 13:56, Thomas Schwinge wrote:
Hi!
On 2022-02-08T00:22:37+0800, Kito Cheng via Gcc-patches
wrote:
Hi Maciej:
Thanks for doing this, OK to trunk.
On Tue, Feb 1, 2022 at 7:04 AM Maciej W. Rozycki wrote:
Use `gcc-dg-runtest' test driver rather than `dg-runtest' to run t
On 5/24/23 15:13, Vineet Gupta wrote:
PASS: gcc.target/riscv/zmmul-2.c -O2 -flto -fuse-linker-plugin
-fno-fat-lto-objects (test for excess errors)
PASS: gcc.target/riscv/zmmul-2.c -O2 -flto -fuse-linker-plugin
-fno-fat-lto-objects scan-assembler-times mul\t 1
PASS: gcc.target/riscv
On 5/24/23 13:34, Thomas Schwinge wrote:
Yeah, at this point I'm not sure whether my recent changes really are
related/relevant here.
Apparently in addition to Kito's patch below, If I comment out the
additional torture options, failures go down drastically.
Meaning that *all* those ERRORs dis
+CC Thomas and Maciej
On 5/22/23 20:52, Vineet Gupta wrote:
On 5/22/23 02:17, Kito Cheng wrote:
Ooops, seems still some issue around here,
Yep still 5000 fails :-(
but I found something might
related this issue:
https://github.com/gcc-mirror/gcc/commit
On 5/22/23 02:17, Kito Cheng wrote:
Ooops, seems still some issue around here,
Yep still 5000 fails :-(
but I found something might
related this issue:
https://github.com/gcc-mirror/gcc/commit/d6654a4be3ba44c0d57be7c8a51d76d9721345e1
https://github.com/gcc-mirror/gcc/commit/23c49bb8d09bc3b
On 5/19/23 09:33, Jeff Law wrote:
On 5/18/23 14:57, Vineet Gupta wrote:
[part #2 of PR/109279]
SPEC2017 deepsjeng uses large constants which currently generates
less than
ideal code. This fix improves codegen for large constants which have
same low and hi parts: e.g.
long long f(void
On 5/19/23 09:36, Palmer Dabbelt wrote:
Works for me. Did you start that performance backports branch?
Either way, I think this should go on it.
Please note that there is a bit of dependency chain. Assuming the
aforementioned branch is gcc 13.1 based, this change also needs my
splitter r
On 5/17/23 00:52, Andreas Schwab wrote:
On Mai 16 2023, Vineet Gupta wrote:
Yes I was seeing similar tcl errors and such - and in my case an even
higher count.
They are coming from commit d6654a4be3b.
As of a726d007f197 today I get a gazzilion splat for riscv multilib
dejagnu runs and
/riscv/riscv.cc (riscv_split_integer): if loval is equal
to hival, ASHIFT the corresponding regs.
Signed-off-by: Vineet Gupta
---
gcc/config/riscv/riscv.cc | 13 +
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv
On 5/16/23 19:53, Palmer Dabbelt wrote:
Probably, I'll go try and bump stuff and see if it works...
Word of caution: Best to not disturb your existing setup, a try a fresh
checkout first
On 5/16/23 19:21, Kito Cheng wrote:
Palmer:
For short-term, this should help your internal test:
https://github.com/riscv-collab/riscv-gnu-toolchain/pull/1233
That only helps if using bleeding edge toolchain scripts (which I
regularly do and so did Patrick).
Palmer has a fork of toolchain s
On 5/16/23 18:29, Palmer Dabbelt wrote:
On Tue, 16 May 2023 18:04:37 PDT (-0700), Vineet Gupta wrote:
+ Christoph, Jiawei
On 5/16/23 17:20, Palmer Dabbelt wrote:
We really need to add some CI around RV toolchains to trip on these
sooner !
Sounds like you're volunteering to set o
+ Christoph, Jiawei
On 5/16/23 17:20, Palmer Dabbelt wrote:
We really need to add some CI around RV toolchains to trip on these
sooner !
Sounds like you're volunteering to set one up?
Patrick's github CI patch seems to be a great start. Lets wait for it to
get merged, that will at least ca
On 5/16/23 16:06, Palmer Dabbelt wrote:
A few of us were talking about test-related issues in the patchwork
meeting
this morning. I bumped to trunk and did a full rebuild, I'm getting the
following (it's in riscv-systems-ci/riscv-gnu-toolchain). This is
about what I
remember seeing last time
On 4/20/23 09:56, Jeff Law via Gcc-patches wrote:
On 1/17/23 15:59, Vineet Gupta wrote:
This could be useful for library writers who want to write code variants
for fast vs. slow unaligned accesses.
We distinguish explicit -mstrict-align (1) vs. slow_unaligned_access
cpu tune param (2
On 4/25/23 13:03, Jeff Law wrote:
On 4/25/23 11:25, Vineet Gupta wrote:
On 4/18/23 11:36, Jeff Law via Gcc-patches wrote:
On 4/18/23 08:36, Vineet Gupta wrote:
[partial addressing of PR/109279]
RISCV splitters have restrictions to not create pesudos due to a
combine
limitatation
On 4/18/23 11:36, Jeff Law via Gcc-patches wrote:
On 4/18/23 08:36, Vineet Gupta wrote:
[partial addressing of PR/109279]
RISCV splitters have restrictions to not create pesudos due to a combine
limitatation. And despite this being a split-during-combine limitation,
all split passes take
On 4/19/23 00:05, Richard Biener wrote:
On Tue, Apr 18, 2023 at 10:51 PM Vineet Gupta wrote:
when debugging expmed.[ch] for PR/108987 saw that some of the cost arrays have
less than ideal layout as follows:
x_shift*cost[0..63][speed][modes]
We would want speed to be first index since a
00 AM Vineet Gupta wrote:
On 4/21/23 02:30, Richard Sandiford wrote:
No approval is needed when adding oneself to write-after-approval.
The fact that one's able to make the change is proof enough.
Thx Richard.
Noob question: I tried to commit/push but failed.
| $ git remote show upstream
On 4/21/23 02:30, Richard Sandiford wrote:
No approval is needed when adding oneself to write-after-approval.
The fact that one's able to make the change is proof enough.
Thx Richard.
Noob question: I tried to commit/push but failed.
| $ git remote show upstream
| * remote upstream
| Fetch
ChangeLog:
* MAINTAINERS (Write After Approval): Add myself.
(Ref: <680c7bbe-5d6e-07cd-8468-247afc65e...@gmail.com>)
Signed-off-by: Vineet Gupta
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index cebf45d49e56..5f25617212a5 100644
()): Access x_shift*_cost array directly.
Signed-off-by: Vineet Gupta
---
Changes since v1:
- Post a non stale version of patch
---
gcc/expmed.h | 27 +--
1 file changed, 13 insertions(+), 14 deletions(-)
diff --git a/gcc/expmed.h b/gcc/expmed.h
index c747a0da1637
On 4/18/23 11:36, Jeff Law wrote:
On 4/18/23 08:36, Vineet Gupta wrote:
[partial addressing of PR/109279]
RISCV splitters have restrictions to not create pesudos due to a combine
limitatation. And despite this being a split-during-combine limitation,
all split passes take the hit due to
()): Access x_shift*_cost array directly.
Signed-off-by: Vineet Gupta
---
gcc/expmed.h | 27 +--
1 file changed, 13 insertions(+), 14 deletions(-)
diff --git a/gcc/expmed.h b/gcc/expmed.h
index c747a0da1637..d032beaef550 100644
--- a/gcc/expmed.h
+++ b/gcc/expmed.h
in_splitter arg.
riscv_force_temporary() drop in_splitter arg.
* config/riscv/riscv-protos.h: riscv_move_integer() drop in_splitter
arg.
riscv_split_symbol() drop in_splitter arg.
Signed-off-by: Vineet Gupta
---
Changes since v1:
- Added customary Changlog
---
gcc/con
/109279 and was suggested by
Andrew Pinski.
Signed-off-by: Vineet Gupta
---
gcc/config/riscv/riscv-protos.h | 4 +--
gcc/config/riscv/riscv.cc | 46 +
gcc/config/riscv/riscv.md | 8 +++---
3 files changed, 24 insertions(+), 34 deletions(-)
diff --g
gcc.target/riscv/pr108987.c: New test.
Signed-off-by: Vineet Gupta
---
gcc/config/riscv/riscv.cc | 3 ++-
gcc/testsuite/gcc.target/riscv/pr108987.c | 9 +
gcc/testsuite/gcc.target/riscv/zba-shNadd-07.c | 6 +++---
3 files changed, 14 insertions(+), 4 deletions(-)
c
.
* gcc.target/riscv/predef-align-4.c: New test.
* gcc.target/riscv/predef-align-5.c: New test.
Signed-off-by: Vineet Gupta
---
gcc/config/riscv/riscv-c.cc | 11 +++
gcc/config/riscv/riscv.cc | 9 +
gcc/config/riscv/riscv.h
On 11/13/22 15:05, Christoph Muellner wrote:
+static bool
+riscv_overlap_op_by_pieces (void)
+{
+ return tune_param->overlap_op_by_pieces;
Does this not need to be gated on unaligned access enabled as well.
-Vineet
On 10/13/22 15:39, Jeff Law via Gcc-patches wrote:
On 10/11/22 17:31, Vineet Gupta wrote:
I expect that the pressure for a proper fix upstream (instead of a
backward compatible compromise) will increase over time (once people
start building big iron based on RISC-V and start hunting
On 10/11/22 13:46, Christoph Müllner wrote:
On Tue, Oct 11, 2022 at 9:31 PM Palmer Dabbelt wrote:
On Tue, 11 Oct 2022 12:06:27 PDT (-0700), Vineet Gupta wrote:
> Hi Christoph, Kito,
>
> On 5/5/21 12:36, Christoph Muellner via Gcc-patches wrote:
>> This se
Hi Christoph, Kito,
On 5/5/21 12:36, Christoph Muellner via Gcc-patches wrote:
This series provides a cleanup of the current atomics implementation
of RISC-V:
* PR100265: Use proper fences for atomic load/store
* PR100266: Provide programmatic implementation of CAS
As both are very related, I
On 10/4/22 19:24, Kito Cheng wrote:
Committed, and added ChangeLog, remember to add that next time:)
Oops sorry, I will.
Thx,
-Vineet
On 9/2/22 14:05, Vineet Gupta wrote:
Came across this deprecated symbol when looking around for
-mexplicit-relocs handling in code
Signed-off-by: Vineet Gupta
No rush but looks like this got lost in the bigger thread about
LOAD_ADDRESS_MACRO.
Thx,
-Vineet
---
gcc/config/riscv/riscv
The current macro has several && and || making it really hard to understand
the first time.
Signed-off-by: Vineet Gupta
---
Since we are on this topic, perhaps get this simplification too.
But I'm not sure if the current checking of local symbol can be simplified
a bit. Isn
Came across this deprecated symbol when looking around for
-mexplicit-relocs handling in code
Signed-off-by: Vineet Gupta
---
gcc/config/riscv/riscv-c.cc | 5 -
gcc/testsuite/gcc.target/riscv/predef-1.c | 3 ---
gcc/testsuite/gcc.target/riscv/predef-2.c | 3 ---
gcc/testsuite
On 8/31/22 13:39, Vineet Gupta wrote:
On 8/31/22 07:57, Palmer Dabbelt wrote:
if (flag_pic)
- riscv_cmodel = CM_PIC;
+ riscv_cmodel = CM_MEDANY;
/* We get better code with explicit relocs for CM_MEDLOW, but
worse code for the others (for now). Pick the best default
Came across this deprecated symbol when looking around for
-mexplicit-relocs handling in code
Signed-off-by: Vineet Gupta
---
gcc/config/riscv/riscv-c.cc | 3 ---
gcc/testsuite/gcc.target/riscv/predef-1.c | 3 ---
gcc/testsuite/gcc.target/riscv/predef-2.c | 3 ---
gcc/testsuite
On 8/31/22 07:57, Palmer Dabbelt wrote:
if (flag_pic)
- riscv_cmodel = CM_PIC;
+ riscv_cmodel = CM_MEDANY;
/* We get better code with explicit relocs for CM_MEDLOW, but
worse code for the others (for now). Pick the best default. */
I'm fine either way on this one: having
On 8/31/22 07:57, Palmer Dabbelt wrote:
On Tue, 30 Aug 2022 10:48:29 PDT (-0700), Vineet Gupta wrote:
Came across this deprecated symbol when looking around for
-mexplicit-relocs handling in code
Signed-off-by: Vineet Gupta
---
gcc/config/riscv/riscv-c.cc | 3 ---
1 file changed, 3 deletions
CM_PIC is no longer doing anything directly. Removing it might
potentially affect USE_LOAD_ADDRESS_MACRO() but seems unlikely.
Signed-off-by: Vineet Gupta
---
gcc/config/riscv/riscv-c.cc | 4
gcc/config/riscv/riscv-opts.h | 3 +--
gcc/config/riscv/riscv.cc | 2 +-
3 files changed
/ medlow |9 / 7 |10959 / 2764 |0 / 0 |
rv32imac/ ilp32/ medlow |9 / 7 |10959 / 2764 |0 / 0 |
rv64imac/ lp64/ medlow | 13 /11 |11016 / 2776 |0 / 0 |
Thx,
-Vineet
Vineet Gupta (2):
RISC-V: remove deprecate pic code model macro
RISC-V
Came across this deprecated symbol when looking around for
-mexplicit-relocs handling in code
Signed-off-by: Vineet Gupta
---
gcc/config/riscv/riscv-c.cc | 3 ---
1 file changed, 3 deletions(-)
diff --git a/gcc/config/riscv/riscv-c.cc b/gcc/config/riscv/riscv-c.cc
index eb7ef09297e9
On 5/29/22 20:50, Kito Cheng via Gcc-patches wrote:
Committed, thanks!
Can this be backported to gcc-12 please.
Thx,
-Vineet
On Fri, May 27, 2022 at 10:37 AM Vineet Gupta wrote:
Commit 9ddd44b58649d1d ("RISC-V: Provide `fmin'/`fmax' RTL pattern") added
tests which
Hi Jeff,
On 6/26/22 12:05, Jeff Law via Gcc-patches wrote:
On 5/29/2022 9:53 PM, Vineet Gupta wrote:
These tests validate fp conversions with various rounding modes which
would not work on soft-float ABIs.
On -march=rv64imac/-mabi=lp64 this reduces 5 unique failures (overall 35
due to multi
Hi Wei,
On 6/8/22 02:35, jiawei wrote:
From: Jia-wei Chen
In rv32 regression test, this cases will report an error:
"cc1: error: ABI requires '-march=rv32'"
Add '-mabi' option will fix this.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/pr105666.c: New options.
---
gcc/testsuite/
-off-by: Vineet Gupta
---
gcc/testsuite/gcc.dg/torture/fp-double-convert-float-1.c | 1 +
gcc/testsuite/gcc.dg/torture/fp-int-convert-timode-3.c| 1 +
gcc/testsuite/gcc.dg/torture/fp-int-convert-timode-4.c| 1 +
gcc/testsuite/gcc.dg/torture/fp-uint64-convert-double-1.c | 1 +
gcc
tto.
* gcc.target/riscv/smaxf.c: Ditto.
* gcc.target/riscv/smin-ieee.c: Ditto.
* gcc.target/riscv/smin.c: Ditto.
* gcc.target/riscv/sminf-ieee.c: Ditto.
* gcc.target/riscv/sminf.c: Ditto.
* gcc.target/riscv/pr105666.c: Ditto.
Signed-off-by: Vineet Gupt
gcc.target/riscv/smin.c: Ditto.
* gcc.target/riscv/sminf-ieee.c: Ditto.
* gcc.target/riscv/sminf.c: Ditto.
Signed-off-by: Vineet Gupta
---
v2:
Fixed the SoB snafu in v1
---
gcc/testsuite/gcc.target/riscv/fmax.c | 1 +
gcc/testsuite/gcc.target/riscv/fmaxf.c | 1 +
gcc/tes
From: Vineet Gupta
Commit 9ddd44b58649d1d ("RISC-V: Provide `fmin'/`fmax' RTL pattern") added
tests which check for hard float instructions which obviously fails on
soft-float ABI builds.
So constraint with "dg-require-effective-target hard_float"
This reduces bun
On 5/24/22 18:32, Palmer Dabbelt wrote:
Ping, IMO this needs to be (re)considered for trunk.
This goes really nicely with riscv_slow_unaligned_access_p==false, to
elide the unrolled tail copies for trailer word/sword/byte accesses.
@Kito, @Palmer ? Just from codegen pov this seems to be a no
On 7/22/21 15:41, Christoph Muellner via Gcc-patches wrote:
This patch enables the overlap-by-pieces feature of the by-pieces
infrastructure for inlining builtins in case the target has set
riscv_slow_unaligned_access_p to false.
An example to demonstrate the effect for targets with fast unal
On 5/24/22 00:59, Kito Cheng wrote:
Committed, thanks!
Thx for the quick action Kito,
Can this be backported to gcc 12 as well ?
Thx,
-Vineet
On Tue, May 24, 2022 at 3:40 AM Philipp Tomsich
wrote:
Good catch!
On Mon, 23 May 2022 at 20:12, Vineet Gupta wrote:
Under extreme register
Ping ! With commit restrictions relaxed now, can this be added to trunk
now ?
Thx,
-Vineet
On 2/6/22 22:06, Vineet Gupta wrote:
This is at par with other major arches such as aarch64, i386, s390 ...
No testsuite regressions: same numbers w/ w/o
| === gcc Summary ===
|
|# of
Ditto.
(thead_c906_tune_info): Ditto.
(optimize_size_tune_info): Ditto.
(riscv_register_move_cost): Use fmv_cost for int<->fp moves.
gcc/testsuite/Changelog:
* gcc.target/riscv/pr105666.c: New test.
Signed-off-by: Vineet Gupta
---
gcc/config/riscv/riscv.cc
On 2/7/22 13:24, Vineet Gupta wrote:
On 2/7/22 10:58, Palmer Dabbelt wrote:
On Mon, 07 Feb 2022 09:41:10 PST (-0800), Vineet Gupta wrote:
On 2/7/22 01:28, Philipp Tomsich wrote:
Vineet,
On Mon, 7 Feb 2022 at 07:06, Vineet Gupta
wrote:
This is at par with other major arches such as
On 2/7/22 10:58, Palmer Dabbelt wrote:
On Mon, 07 Feb 2022 09:41:10 PST (-0800), Vineet Gupta wrote:
On 2/7/22 01:28, Philipp Tomsich wrote:
Vineet,
On Mon, 7 Feb 2022 at 07:06, Vineet Gupta wrote:
This is at par with other major arches such as aarch64, i386, s390 ...
No testsuite
On 2/7/22 01:28, Philipp Tomsich wrote:
Vineet,
On Mon, 7 Feb 2022 at 07:06, Vineet Gupta wrote:
This is at par with other major arches such as aarch64, i386, s390 ...
No testsuite regressions: same numbers w/ w/o
Putting that check seems a good idea, but I haven't seen any cases
re
605
|# of unsupported tests 2523
|
| === g++ Summary ===
|
|# of expected passes 172997
|# of unexpected failures 26
|# of expected failures 706
|# of unsupported tests 9566
Signed-off-by: Vineet Gupta
---
gcc/config/riscv/predicates.md | 2
On 11/2/21 2:18 PM, Christoph Müllner wrote:
On Tue, Nov 2, 2021 at 9:15 PM Vineet Gupta wrote:
On 11/2/21 1:09 PM, Christoph Müllner wrote:
Without overlap_op_by_pieces we get:
8e: 00053023sd zero,0(a0)
92: 00052423sw zero,8(a0
On 11/2/21 1:09 PM, Christoph Müllner wrote:
Without overlap_op_by_pieces we get:
8e: 00053023sd zero,0(a0)
92: 00052423sw zero,8(a0)
96: 00051623sh zero,12(a0)
9a: 00050723sb zero,14(a0
On 7/22/21 6:29 AM, Kito Cheng via Gcc-patches wrote:
Could you add a testcase? Otherwise LGTM.
Option: -O2 -mtune=thead-c906 -march=rv64gc -mabi=lp64
void foo(char *dst){
__builtin_memset(dst, 0, 15);
}
On Thu, Jul 22, 2021 at 8:53 PM Christoph Muellner via Gcc-patches
wrote:
This patch
Hi Kito,
On 9/23/21 12:57 AM, Kito Cheng wrote:
Bit manipulation extension[1] is finishing the public review and waiting for
the rest of the ratification process, I believe that will become a ratified
extension soon, so I think it's time to submit to upstream for review now :)
As the title incl
//Claudiu
> ----
> *From:* Vineet Gupta
> *Sent:* Tuesday, June 1, 2021 10:42 PM
> *To:* gcc-patches@gcc.gnu.org
> *Cc:* Claudiu Zissulescu ;
> linux-snps-...@lists.infradead.org
> ; Vineet Gupta
> *Subject:* [PATCH] ARC: gcc driver default to
arc700 is legacy and there's no active development for it, so switch to
latest hs38_linux as default
Signed-off-by: Vineet Gupta
---
gcc/config/arc/arc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/config/arc/arc.h b/gcc/config/arc/arc.h
index bd1fe0a
Hi Claudiu,
For glibc needs can this be backported to gcc-9 please !
Thx,
-Vineet
On 3/31/20 3:06 AM, Claudiu Zissulescu Ianculescu wrote:
> Pushed.
>
> Thank you,
> Claudiu
>
> On Sun, Mar 29, 2020 at 2:05 AM Vineet Gupta via Gcc-patches
> wrote:
>> Enable big-end
FWIW this change needs a pairing glibc change so must NOT be included for
upcoming
2020.x release which still has old version of glibc !
-Vineet
On 3/31/20 10:57 AM, Vineet Gupta wrote:
> Well its a hard requirement considering glibc is still using gcc-9 !
>
> Thx,
> -Vineet
>
uesday, March 31, 2020 1:07 PM
>> To: Vineet Gupta
>> Cc: linux-snps-...@lists.infradead.org; gcc-patches@gcc.gnu.org; Claudiu
>> Zissulescu
>>
>> Subject: Re: [PATCH] [ARC] Allow more ABIs in GLIBC_DYNAMIC_LINKER
>>
>> Pushed.
> Is this one eligible for being back-ported to older GCCs?
> At least GCC 9.x would be really good.
>
> -Alexey
>
Enable big-endian suffixed dynamic linker per glibc multi-abi support.
And to avoid a future churn and version pairingi hassles, also allow
arc700 although glibc for ARC currently doesn't support it.
gcc/
-xx-xx Vineet Gupta
+
+ * config/arc/linux.h: GLIBC_DYNAMIC_LINKER suppo
On 1/14/20 3:49 PM, Vineet Gupta wrote:
> On 12/9/19 11:02 AM, Vineet Gupta wrote:
>> ARC gcc generates FDCMP instructions which raises Invalid operation for
>> signaling NaN only. This causes glibc iseqsig() primitives to fail (in
>> the current ongoing glibc port to ARC)
On 12/9/19 11:02 AM, Vineet Gupta wrote:
> ARC gcc generates FDCMP instructions which raises Invalid operation for
> signaling NaN only. This causes glibc iseqsig() primitives to fail (in
> the current ongoing glibc port to ARC)
>
> So split up the hard float compares into two cat
On 12/9/19 1:52 AM, Claudiu Zissulescu wrote:
> Although the FDCMP (the double precision floating point compare instruction)
> is added to the compiler, it is not properly used via cstoredi pattern. Fix
> it.
>
> OK to apply?
> Claudidu
>
> -xx-xx Claudiu Zissulescu
>
> * config/arc/
-Original Message-
>> From: Vineet Gupta [mailto:vgu...@synopsys.com]
>> Sent: Monday, December 09, 2019 8:02 PM
>> To: gcc-patches@gcc.gnu.org
>> Cc: Claudiu Zissulescu ;
>> andrew.burg...@embecosm.com; linux-snps-...@lists.infradead.org;
>> Vineet Gupta
(vs. FDCMP) which raises exception
for either NaNs.
With this fix testsuite/gcc.dg/torture/pr52451.c passes for ARC.
Also passes 6 additional tests in glibc testsuite (test*iseqsig) and no
regressions
gcc/
-xx-xx Vineet Gupta
* config/arc/arc-modes.def (CC_FPUE): New Mode CC_FPUE
Currently for hard float we need to check for
__ARC_FPU_SP__ || __ARC_FPU_DP__ and for soft float inverse of that.
So define single convenience macros for either cases
gcc/
-xx-xx Vineet Gupta
* config/arc/arc-c.c (arc_cpu_cpp_builtins): Add
__arc_hard_float__
On 4/3/19 2:53 AM, Claudiu Zissulescu wrote:
> Pushed, thank you for your contribution,
> Claudiu
Thx, can this be backported to gcc-8-stable please which is what glibc folks use
for testing !
-Vineet
>
> On Tue, Apr 2, 2019 at 9:27 PM Vineet Gupta
> wrote:
>> simple t
04
|printf("%d\n", (size_t)secs);
| }
The printf eventually called into glibc stdlib/divrem.c:__mpn_divrem()
which uses the __arc__ specific inline asm macros from longlong.h which
were causing miscompilation.
include/
2019-03-28 Vineet Gupta
PR 89877
* longlong.h
On 3/28/19 5:07 PM, Marc Glisse wrote:
> On Thu, 28 Mar 2019, Vineet Gupta wrote:
>
>> simple test such as below was failing.
>>
>> | void main(int argc, char *argv[])
>> | {
>> |size_t total_time = 115424; // expected 115.424
>
04
|printf("%d\n", (size_t)secs);
| }
The printf eventually called into glibc stdlib/divrem.c:__mpn_divrem()
which uses the __arc__ specific inline asm macros from longlong.h which
were causing miscompilation.
include/
2019-03-28 Vineet Gupta
PR 89877
* longlong.h
(STRICT_ALIGNMENT): Fix logic.
Signed-off-by: Vineet Gupta
---
gcc/config/arc/arc-c.def | 2 +-
gcc/config/arc/arc.c | 4
gcc/config/arc/arc.h | 2 +-
3 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/gcc/config/arc/arc-c.def b/gcc/config/arc/arc-c.def
index 9c0ba2c9c294
nable this for ARC.
This has been discussed at length on glibc mailing list [1], [2]
[1] https://sourceware.org/ml/libc-alpha/2018-11/msg00870.html
[2] https://sourceware.org/ml/libc-alpha/2019-01/msg00656.html
gcc/
2019-xx-xx Vineet Gupta
* gcc/config.gcc: Force .init_array for ARC
S
On 1/20/19 8:19 AM, Claudiu Zissulescu wrote:
> Hi,
>> 2019-01-18 Vineet Gupta
>>
>>* config/arc/atomic.md: Add operand to DMB instruction
>>
> This is ok. I'll push it asap,
> Claudiu
Thx, I see it merged into mainline. Can you please backpo
Atomics use DMB instruction to enforce ordering of loads/stores.
Currently gcc generates DMB w/o any arg which is a no-op. Fix that by
generating DMB 3 which enforces R+W ordering. It is stricter than what
acq/rel expect, but there's no other way.
gcc/
2019-01-18 Vineet Gupta
* c
* config/arc/arc.c: object attributes for core4 not reflected correctly
* config/arc/arc.h: Don't restrict DBNZ to core3 (core4 includes core3)
Signed-off-by: Vineet Gupta
---
gcc/ChangeLog| 7 +++
gcc/config/arc/arc.c | 2 +-
gcc/config/arc/arc.h | 2 +-
3 files chang
On 11/17/2017 04:23 AM, Claudiu Zissulescu wrote:
Hi,
gcc/
* config/arc/linux.h: GLIBC_DYNAMIC_LINKER update per glibc
upstreaming review comments
Accepted and committed. Thank you for your contribution,
Claudiu
Hi,
Please also consider this for backporting as that is the g
gcc/
* config/arc/linux.h: GLIBC_DYNAMIC_LINKER update per glibc
upstreaming review comments
Link: http://lists.infradead.org/pipermail/linux-snps-arc/2017-June/002634.html
Signed-off-by: Vineet Gupta
---
ChangeLog | 5 +
gcc/config/arc/linux.h | 2 +-
2 files
Hi,
As part of porting glibc to ARC one of the pre-req is to get it to build with
upstream toolchain components. The patch 927c0132251f ("[ARC] Configure script to
allow non uclibc based triplets") seems to be present in gcc #master, but not in
#gcc-7-branch. Can it be backported to gcc 7 plea
On 11/03/2016 03:57 AM, Claudiu Zissulescu wrote:
> Hi Vineet,
>
> Thank you for your contribution.
>
>> gcc/
>> 2016-10-28 Vineet Gupta
>>
>> * config/arc/arc.h (SIZE_TYPE): define as unsigned int.
>> * (PTRDIFF_TYPE): define as int.
>&g
On 10/31/2016 09:45 AM, Andreas Schwab wrote:
> On Okt 31 2016, Vineet Gupta wrote:
>
>> This silences tons of -Wformat= warnings when building ARC Linux kernel
>> with gcc 6.x (and restores the ARC gcc 4.8.x behaviour) which had
>> similar fix.
>>
>&
This silences tons of -Wformat= warnings when building ARC Linux kernel
with gcc 6.x (and restores the ARC gcc 4.8.x behaviour) which had
similar fix.
gcc/
2016-10-28 Vineet Gupta
* config/arc/arc.h (SIZE_TYPE): define as unsigned int.
* (PTRDIFF_TYPE): define as int.
Signed
This silences tons of -Wformat= warnings when building ARC Linux kernel
with gcc 6.x (and restores the ARC gcc 4.8.x behaviour) which had
similar fix.
gcc/
2016-10-28 Vineet Gupta
* config/arc/arc.h (SIZE_TYPE): define as unsigned int.
* (PTRDIFF_TYPE): define as int.
Signed
On Friday 20 May 2016 05:28 PM, Claudiu Zissulescu wrote:
> Hi Vineet,
>
>> gcc/
>> 2016-05-20 Vineet Gupta
>>
>> * config.gcc: Remove uclibc from arc target spec
>>
>> -arc*-*-linux-uclibc*)
>> +arc*-*-linux*)
> Actually may make sense t
gcc/
2016-05-20 Vineet Gupta
* config.gcc: Remove uclibc from arc target spec
Signed-off-by: Vineet Gupta
---
gcc/config.gcc | 2 +-
libgcc/config.host | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/gcc/config.gcc b/gcc/config.gcc
index 9ca5c6ed71d8
201 - 293 of 293 matches
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