PING^5: [PATCH] rtl-optimization/110939 Really fix narrow comparison of memory and constant

Ping^5. > > > On Thu, Aug 10, 2023 at 03:04:03PM +0200, Stefan Schulze Frielinghaus > > > wrote: > > > > In the former fix in commit 41ef5a34161356817807be3a2e51fbdbe575ae85 I > > > > completely missed the fact that the normal form of a generated constant > > > > for a > > > > mode with fewer

Re: Question on -fwrapv and -fwrapv-pointer

On Fri, 2023-09-15 at 15:37 +, Qing Zhao wrote: > > > > On Sep 15, 2023, at 11:29 AM, Richard Biener > > wrote: > > > > > > > > > Am 15.09.2023 um 17:25 schrieb Qing Zhao : > > > > > >  > > > > > > > On Sep 15, 2023, at 8:41 AM, Arsen Arsenović > > > > wrote: > > > > > > > > > > >

Re: Question on -fwrapv and -fwrapv-pointer

On Thu, 2023-09-14 at 21:41 +, Qing Zhao wrote: > > > CLANG already provided -fsanitize=unsigned-integer-overflow. GCC > > > might need to do the same. > > > > NO. There is no such thing as unsigned integer overflow. That option > > is badly designed and the GCC community has rejected a few

Re: Question on -fwrapv and -fwrapv-pointer

On Thu, 2023-09-14 at 15:57 +, Qing Zhao via Gcc-patches wrote: > Currently, GCC behaves as following: > > /* True if overflow wraps around for the given integral or pointer type.  That >    is, TYPE_MAX + 1 == TYPE_MIN.  */ > #define TYPE_OVERFLOW_WRAPS(TYPE) \ >   (POINTER_TYPE_P (TYPE) 

Re: [PATCH] LoongArch: gcc: Modify gas uleb128 support test.

On Thu, 2023-09-14 at 19:54 +0800, chenglulu wrote: > Sorry, it's my problem. We will modify it as soon as possible. Try this: diff --git a/gcc/configure.ac b/gcc/configure.ac index cb4be11facd..10027a4 100644 --- a/gcc/configure.ac +++ b/gcc/configure.ac @@ -3229,10 +3229,18 @@

Re: [PATCH] LoongArch: gcc: Modify gas uleb128 support test.

On Thu, 2023-09-14 at 19:21 +0800, Lulu Cheng wrote: > diff --git a/gcc/configure.ac b/gcc/configure.ac > index 09082e8ccae..072fe1d2b48 100644 > --- a/gcc/configure.ac > +++ b/gcc/configure.ac > @@ -3226,6 +3226,19 @@ L2: > .uleb128 0x8000 >  ], >  [[ > +case "$target" in > + 

Re: [PATCH v3 4/9] LoongArch:Added support for SX vector floating-point instructions.

The subject should be "Add tests for SX vector floating-point instructions". The "support" has already been added. Likewise for patches 5-9. -- Xi Ruoyao School of Aerospace Science and Technology, Xidian University

PING^4: [PATCH] rtl-optimization/110939 Really fix narrow comparison of memory and constant

Ping. > > > On Thu, Aug 10, 2023 at 03:04:03PM +0200, Stefan Schulze Frielinghaus > > > wrote: > > > > In the former fix in commit 41ef5a34161356817807be3a2e51fbdbe575ae85 I > > > > completely missed the fact that the normal form of a generated constant > > > > for a > > > > mode with fewer

Re: [PATCH] LoongArch: Fix up memcpy-vec-3.c test case

On Sat, 2023-09-09 at 16:21 +0800, chenglulu wrote: > LGTM! Pushed r14-3821. > 在 2023/9/9 下午4:20, Xi Ruoyao 写道: > > The generic code will split 16-byte copy into two 8-byte copies, so the > > vector code wouldn't be used even if -mno-strict-align.  This > > contradicted with the purpose of this

[PATCH] LoongArch: Fix up memcpy-vec-3.c test case

The generic code will split 16-byte copy into two 8-byte copies, so the vector code wouldn't be used even if -mno-strict-align. This contradicted with the purpose of this test case. gcc/testsuite/ChangeLog: * gcc.target/loongarch/memcpy-vec-3.c: Increase the amount of copied

Re: [PATCH v1] LoongArch: Fix bug of 'di3_fake'.

On Sat, 2023-09-09 at 15:42 +0800, Lulu Cheng wrote: > PR 111334 > > gcc/ChangeLog: > > * config/loongarch/loongarch.md: Fix bug of di3_fake. > > gcc/testsuite/ChangeLog: > > * gcc.target/loongarch/pr111334.c: New test. Ok. Despite I still think we should use unspec

Re: [PATCH] LoongArch: Use LSX and LASX for block move

On Sat, 2023-09-09 at 15:14 +0800, chenglulu wrote: > > 在 2023/9/9 下午3:06, Xi Ruoyao 写道: > > On Sat, 2023-09-09 at 15:04 +0800, chenglulu wrote: > > > Hi,RuoYao: > > > > > >    I think the test example memcpy-vec-3.c submitted in r14-3818 is > > > implemented incorrectly. > > > > > > The

Re: [PATCH] LoongArch: Use LSX and LASX for block move

On Sat, 2023-09-09 at 15:04 +0800, chenglulu wrote: > Hi,RuoYao: > >   I think the test example memcpy-vec-3.c submitted in r14-3818 is > implemented incorrectly. > > The 16-byte length in this test example will cause can_move_by_pieces to > return true when with '-mstrict-align', so no vector

Pushed: [PATCH] LoongArch: Slightly simplify loongarch_block_move_straight

Pushed r14-3819. On Sat, 2023-09-09 at 14:16 +0800, chenglulu wrote: > > 在 2023/9/8 上午12:33, Xi Ruoyao 写道: > > gcc/ChangeLog: > > > > * config/loongarch/loongarch.cc > > (loongarch_block_move_straight): > > Check precondition (delta must be a power of 2) and use > >

Pushed: [PATCH v2] LoongArch: Use LSX and LASX for block move

Pushed r14-3818 with test cases added. The pushed patch is attached. On Sat, 2023-09-09 at 14:10 +0800, chenglulu wrote: > > 在 2023/9/8 上午12:14, Xi Ruoyao 写道: > > gcc/ChangeLog: > > > > * config/loongarch/loongarch.h (LARCH_MAX_MOVE_PER_INSN): > > Define to the maximum amount

Re: [PATCH v3 1/4] LoongArch: improved target configuration interface

On Sat, 2023-09-09 at 14:26 +0800, Yang Yujie wrote: > I remember you were against it because you think non-multilib users > would be punished because the libdir layout changes (no toplevel). > However this directory should be (mostly) private to each gcc instance, > so I don't see real

Re: [PATCH v3 1/4] LoongArch: improved target configuration interface

On Sat, 2023-09-09 at 10:46 +0800, Yang Yujie wrote: > The next option I can think of would be MULTILIB_EXTRA_OPTS, where > -fmultiflags > fit in nicely.  However, these options won't reach the toplevel builds, and > tweaking config-ml.in for getting it there would be quite tedious and perhaps >

Re: [PATCH] LoongArch: Enable -fsched-pressure by default at -O1 and higher.

On Fri, 2023-09-08 at 16:29 +0800, Guo Jie wrote: > Hi, > > What I wanna change is "gcc/common/config/loongarch/loongarch- > common.cc", > > and the patch is automatically generated by "git gcc-commit-mklog". > > Is it necessary to  to remove "common/" ? My bad. I didn't realized the file has

Re: [PATCH] LoongArch: Enable -fsched-pressure by default at -O1 and higher.

On Fri, 2023-09-08 at 10:00 +0800, Guo Jie wrote: > gcc/ChangeLog: > > * common/config/loongarch/loongarch-common.cc: "common/" should be removed. You can use "git gcc-verify" to figure out this kind of error before sending a patch in the future. > (default_options

[PATCH] LoongArch: Slightly simplify loongarch_block_move_straight

gcc/ChangeLog: * config/loongarch/loongarch.cc (loongarch_block_move_straight): Check precondition (delta must be a power of 2) and use popcount_hwi instead of a homebrew loop. --- I've not run a full bootstrap with this, but it should be obvious. Ok for trunk?

[PATCH] LoongArch: Use LSX and LASX for block move

gcc/ChangeLog: * config/loongarch/loongarch.h (LARCH_MAX_MOVE_PER_INSN): Define to the maximum amount of bytes able to be loaded or stored with one machine instruction. * config/loongarch/loongarch.cc (loongarch_mode_for_move_size): New static function.

Re: [PATCH v3 1/4] LoongArch: improved target configuration interface

On Thu, 2023-09-07 at 17:47 +0800, Xi Ruoyao wrote: /* snip */ > I've made some local experiment too, I think we can add a "-mbuild- > multilib" option which does nothing but in the hacked spec we can wrap > the line in %{mbuild-multilib:...}: > > %{mbuild-multilib:% %{mabi=lp64d:-march=la464

Re: [PATCH v3 1/4] LoongArch: improved target configuration interface

On Thu, 2023-09-07 at 17:31 +0800, Yang Yujie wrote: > > This is bad.  It makes BOOT_CFLAGS=-mlasx or CFLAGS_FOR_TARGET=-mlasx > > silently ignored so we cannot test a LSX/LASX or vectorizer change with > > them. > > > > Why do we need to purge all user-specified -m options here? > > Yes, that

Re: [PATCH v3 1/4] LoongArch: improved target configuration interface

On Wed, 2023-09-06 at 09:04 +0800, Yang Yujie wrote: > On Tue, Sep 05, 2023 at 09:31:56PM +0800, Xi Ruoyao wrote: > > On Thu, 2023-08-31 at 20:48 +0800, Yang Yujie wrote: > > > * Support options for LoongArch SIMD extensions: > > >   new configure options --with-simd={none,lsx,lasx}; > > >   new

Re: [PATCH] LoongArch: Use bstrins instruction for (a & ~mask) and (a & mask) | (b & ~mask) [PR111252]

On Thu, 2023-09-07 at 10:15 +0800, chenglulu wrote: > > 在 2023/9/6 下午6:58, Xi Ruoyao 写道: > > Forgot to mention: I've bootstrapped and regtested this patch on > > loongarch64-linux-gnu (with PR110939 patch applied to unbreak the > > bootstrapping).  Ok for trunk? > > LGTM! > > Thanks! Pushed

Re: [PATCH v2 2/4] LoongArch: Add testsuite framework for Loongson SX/ASX.

On Thu, 2023-09-07 at 15:00 +0800, Xiaolong Chen wrote: /* snip */ > diff --git > a/gcc/testsuite/gcc.target/loongarch/vector/simd_correctness_check.h > b/gcc/testsuite/gcc.target/loongarch/vector/simd_correctness_check.h > new file mode 100644 > index 000..7be199ee3a0 > --- /dev/null

Re: [PATCH v1 1/4] LoongArch: Add tests of -mstrict-align option.

On Wed, 2023-09-06 at 18:43 +0800, Xiaolong Chen wrote: > gcc/testsuite/ChangeLog: > > * gcc.target/loongarch/strict-align.c: New test. A question: is there really a CPU model with LSX/LASX but without unaligned access support? If not I think we'd just reject -mstrict- align -mlsx.

Re: [PATCH] LoongArch: Use bstrins instruction for (a & ~mask) and (a & mask) | (b & ~mask) [PR111252]

Forgot to mention: I've bootstrapped and regtested this patch on loongarch64-linux-gnu (with PR110939 patch applied to unbreak the bootstrapping). Ok for trunk? On Wed, 2023-09-06 at 18:46 +0800, Xi Ruoyao wrote: > If mask is a constant with value ((1 << N) - 1) << M we can perform this >

Re: [PATCH v1 4/4] LoongArch: Add tests for Loongson SX floating-point conversion instructions.

On Wed, 2023-09-06 at 18:45 +0800, Xiaolong Chen wrote: > +  *((int*)& __m128_op0[3]) = 0x004200a0; > +  *((int*)& __m128_op0[2]) = 0x; > +  *((int*)& __m128_op0[1]) = 0x004200a0; > +  *((int*)& __m128_op0[0]) = 0x0021; These are aliasing rule violation and they will suddenly blow up

[PATCH] LoongArch: Use bstrins instruction for (a & ~mask) and (a & mask) | (b & ~mask) [PR111252]

If mask is a constant with value ((1 << N) - 1) << M we can perform this optimization. gcc/ChangeLog: PR target/111252 * config/loongarch/loongarch-protos.h (loongarch_pre_reload_split): Declare new function. (loongarch_use_bstrins_for_ior_with_mask): Likewise.

Re: [PATCH] LoongArch: Link c++ header directory in the default ABI to the toplevel.

On Wed, 2023-09-06 at 18:06 +0800, Yang Yujie wrote: > When multilib is enabled, the c++ header directory of the default multilib > variant needs to be linked to the toplevel since g++ does not search the > toplevel in this case. > > libstdc++-v3/ChangeLog: > > * configure.host: Register

Re: [PATCH v3 1/4] LoongArch: improved target configuration interface

On Thu, 2023-08-31 at 20:48 +0800, Yang Yujie wrote: > * Support options for LoongArch SIMD extensions: >   new configure options --with-simd={none,lsx,lasx}; >   new compiler option -msimd={none,lsx,lasx}; >   new driver options -m[no]-l[a]sx. Hmm... In my build (a cross compiler configured with

Re: [PATCH v3 1/4] LoongArch: improved target configuration interface

On Tue, 2023-09-05 at 20:01 +0800, chenglulu wrote: > > 在 2023/9/5 下午7:51, Xi Ruoyao 写道: > > On Thu, 2023-08-31 at 20:48 +0800, Yang Yujie wrote: > > >   /* Note: optimize_size may vary across functions, > > > while -m[no]-memcpy imposes a global constraint.  */ > > >   #define

Re: [PATCH v3 1/4] LoongArch: improved target configuration interface

On Thu, 2023-08-31 at 20:48 +0800, Yang Yujie wrote: >  /* Note: optimize_size may vary across functions, >     while -m[no]-memcpy imposes a global constraint.  */ >  #define TARGET_DO_OPTIMIZE_BLOCK_MOVE_P  > loongarch_do_optimize_block_move_p() >   > -#ifndef HAVE_AS_EXPLICIT_RELOCS > -#define

Re: [PATCH] LoongArch: Support loading floating-point zero into MEM[base + index].

LGTM. Nit: it should be "storing" floating-point zero into MEM, not "loading". On Sat, 2023-09-02 at 12:47 +0800, Guo Jie wrote: > gcc/ChangeLog: > > * config/loongarch/loongarch.md: Support 'G' -> 'k' in > movsf_hardfloat and movdf_hardfloat. > > gcc/testsuite/ChangeLog: > >  

Re: [PATCH v6 0/4] Add Loongson SX/ASX instruction support to LoongArch target.

On Thu, 2023-08-31 at 17:08 +0800, Chenghui Pan wrote: > This is an update of: > https://gcc.gnu.org/pipermail/gcc-patches/2023-August/628303.html > > Changes since last version of patch set: > - "dg-skip-if"-related Changes of the g++.dg/torture/vshuf* testcases are > reverted. >   (Replaced by

Re: [PATCH v5] LoongArch:Implement 128-bit floating point functions in gcc.

On Thu, 2023-08-31 at 15:02 +0800, chenxiaolong wrote: > +;; Implement __builtin_copysignf128 function. > + > +(define_insn_and_split "copysigntf3" > +  [(set (match_operand:TF 0 "register_operand" "=") > +   (unspec:TF [(match_operand:TF 1 "register_operand" "r") > +  

Re: [PATCH v4] LoongArch:Implement 128-bit floating point functions in gcc.

On Thu, 2023-08-31 at 10:46 +0800, chenxiaolong wrote: > +;; Implement __builtin_fabs128 function. > + > +(define_expand "abstf2" > +  [(match_operand:TF 0 "register_operand") > +   (match_operand:TF 1 "register_operand")] > +  "TARGET_64BIT" > +{ > +  loongarch_emit_move (operands[0],

Re: RFC: Introduce -fhardened to enable security-related flags

On Tue, 2023-08-29 at 15:42 -0400, Marek Polacek via Gcc-patches wrote: > + if (UNLIKELY (flag_hardened) > + && (opt->code == OPT_D || opt->code == OPT_U)) > +   { > + if (!fortify_seen_p) > +   fortify_seen_p = !strncmp (opt->arg,

Re: [PATCH v2 3/4] LoongArch: add new configure option --with-strict-align-lib

On Wed, 2023-08-30 at 14:51 +0800, Yujie Yang wrote: > > > LoongArch processors may not support memory accesses without natural > > > alignments.  Building libraries with -mstrict-align may help with > > > toolchain binary compatiblity and performance on these implementations > > > (e.g. Loongson

Re: [PATCH v2 3/4] LoongArch: add new configure option --with-strict-align-lib

On Wed, 2023-08-30 at 09:58 +0800, Yang Yujie wrote: > LoongArch processors may not support memory accesses without natural > alignments.  Building libraries with -mstrict-align may help with > toolchain binary compatiblity and performance on these implementations > (e.g. Loongson 2K1000LA). > >

Re: RFC: Top level configure: Require a minimum version 6.8 texinfo

On Tue, 2023-08-29 at 19:01 +0300, Eli Zaretskii via Gcc-patches wrote: > > Date: Tue, 29 Aug 2023 17:45:20 +0200 > > Cc: gcc-patches@gcc.gnu.org, gdb-patc...@sourceware.org, > >  binut...@sourceware.org > > From: Jakub Jelinek via Gdb-patches > > > > On Tue, Aug 29, 2023 at 04:21:44PM +0100,

Re: [PATCH] rtl-optimization/110939 Really fix narrow comparison of memory and constant

Hi Jeff, Can you take a look at the patch? It fixes a bootstrap failure on LoongArch. And in this month 3 related bugzilla tickets have been created (110939, 24, 71). On Thu, 2023-08-10 at 15:04 +0200, Stefan Schulze Frielinghaus via Gcc- patches wrote: > In the former fix in commit

Re: [PATCH v2] LoongArch: Enable '-free' starting at -O2.

On Mon, 2023-08-28 at 11:46 +0800, Lulu Cheng wrote: > v1 -> v2: > 1. Modify Changelog information format. > > gcc/ChangeLog: > > * common/config/loongarch/loongarch-common.cc: > Enable '-free' on O2 and above. > * doc/invoke.texi: Modify the description

Re: [PATCH v5 0/6] Add Loongson SX/ASX instruction support to LoongArch target.

On Thu, 2023-08-24 at 11:40 +0800, Xi Ruoyao via Gcc-patches wrote: > On Thu, 2023-08-24 at 11:13 +0800, Chenghui Pan wrote: > > - Add dg-skip-if for loongarch*-*-* in vshuf test in g++.dg/torture, because > >   vshuf/xvshuf insn's result is undefined when 6 or 7 bit of vector

Re: [PATCH v5 0/6] Add Loongson SX/ASX instruction support to LoongArch target.

On Thu, 2023-08-24 at 11:13 +0800, Chenghui Pan wrote: > - Add dg-skip-if for loongarch*-*-* in vshuf test in g++.dg/torture, because >   vshuf/xvshuf insn's result is undefined when 6 or 7 bit of vector's element > is set, >   and insns with this condition are generated in these testcases. I'm

PING^2: [PATCH] rtl-optimization/110939 Really fix narrow comparison of memory and constant

Ping again. On Fri, 2023-08-18 at 13:04 +0200, Stefan Schulze Frielinghaus via Gcc-patches wrote: > Ping.  Since this fixes bootstrap problem PR110939 for Loongarch I'm > pingen this one earlier. > > On Thu, Aug 10, 2023 at 03:04:03PM +0200, Stefan Schulze Frielinghaus wrote: > > In the former

Re: [PATCH v1] libffi: Backport of LoongArch support for libffi.

On Tue, 2023-08-22 at 20:42 +0800, Lulu Cheng wrote: > This is a backport of , > and contains modifications to commit 5a4774cd4d, as well as the LoongArch > schema portion of commit ee22ecbd11. This is needed for libgo. > > > libffi/ChangeLog:

Re: [PATCH v4 0/6] Add Loongson SX/ASX instruction support to LoongArch target.

On Thu, 2023-08-17 at 15:20 +0800, Chenghui Pan wrote: > Seems ARMv8-A only guarantees to preserve low 64-bit value of > NEON/floating-point register value. I'm not sure that I modify the > testcase in the right way and maybe we need more investigations. Any > ideas or suggestion? Sorry, the

Re: [PATCH v3] LoongArch:Implement 128-bit floating point functions in gcc.

On Fri, 2023-08-18 at 15:05 +0800, Xi Ruoyao via Gcc-patches wrote: > On Fri, 2023-08-18 at 14:58 +0800, Xi Ruoyao via Gcc-patches wrote: > > On Fri, 2023-08-18 at 14:39 +0800, chenxiaolong wrote: > > > 在 2023-08-17四的 15:08 +，Joseph Myers写道： > > > > On Thu,

Re: [PATCH v3] LoongArch:Implement 128-bit floating point functions in gcc.

On Fri, 2023-08-18 at 14:58 +0800, Xi Ruoyao via Gcc-patches wrote: > On Fri, 2023-08-18 at 14:39 +0800, chenxiaolong wrote: > > 在 2023-08-17四的 15:08 +，Joseph Myers写道： > > > On Thu, 17 Aug 2023, Xi Ruoyao via Gcc-patches wrote: > > > >

Re: [PATCH v3] LoongArch:Implement 128-bit floating point functions in gcc.

On Fri, 2023-08-18 at 14:39 +0800, chenxiaolong wrote: > 在 2023-08-17四的 15:08 +，Joseph Myers写道： > > On Thu, 17 Aug 2023, Xi Ruoyao via Gcc-patches wrote: > > > > > So I guess we just need > > > > > > builtin_define ("__builtin_fabsq=__builtin_fa

Re: [PATCH v3] LoongArch:Implement 128-bit floating point functions in gcc.

On Tue, 2023-08-15 at 20:03 +, Joseph Myers wrote: > On Tue, 15 Aug 2023, chenxiaolong wrote: > > > In the implementation process, the "q" suffix function is > >     Re-register and associate the "__float128" type with the > >     "long double" type so that the compiler can

Re: [PATCH v4 0/6] Add Loongson SX/ASX instruction support to LoongArch target.

The implementation fails to handle this test case properly: typedef double __attribute__((vector_size(32))) v4df; void use1(double); __attribute__((noipa)) double use(double) { register double x asm("f24") = 114.514; __asm__("" : "+f" (x)); return x; } void test(void) {

Re: [PATCH v3] LoongArch:Implement 128-bit floating point functions in gcc.

Please fix code style (this is the third time I say it and I'm really frustrated now). GCC is a project, it's not a student homework so style matters. And it's not so difficult to fix the style: for a new file you can use "clang-format --style GNU -i filename.c" to do the work automatically. On

Re: [PATCH v1 1/6] LoongArch: a symmetric multilib subdir layout

On Mon, 2023-08-14 at 19:16 +0800, Xi Ruoyao wrote: > On Mon, 2023-08-14 at 18:18 +0800, Yujie Yang wrote: > > On Mon, Aug 14, 2023 at 03:48:53PM +0800, Xi Ruoyao wrote: > > > On Mon, 2023-08-14 at 15:37 +0800, Yujie Yang wrote: > > > > On Mon, Aug 14, 2023 at 01:38:40PM +0800, Xi Ruoyao wrote: >

Re: [PATCH v4 1/6] LoongArch: Add Loongson SX vector directive compilation framework.

I guess there is a merge conflict with Yujie's "-msimd=" patch and you may need to collaborate to resolve it. Maybe just add -msimd in this series. On Tue, 2023-08-15 at 09:05 +0800, Chenghui Pan wrote: > From: Lulu Cheng > > gcc/ChangeLog: > > *

Re: [PATCH v1 1/6] LoongArch: a symmetric multilib subdir layout

On Mon, 2023-08-14 at 18:18 +0800, Yujie Yang wrote: > On Mon, Aug 14, 2023 at 03:48:53PM +0800, Xi Ruoyao wrote: > > On Mon, 2023-08-14 at 15:37 +0800, Yujie Yang wrote: > > > On Mon, Aug 14, 2023 at 01:38:40PM +0800, Xi Ruoyao wrote: > > > > On Mon, 2023-08-14 at 11:57 +0800, Yang Yujie wrote: >

Re: [PATCH v1 2/6] LoongArch: improved target configuration interface

On Mon, 2023-08-14 at 16:57 +0800, Yujie Yang wrote: > On Mon, Aug 14, 2023 at 04:49:11PM +0800, Xi Ruoyao wrote: > > On Mon, 2023-08-14 at 16:44 +0800, Yujie Yang wrote: > > > I assume we all want: > > > > > >  (1) -mlasx -mlsx -> enable LSX and LASX > > >  (2) -mlasx -mno-lsx -> disable LSX and

Re: [PATCH v1 2/6] LoongArch: improved target configuration interface

On Mon, 2023-08-14 at 16:44 +0800, Yujie Yang wrote: > I assume we all want: > >  (1) -mlasx -mlsx -> enable LSX and LASX >  (2) -mlasx -mno-lsx -> disable LSX and LASX >  (3) -mno-lsx -mlasx -> enable LSX and LASX Yes. > Unless we declare -mlsx / -mlasx as driver deferred, AFAIK there is no

Re: [PATCH v1 1/6] LoongArch: a symmetric multilib subdir layout

On Mon, 2023-08-14 at 15:37 +0800, Yujie Yang wrote: > On Mon, Aug 14, 2023 at 01:38:40PM +0800, Xi Ruoyao wrote: > > On Mon, 2023-08-14 at 11:57 +0800, Yang Yujie wrote: > > > > > However, for LoongArch, we do not want such a "toplevel" library > > > installation since the default ABI may

Re: [PATCH v1 2/6] LoongArch: improved target configuration interface

On Mon, 2023-08-14 at 13:58 +0800, Xi Ruoyao via Gcc-patches wrote: > On Mon, 2023-08-14 at 11:57 +0800, Yang Yujie wrote: > > * Support options for LoongArch SIMD extensions: > >   new configure options --with-simd={none,lsx,lasx}; > >   new driver options -m[no]-l[a]sx /

Re: [PATCH v1 2/6] LoongArch: improved target configuration interface

On Mon, 2023-08-14 at 11:57 +0800, Yang Yujie wrote: > * Support options for LoongArch SIMD extensions: >   new configure options --with-simd={none,lsx,lasx}; >   new driver options -m[no]-l[a]sx / -msimd={none,lsx,lasx}. I suggest to rename --with-simd= to --with-ext= and accept a comma-

Re: [PATCH v1 1/6] LoongArch: a symmetric multilib subdir layout

On Mon, 2023-08-14 at 13:38 +0800, Xi Ruoyao wrote: > > > However, for LoongArch, we do not want such a "toplevel" library > > installation since the default ABI may change.  We expect all > > multilib variants of libraries to be installed to their designated > > ABI-specific subdirs (e.g.

Re: [PATCH v1 1/6] LoongArch: a symmetric multilib subdir layout

On Mon, 2023-08-14 at 11:57 +0800, Yang Yujie wrote: > However, for LoongArch, we do not want such a "toplevel" library > installation since the default ABI may change. We expect all > multilib variants of libraries to be installed to their designated > ABI-specific subdirs (e.g. base/lp64d) of

Re: [PATCH v1 2/6] LoongArch: improved target configuration interface

On Mon, 2023-08-14 at 11:57 +0800, Yang Yujie wrote: > loongarch64) > -   tune_pattern="loongarch64|la464" > -   tune_default="la464" > +   tune_pattern="native|abi-default|loongarch64|la464" I think we can remove

Re: [PATCH v1 3/6] LoongArch: define preprocessing macros "__loongarch_{arch,tune}"

On Mon, 2023-08-14 at 11:57 +0800, Yang Yujie wrote: > These are exported according to the LoongArch Toolchain Conventions[1] > as a replacement of the obsolete "_LOONGARCH_{ARCH,TUNE}" macros, > which are expanded to strings representing the actual architecture > and microarchitecture of the

Re: [PATCH v1 2/6] LoongArch: improved target configuration interface

On Mon, 2023-08-14 at 11:57 +0800, Yang Yujie wrote: > The configure script and the GCC driver are updated so that > it is easier to customize and control GCC builds for targeting > different LoongArch implementations. > > * Support options for LoongArch SIMD extensions: >   new configure options

Re: [PATCH v1 4/6] LoongArch: use -mstrict-align by default when building libraries

On Mon, 2023-08-14 at 11:57 +0800, Yang Yujie wrote: > LoongArch processors may not support memory accesses without natural > alignments.  Building libraries with -mstrict-align may help with > toolchain binary compatiblity and performance on these implementations > (e.g. Loongson 2K1000LA). I

Re: [PATCH] rtl-optimization/110939 Really fix narrow comparison of memory and constant

On Thu, 2023-08-10 at 15:04 +0200, Stefan Schulze Frielinghaus via Gcc- patches wrote: > In the former fix in commit 41ef5a34161356817807be3a2e51fbdbe575ae85 I > completely missed the fact that the normal form of a generated constant for a > mode with fewer bits than in HOST_WIDE_INT is a sign

Re: [PATCH] Support -m[no-]gather -m[no-]scatter to enable/disable vectorization for all gather/scatter instructions.

On Thu, 2023-08-10 at 09:11 +0800, liuhongt via Gcc-patches wrote: > Currently we have 3 different independent tunes for gather > "use_gather,use_gather_2parts,use_gather_4parts", > similar for scatter, there're > "use_scatter,use_scatter_2parts,use_scatter_4parts" > > The patch support 2

Re: [PATCH v2 11/14] LoongArch: Mark am* instructions as LA64-only

On Wed, 2023-08-09 at 19:46 +0800, Jiajie Chen wrote: > LoongArch32 only provides basic ll/sc instructions for atomic > operations. Mark am* atomic instructions as 64-bit only. I'd prefer using a different symbol, say TARGET_LOONGARCH_AM here. Then it would be easier to adjust the code if we

Re: [PATCH v2 01/14] LoongArch: Introduce loongarch32 target

On Wed, 2023-08-09 at 19:46 +0800, Jiajie Chen wrote: > +  builtin_define ("_ABILP32=3"); > +  builtin_define ("_LOONGARCH_SIM=_ABILP32"); Let's remove them. These MIPS-style definitions are deprecated: https://github.com/loongson/LoongArch-Documentation/pull/28. Unfortunately for LP64

Re: [PATCH 2/9] LoongArch: Fix default ISA setting

On Sun, 2023-08-06 at 20:49 +0800, Jiajie Chen via Gcc-patches wrote: > When loongarch_arch_target is called, la_target has not been > initialized, thus the macro LARCH_ACTUAL_ARCH always equals to zero. > > This commit fixes by expanding the macro and reading the latest value. > It permits

Re: [PATCH v2] LoongArch:Implement 128-bit floating point functions in gcc.

On Tue, 2023-08-08 at 10:24 +0800, Xi Ruoyao wrote: And I think this way to implement these functions (using libgcc calls) is not the best. On 64-bit LoongArch a __float128 is stored in a pair of GPR, so operations like copysignq and absq can be implemented much more efficiently by expanding

Re: [PATCH v2] LoongArch:Implement 128-bit floating point functions in gcc.

On Tue, 2023-08-08 at 10:09 +0800, chenxiaolong wrote: > +/* Count the number of functions with "q" as the suffix.  */ > +const int MATHQ_NUMS=(int)LARCH_MAX_FTYPE_MAX-(int)LARCH_BUILTIN_HUGE_VALQ; Format issue still not fixed. > +__float128 nanq (const char * str) > +{ > + union

Re: [PATCH v1] LoongArch:Implement 128-bit floating point functions in gcc.

On Mon, 2023-08-07 at 12:01 +0800, chenxiaolong wrote: > +/* Count the number of functions with "q" as the suffix */ > +static int MATHQ_NUMS=(int)LARCH_MAX_FTYPE_MAX-(int)LARCH_BUILTIN_HUGE_VALQ; This is obviously not the GCC coding standard... It should have some white spaces: static int

Re: [PATCH] Reduce floating-point difficulties in timevar.cc

On Fri, 2023-07-21 at 16:58 +0300, Alexander Monakov wrote: > > On Fri, 21 Jul 2023, Xi Ruoyao via Gcc-patches wrote: > > > Perhaps -ffp-contract=on (not off) is enough to fix the issue (if you > > are building GCC 14 snapshot).  The default is "fast" (if no -

Re: [PATCH] Reduce floating-point difficulties in timevar.cc

On Fri, 2023-07-21 at 14:11 +0100, Matthew Malcomson wrote: > My understanding is that this is not a hardware bug and that it's > specified that rounding does not happen on the multiply "sub-part" in > `FNMSUB`, but rounding happens on the `FMUL` that generates some input > to it. AFAIK the C

Re: [PATCH] Reduce floating-point difficulties in timevar.cc

On Fri, 2023-07-21 at 13:11 +0100, Matthew Malcomson via Gcc-patches wrote: > This change ensures those operations are not fused and hence stops the test > being flaky on that particular machine.  There is no expected change in the > generated code. > Bootstrap & regtest on AArch64 passes with no

[PATCH] LoongArch: Allow using --with-arch=native if host CPU is LoongArch

If the host triple and the target triple are different but the host is LoongArch, in some cases --with-arch=native can be useful. For example, if we are bootstrapping a loongarch64-linux-musl toolchain on a Glibc-based system and we don't intend to use the toolchain on other machines, we can use

Re: [PATCH v2 0/8] Add Loongson SX/ASX instruction support to LoongArch target.

On Tue, 2023-07-18 at 19:06 +0800, Chenghui Pan wrote: > Lulu Cheng (8): >   LoongArch: Added Loongson SX vector directive compilation framework. >   LoongArch: Added Loongson SX base instruction support. >   LoongArch: Added Loongson SX directive builtin function support. >   LoongArch: Added

Re: [PATCH v2 2/2] libstdc++: use new built-in trait __is_scalar for std::is_scalar

On Wed, 2023-07-12 at 11:32 -0700, Ken Matsui via Gcc-patches wrote: > > conditional on the front-end change being committed first of course > > Does this mean we want to commit this [2/2] patch before committing > the [1/2] patch in this case? No, this mean you should get 1/2 reviewed and

Re: Devirtualization of objects in array

On Wed, 2023-07-12 at 16:58 +0800, Ng YongXiang via Gcc-patches wrote: > I'm writing to seek for a review for an issue I filed some time ago. > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110057 . A proposed patch is > attached in the bug tracker as well. You should send the patch to

[PATCH pushed] testsuite: Unbreak pr110557.cc where long is 32-bit (was Re: Pushed: [PATCH v2] vect: Fix vectorized BIT_FIELD_REF for signed bit-fields [PR110557])

On Tue, 2023-07-11 at 13:04 +0530, Prathamesh Kulkarni wrote: /* snip */ > Hi Xi, > Your commit: > https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=63ae6bc60c0f67fb2791991bf4b6e7e0a907d420, > > seems to cause following regressions on arm-linux-gnueabihf: > FAIL: g++.dg/vect/pr110557.cc  -std=c++98

Pushed: [PATCH v2] vect: Fix vectorized BIT_FIELD_REF for signed bit-fields [PR110557]

On Mon, 2023-07-10 at 10:33 +, Richard Biener wrote: > On Fri, 7 Jul 2023, Xi Ruoyao wrote: > > > If a bit-field is signed and it's wider than the output type, we > > must > > ensure the extracted result sign-extended.  But this was not handled > > correctly. > > > > For example: > > > >    

[PATCH v2] vect: Fix vectorized BIT_FIELD_REF for signed bit-fields [PR110557]

If a bit-field is signed and it's wider than the output type, we must ensure the extracted result sign-extended. But this was not handled correctly. For example: int x : 8; long y : 55; bool z : 1; The vectorized extraction of y was: vect__ifc__49.29_110 = MEM [(struct

Re: [PATCH] vect: Fix vectorized BIT_FIELD_REF for signed bit-fields [PR110557]

On Fri, 2023-07-07 at 08:15 +0200, Richard Biener wrote: /* snip */ > > +  bool sign_ext = (!TYPE_UNSIGNED (TREE_TYPE (bf_ref)) && > > +  TYPE_PRECISION (ret_type) > mask_width); > > +  bool widening = ((TYPE_PRECISION (TREE_TYPE (container)) < > > +  

[PATCH] vect: Fix vectorized BIT_FIELD_REF for signed bit-fields [PR110557]

If a bit-field is signed and it's wider than the output type, we must ensure the extracted result sign-extended. But this was not handled correctly. For example: int x : 8; long y : 55; bool z : 1; The vectorized extraction of y was: vect__ifc__49.29_110 = MEM [(struct

Re: [PATCH v1 0/6] Add Loongson SX/ASX instruction support to LoongArch target.

A question: is vld/vst guaranteed to be atomic if the accessed address is aligned? If true we can use them to implement lock-free 128-bit atomic load and store. See https://gcc.gnu.org/bugzilla/PR104688 for the background, and some people really hate using a lock for atomics. On Fri, 2023-06-30

Re: [PATCH v1 2/6] LoongArch: Added Loongson SX base instruction support.

On Fri, 2023-06-30 at 10:16 +0800, Chenghui Pan wrote: > +(define_c_enum "unspec" [ > +  UNSPEC_LSX_ASUB_S > +  UNSPEC_LSX_VABSD_U > +  UNSPEC_LSX_VAVG_S /* ... */ To me many of them can be modeled using RTL templates, instead of an unspec. -- Xi Ruoyao School of Aerospace Science and

Re: [PATCH v1 2/6] LoongArch: Added Loongson SX base instruction support.

On Fri, 2023-06-30 at 10:16 +0800, Chenghui Pan wrote: >   > +  int use_vecarg_p = TARGET_VECARG > +    && LSX_SUPPORTED_MODE_P (mode); > + >    memset (info, 0, sizeof (*info)); >    info->gpr_offset = cum->num_gprs; >    info->fpr_offset = cum->num_fprs; > @@ -535,7 +546,7 @@

Re: [PATCH v1 0/6] Add Loongson SX/ASX instruction support to LoongArch target.

On Fri, 2023-06-30 at 10:16 +0800, Chenghui Pan wrote: > These patches add the Loongson SX/ASX instruction support to the > LoongArch > target, and can be utilized by using the new "-mlsx" and > "-mlasx" option. > > Patches are bootstrapped and tested on loongarch64-linux-gnu target. > > Lulu

Re: [PATCH] i386: add -fno-stack-protector to two tests

On Fri, 2023-06-30 at 04:08 +0800, Xi Ruoyao wrote: > On Thu, 2023-06-29 at 16:01 -0400, Marek Polacek via Gcc-patches wrote: > > These tests fail when the testsuite is executed with -fstack- > > protector-strong. > > To avoid this, this patch adds -fno-stack-protector to dg-options. > > > >

Re: [PATCH] i386: add -fno-stack-protector to two tests

On Thu, 2023-06-29 at 16:01 -0400, Marek Polacek via Gcc-patches wrote: > These tests fail when the testsuite is executed with -fstack- > protector-strong. > To avoid this, this patch adds -fno-stack-protector to dg-options. > > Tested on x86_64-pc-linux-gnu, ok for trunk? LGTM, we've noticed

Re: [PATCH 1/2] c++: implement __is_const built-in trait

Please use [PATCH v3 1/2] next time, now it's not easy to find the latest version of the series (I'm not sure if the number "3" is correct). On Sat, 2023-06-24 at 03:38 -0700, Ken Matsui via Gcc-patches wrote: > This patch implements built-in trait for std::is_const. > > gcc/cp/ChangeLog: > >   

Re: [pushed] wwwdocs: Add GCC Code of Conduct

On Tue, 2023-06-20 at 12:22 -0400, Jason Merrill via Gcc-patches wrote: > diff --git a/htdocs/bugs/index.html b/htdocs/bugs/index.html > index aaef8915..6dbe5d45 100644 > --- a/htdocs/bugs/index.html > +++ b/htdocs/bugs/index.html > @@ -122,6 +122,9 @@ three of which can be obtained from the

Re: [PATCH v5] MIPS: Add speculation_barrier support

On Fri, 2023-06-16 at 15:53 +0800, YunQiang Su wrote: > Ohh, sorry. I forget it. I commented there. > I have no permission to close this bug report. Can you help to close > it? Modify the email address of your Bugzilla account to your @gcc.gnu.org address, then you should be able to close it. --

Re: [pushed][PATCH v3] LoongArch: Avoid non-returning indirect jumps through $ra [PR110136]

Xuerui: I guess this makes it sensible to show "ret" instead of "jirl $zero, $ra, 0" in objdump -d output, but I don't know how to implement it. Do you have some idea? On Thu, 2023-06-15 at 16:27 +0800, Lulu Cheng wrote: > Pushed to trunk and gcc-12 gcc-13. > r14-1866 > r13-7448 > r12-9698 > >

Pushed: [PATCH] LoongArch: Set default alignment for functions and labels with -mtune

Pushed r14-1839. On Thu, 2023-06-15 at 09:12 +0800, Lulu Cheng wrote: > LGTM! Thanks! > > 在 2023/6/14 上午8:43, Xi Ruoyao 写道: > > The LA464 micro-architecture is sensitive to alignment of code.  The > > Loongson team has benchmarked various combinations of function, the > > results [1] show that

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