== Progress ==
* VRP based zero/sign extension
- Tested and posted the latest patch
* Better end of loop counter optimisation
- Tree level optimization are optimized in mainline
- Christophe noted a slight change in asm generated from earlier version
- tracked down the patch causing this and communicated this.
* Generate a single call to divmod
- Looked at expand_divmod to understand how __aeabi_idiv and
__aeabi_idivmod are generated.
== Plan ==
* Better end of loop counter optimisation
- Change the pattern to remove this additional instruction if necessary.
* Generate a single call to divmod
- Come up with a solution