-Original Message-
From: Richard Earnshaw
Sent: 21 March 2014 13:57
To: Ian Bolton
Cc: gcc-patches@gcc.gnu.org
Subject: Re: [PATCH, ARM] Optimise NotDI AND/OR ZeroExtendSI for ARMv7A
On 19/03/14 16:53, Ian Bolton wrote:
This is a follow-on patch to one already committed:
http
On 19/03/14 16:53, Ian Bolton wrote:
This is a follow-on patch to one already committed:
http://gcc.gnu.org/ml/gcc-patches/2014-02/msg01128.html
It implements patterns to simplify our RTL as follows:
OR (Not:DI (A:DI), ZeroExtend:DI (B:SI))
-- the top half can be done with a MVN
AND
This is a follow-on patch to one already committed:
http://gcc.gnu.org/ml/gcc-patches/2014-02/msg01128.html
It implements patterns to simplify our RTL as follows:
OR (Not:DI (A:DI), ZeroExtend:DI (B:SI))
-- the top half can be done with a MVN
AND (Not:DI (A:DI), ZeroExtend:DI (B:SI))
--
