Hello,
I've merged ptest insn patterns from AVX and SSE.
I've also extended mode iterator to allow any 128/256 bit mode
for the insn as it register-wide, which may help implementing
https://gcc.gnu.org/ml/gcc-patches/2015-05/msg02788.html
Bootstrapped and regtested.
If no objections, I'll
On Tue, Aug 4, 2015 at 1:58 PM, Kirill Yukhin kirill.yuk...@gmail.com wrote:
Hello,
I've merged ptest insn patterns from AVX and SSE.
I've also extended mode iterator to allow any 128/256 bit mode
for the insn as it register-wide, which may help implementing
On 04 Aug 14:06, Uros Bizjak wrote:
On Tue, Aug 4, 2015 at 1:58 PM, Kirill Yukhin kirill.yuk...@gmail.com wrote:
+ (set (attr btver2_decode)
+ (if_then_else
+ (and (eq_attr alternative 2)
+ (match_test sseinsnmodemode==OImode))
+ (const_string vector)
+
