Hi Richard,
On 29/05/18 15:26, Richard Sandiford wrote:
Kyrill Tkachov writes:
Hi all,
The recent changes to aarch64_expand_vector_init cause an ICE in the
attached testcase. The register allocator "ICEs with Max. number of
generated reload insns per insn is achieved (90)"
That is because
Kyrill Tkachov writes:
> Hi all,
>
> The recent changes to aarch64_expand_vector_init cause an ICE in the
> attached testcase. The register allocator "ICEs with Max. number of
> generated reload insns per insn is achieved (90)"
>
> That is because aarch64_expand_vector_init creates a paradoxical
Hi all,
The recent changes to aarch64_expand_vector_init cause an ICE in the attached
testcase.
The register allocator "ICEs with Max. number of generated reload insns per insn is
achieved (90)"
That is because aarch64_expand_vector_init creates a paradoxical subreg to move
a DImode value
int
