Hi,
James Greenhalgh wrote:
>
> This seems like a fairly horrible hack around the register allocator
> behaviour.
That is why I proposed to improve the register allocator so one can explicitly
specify the copy preference in the md syntax. However that wasn't accepted,
so we'll have to use a hack
On Tue, May 15, 2018 at 08:00:49AM -0500, Wilco Dijkstra wrote:
>
> ping
This seems like a fairly horrible hack around the register allocator
behaviour.
BUt, OK.
James
> This patch improves register allocation of fma by preferring to update the
> accumulator register. This is done by adding f
ping
From: Wilco Dijkstra
Sent: 04 January 2018 17:46
To: GCC Patches
Cc: nd
Subject: [PATCH][AArch64] Improve register allocation of fma
This patch improves register allocation of fma by preferring to update the
accumulator register. This is done by adding fma insns with operand 1 as the
Andrew Pinski wrote:
> Seems like you should do something similar to the integer madd/msub
> instructions too (aarch64_mla is already correct but aarch64_mla_elt
> needs this too).
Integer madd/msub may benefit too, however it wouldn't make a difference
for a 3-operand mla since the register allo
On Thu, Jan 4, 2018 at 9:46 AM, Wilco Dijkstra wrote:
> This patch improves register allocation of fma by preferring to update the
> accumulator register. This is done by adding fma insns with operand 1 as the
> accumulator. The register allocator considers copy preferences only in
> operand
>
This patch improves register allocation of fma by preferring to update the
accumulator register. This is done by adding fma insns with operand 1 as the
accumulator. The register allocator considers copy preferences only in operand
order, so if the first operand is dead, it has the highest chance
