Re: [PATCH][AArch64] Unify vec_set patterns, support floating-point vector modes properly

On Thu, May 17, 2018 at 09:26:37AM -0500, Kyrill Tkachov wrote: > > On 17/05/18 14:56, Kyrill Tkachov wrote: > > > > On 17/05/18 09:46, Kyrill Tkachov wrote: > >> > >> On 15/05/18 18:56, Richard Sandiford wrote: > >>> Kyrill Tkachov writes: > Hi all, > >

Re: [PATCH][AArch64] Unify vec_set patterns, support floating-point vector modes properly

Kyrill Tkachov wrote: > That patch would look like the attached. Is this preferable? > For the above example it generates the desired: > foo_v4sf: >   ldr s0, [x0] >   ldr s1, [x1, 8] >   ins v0.s[1], v1.s[0] >   ld1 {v0.s}[2], [x2] >   ld1 {v0.s}[3], [x3]

Re: [PATCH][AArch64] Unify vec_set patterns, support floating-point vector modes properly

On 17/05/18 14:56, Kyrill Tkachov wrote: On 17/05/18 09:46, Kyrill Tkachov wrote: On 15/05/18 18:56, Richard Sandiford wrote: Kyrill Tkachov writes: Hi all, We've a deficiency in our vec_set family of patterns. We don't support directly loading a vector

Re: [PATCH][AArch64] Unify vec_set patterns, support floating-point vector modes properly

On 17/05/18 09:46, Kyrill Tkachov wrote: On 15/05/18 18:56, Richard Sandiford wrote: Kyrill Tkachov writes: Hi all, We've a deficiency in our vec_set family of patterns. We don't support directly loading a vector lane using LD1 for V2DImode and all the vector

Re: [PATCH][AArch64] Unify vec_set patterns, support floating-point vector modes properly

On 15/05/18 18:56, Richard Sandiford wrote: Kyrill Tkachov writes: Hi all, We've a deficiency in our vec_set family of patterns. We don't support directly loading a vector lane using LD1 for V2DImode and all the vector floating-point modes. We do do it

Re: [PATCH][AArch64] Unify vec_set patterns, support floating-point vector modes properly

Kyrill Tkachov writes: > Hi all, > > We've a deficiency in our vec_set family of patterns. We don't > support directly loading a vector lane using LD1 for V2DImode and all > the vector floating-point modes. We do do it correctly for the other > integer vector modes

[PATCH][AArch64] Unify vec_set patterns, support floating-point vector modes properly

Hi all, We've a deficiency in our vec_set family of patterns. We don't support directly loading a vector lane using LD1 for V2DImode and all the vector floating-point modes. We do do it correctly for the other integer vector modes (V4SI, V8HI etc) though. The alternatives on the relative