On Mon, Jan 12, 2015 at 2:29 PM, Kyrill Tkachov kyrylo.tkac...@arm.com wrote:
Now with patch attached
Kyrill
On 12/01/15 14:27, Kyrill Tkachov wrote:
Hi all,
In this PR we ICE when compiling with -mtune=xscale. The ICE is a
segfault in xscale_sched_adjust_cost.
The root cause is that
Hi all,
In this PR we ICE when compiling with -mtune=xscale. The ICE is a
segfault in xscale_sched_adjust_cost.
The root cause is that xscale_sched_adjust_cost uses the value of the
'shift' insn attribute to index
the recog operands. In GCC 5 the form and number of operands in those
patterns
Now with patch attached
Kyrill
On 12/01/15 14:27, Kyrill Tkachov wrote:
Hi all,
In this PR we ICE when compiling with -mtune=xscale. The ICE is a
segfault in xscale_sched_adjust_cost.
The root cause is that xscale_sched_adjust_cost uses the value of the
'shift' insn attribute to index
the