This patch backports the AArch32 support for Arm's Neoverse N2 CPU to GCC 9.
Testing: * Bootstrapped and regtested on arm-none-linux-gnueabihf. OK for GCC 9 branch? Thanks, Alex --- gcc/ChangeLog: * config/arm/arm-cpus.in (neoverse-n2): New. * config/arm/arm-tables.opt: Regenerate. * config/arm/arm-tune.md: Regenerate. * doc/invoke.texi: Document support for Neoverse N2.
diff --git a/gcc/config/arm/arm-cpus.in b/gcc/config/arm/arm-cpus.in index 747767ab386..3c375b9a7b9 100644 --- a/gcc/config/arm/arm-cpus.in +++ b/gcc/config/arm/arm-cpus.in @@ -1372,6 +1372,18 @@ begin cpu neoverse-v1 costs cortex_a57 end cpu neoverse-v1 +# Armv8.5 A-profile Architecture Processors +begin cpu neoverse-n2 + cname neoversen2 + tune for cortex-a57 + tune flags LDSCHED + architecture armv8.5-a+fp16 + option crypto add FP_ARMv8 CRYPTO + costs cortex_a57 + vendor 41 + part 0xd49 +end cpu neoverse-n2 + # V8 M-profile implementations. begin cpu cortex-m23 cname cortexm23 diff --git a/gcc/config/arm/arm-tables.opt b/gcc/config/arm/arm-tables.opt index 5384284b53a..5befadddf9e 100644 --- a/gcc/config/arm/arm-tables.opt +++ b/gcc/config/arm/arm-tables.opt @@ -246,6 +246,9 @@ Enum(processor_type) String(cortex-a76.cortex-a55) Value( TARGET_CPU_cortexa76co EnumValue Enum(processor_type) String(neoverse-v1) Value( TARGET_CPU_neoversev1) +EnumValue +Enum(processor_type) String(neoverse-n2) Value( TARGET_CPU_neoversen2) + EnumValue Enum(processor_type) String(cortex-m23) Value( TARGET_CPU_cortexm23) diff --git a/gcc/config/arm/arm-tune.md b/gcc/config/arm/arm-tune.md index 1257daff074..102765e6568 100644 --- a/gcc/config/arm/arm-tune.md +++ b/gcc/config/arm/arm-tune.md @@ -45,6 +45,6 @@ cortexa57cortexa53,cortexa72cortexa53,cortexa73cortexa35, cortexa73cortexa53,cortexa55,cortexa75, cortexa76,neoversen1,cortexa75cortexa55, - cortexa76cortexa55,neoversev1,cortexm23, - cortexm33,cortexr52" + cortexa76cortexa55,neoversev1,neoversen2, + cortexm23,cortexm33,cortexr52" (const (symbol_ref "((enum attr_tune) arm_tune)"))) diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index e4cc83ba5cb..2eb2c82dc47 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -17570,9 +17570,9 @@ Permissible names are: @samp{arm7tdmi}, @samp{arm7tdmi-s}, @samp{arm710t}, @samp{cortex-m4}, @samp{cortex-m7}, @samp{cortex-m23}, @samp{cortex-m33}, @samp{cortex-m1.small-multiply}, @samp{cortex-m0.small-multiply}, @samp{cortex-m0plus.small-multiply}, @samp{exynos-m1}, @samp{marvell-pj4}, -@samp{neoverse-n1}, @samp{neoverse-v1}, @samp{xscale}, @samp{iwmmxt}, -@samp{iwmmxt2}, @samp{ep9312}, @samp{fa526}, @samp{fa626}, @samp{fa606te}, -@samp{fa626te}, @samp{fmp626}, @samp{fa726te}, @samp{xgene1}. +@samp{neoverse-n1}, @samp{neoverse-n2}, @samp{neoverse-v1}, @samp{xscale}, +@samp{iwmmxt}, @samp{iwmmxt2}, @samp{ep9312}, @samp{fa526}, @samp{fa626}, +@samp{fa606te}, @samp{fa626te}, @samp{fmp626}, @samp{fa726te}, @samp{xgene1}. Additionally, this option can specify that GCC should tune the performance of the code for a big.LITTLE system. Permissible names are: