Ping: [PATCH] Improve 64->128 bit zero extension on PowerPC (PR target/108958)

Ping patch. | Date: Mon, 10 Jul 2023 15:51:56 -0400 | From: Michael Meissner | Subject: [PATCH] Improve 64->128 bit zero extension on PowerPC (PR target/108958) | Message-ID: -- Michael Meissner, IBM PO Box 98, Ayer, Massachusetts, USA, 01432 email: meiss...@linux.ibm.com

Re: [PATCH] Improve 64->128 bit zero extension on PowerPC (PR target/108958)

I forgot to add: I have tested this patch on the following systems and there was no degration. Can I check it into the trunk branch? * Power10, LE, --with-cpu=power10, IBM 128-bit long double * Power9, LE, --with-cpu=power9, IBM 128-bit long double * Power9, LE, --with-cpu=po

[PATCH] Improve 64->128 bit zero extension on PowerPC (PR target/108958)

If we are converting an unsigned DImode to a TImode value, and the TImode value will go in a vector register, GCC currently does the DImode to TImode conversion in GPR registers, and then moves the value to the vector register via a mtvsrdd instruction. This patch adds a new zero_extendditi2 insn