; Patrick O'Neill
Subject: Re: [PATCH] PR rtl-optimization/111267: Improved forward propagation.
On Sun, Jan 21, 2024 at 11:06 PM juzhe.zh...@rivai.ai
wrote:
>
> Hi, this patch causes these regressions (all ICEs) in RISC-V backend:
Note this is related to the fix for PR 109092.
But rig
On Sun, Jan 21, 2024 at 11:06 PM juzhe.zh...@rivai.ai
wrote:
>
> Hi, this patch causes these regressions (all ICEs) in RISC-V backend:
Note this is related to the fix for PR 109092.
But right now register_operand still accepts `(SUBREG (MEM...))`
before reload ...
So basically there is a check
Hi, this patch causes these regressions (all ICEs) in RISC-V backend:
FAIL: gcc.dg/torture/float32-tg-2.c -O1 (internal compiler error: in
reg_or_subregno, at jump.cc:1895)
FAIL: gcc.dg/torture/float32-tg-2.c -O1 (test for excess errors)
FAIL: gcc.dg/torture/float32-tg-2.c -O2 (internal
On Tue, Jan 16, 2024 at 2:13 AM Roger Sayle wrote:
>
>
> This patch resolves PR rtl-optimization/111267 by improving RTL-level
> forward propagation. This x86_64 code quality regression was caused
> (exposed) by my changes to improve how x86's (TImode) argument passing
> is represented at the
This patch resolves PR rtl-optimization/111267 by improving RTL-level
forward propagation. This x86_64 code quality regression was caused
(exposed) by my changes to improve how x86's (TImode) argument passing
is represented at the RTL-level (reducing the use of SUBREGs to catch
more optimization
