Thanks. Committed.
juzhe.zh...@rivai.ai
From: Robin Dapp
Date: 2023-11-07 20:10
To: juzhe.zh...@rivai.ai; gcc-patches
CC: rdapp.gcc; kito.cheng; Kito.cheng; jeffreyalaw
Subject: Re: [PATCH] RISC-V: Add RISC-V into vect_cmdline_needed
> It need command line to enable SIMD auto-vectorizat
> It need command line to enable SIMD auto-vectorization (VLS mode in RVV).
> It will enable VLS modes auto-vectorization by default if we didn't add RISCV
> into vect_cmdline.
> So adding it to disable VLS mode vectorization which will fix the FAILs like
> other targets.
Ah so it's about SIMD
: Robin Dapp
Date: 2023-11-07 20:04
To: Juzhe-Zhong; gcc-patches
CC: rdapp.gcc; kito.cheng; kito.cheng; jeffreyalaw
Subject: Re: [PATCH] RISC-V: Add RISC-V into vect_cmdline_needed
Looks OK but I don't really get the test (e.g. gen-vect-26.c). It is
only ran if target vect_cmdline_needed, otherwise
Looks OK but I don't really get the test (e.g. gen-vect-26.c). It is
only ran if target vect_cmdline_needed, otherwise compiled? Why does
that have an impact on the scan? Looks weird but well...
Regards
Robin
Like all other targets, we add RISC-V into vect_cmdline_needed.
This patch fixes following FAILs:
FAIL: gcc.dg/tree-ssa/gen-vect-11b.c scan-tree-dump-times vect "vectorized 0
loops" 1
FAIL: gcc.dg/tree-ssa/gen-vect-11c.c scan-tree-dump-times vect "vectorized 0
loops" 1
F
