On Fri, 17 Mar 2017 15:54:16 PDT (-0700), Palmer Dabbelt wrote:
> On RISC-V we can't store integers in floating-point registers as this is
> forbidden by the ISA. We've always disallowed this, but we were
> setting the preferred mode to FP_REGS for some integer modes. This
> caused the LRA to blo
On RISC-V we can't store integers in floating-point registers as this is
forbidden by the ISA. We've always disallowed this, but we were
setting the preferred mode to FP_REGS for some integer modes. This
caused the LRA to blow up with some hard to read error messages.
This patch removes the pref