On Thu, Jan 30, 2014 at 9:47 PM, Jakub Jelinek ja...@redhat.com wrote:
On Thu, Jan 30, 2014 at 08:27:47PM +, Paulo Matos wrote:
Yes, it looks strange but it was the way we came up with to
implement an instruction that loads from a pair of addresses.
From what I wrote previously to
As a followup of the thread:
http://gcc.gnu.org/ml/gcc/2014-01/msg00206.html
consider the attached patch for submission. It fixes an ICE in case you try to
use vector mode addresses and do not have it as mode dependent target hook.
As discussed in the thread adding VECTOR_MODE_P to the target
Paulo Matos pma...@broadcom.com writes:
As a followup of the thread:
http://gcc.gnu.org/ml/gcc/2014-01/msg00206.html
consider the attached patch for submission. It fixes an ICE in case
you try to use vector mode addresses and do not have it as mode
dependent target hook. As discussed in the
-Original Message-
From: Richard Sandiford [mailto:rdsandif...@googlemail.com]
Sent: 30 January 2014 12:43
To: Paulo Matos
Cc: gcc-patches@gcc.gnu.org
Subject: Re: [PATCH] Vector mode addresses
Paulo Matos pma...@broadcom.com writes:
As a followup of the thread:
http
On Thu, Jan 30, 2014 at 1:51 PM, Paulo Matos pma...@broadcom.com wrote:
-Original Message-
From: Richard Sandiford [mailto:rdsandif...@googlemail.com]
Sent: 30 January 2014 12:43
To: Paulo Matos
Cc: gcc-patches@gcc.gnu.org
Subject: Re: [PATCH] Vector mode addresses
Paulo Matos pma
Paulo Matos pma...@broadcom.com writes:
-Original Message-
From: Richard Sandiford [mailto:rdsandif...@googlemail.com]
Sent: 30 January 2014 12:43
To: Paulo Matos
Cc: gcc-patches@gcc.gnu.org
Subject: Re: [PATCH] Vector mode addresses
Paulo Matos pma...@broadcom.com writes
On 30/01/14 14:01, Richard Biener wrote:
I'm curious on where you are seeing MEMs with a vector mode address.
What does that MEM even mean?
Yes, it looks strange but it was the way we came up with to implement an
instruction that loads from a pair of addresses.
From what I wrote
On 30/01/14 17:10, Richard Sandiford wrote:
Right, in the context:
Just in case: the point I was trying to make in the second paragraph
was that the code in the patch only triggers (as you say) because the
address isn't seen as mode-dependent. But this kind of address does
look
On Thu, Jan 30, 2014 at 08:27:47PM +, Paulo Matos wrote:
Yes, it looks strange but it was the way we came up with to
implement an instruction that loads from a pair of addresses.
From what I wrote previously to Richard.
We have an instruction that loads two 32 bit values into a lower
On 30/01/14 20:47, Jakub Jelinek wrote:
On Thu, Jan 30, 2014 at 08:27:47PM +, Paulo Matos wrote:
Yes, it looks strange but it was the way we came up with to
implement an instruction that loads from a pair of addresses.
From what I wrote previously to Richard.
We have an instruction that
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