In case this patch has gotten over-looked, the three patches in the set plus
the explanation are the rewrite of the PCREL_OPT patches. It has been
rewritten to use the data flow machinery as well as validate_change and
apply_change_group from the last patch.
The PCREL_OPT patches can go anywhere
I forgot to add Bill Schmidt's name to the ChangeLog entry. He helped with the
initial conversion to use the DF framework. I will add his name in my copy of
the patch.
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meiss...@linux.ibm.com, phone:
The ELF-v2 ISA 3.1 support for Power10 has relocations to optimize cases where
the code is references an external variable in only one location. This patch
is similar to the optimizations that the linker already does to optimize TOC
accesses.
This patch is a revision of the patches last
On 8/24/20 11:01 PM, Michael Meissner wrote:
On Sat, Aug 22, 2020 at 07:05:51PM -0500, Bill Schmidt wrote:
What is necessary in order to allow this optimization to occur
earlier is to make this hidden dependency explicit. When the
relocation is inserted, we have to change the "pld" instruction
I forgot to mention that comparing the three tests of placement of the
PCREL_OPT pass:
Having the pass after sched2 generated the same number of PCREL_OPT relocations
as having the pass immediately after reload.
But having the pass just before sched2 resulted in some more PCREL_OPT
relocations.
On Sat, Aug 22, 2020 at 07:05:51PM -0500, Bill Schmidt wrote:
> What is necessary in order to allow this optimization to occur
> earlier is to make this hidden dependency explicit. When the
> relocation is inserted, we have to change the "pld" instruction to
> have a specific clobber of (in this
On Thu, Aug 20, 2020 at 06:33:29PM -0500, Segher Boessenkool wrote:
> > These patches allow the load of the address to not be physically adjacent to
> > the actual load or store, which should allow for better code.
>
> Why is that? That is not what it does anyway? /confused
It does allow that.
On 8/20/20 6:33 PM, Segher Boessenkool wrote:
Hi!
On Tue, Aug 18, 2020 at 02:31:41AM -0400, Michael Meissner wrote:
In order to do this, the pass that converts the load address and load/store
must occur late in the compilation cycle.
That does not follow afaics.
Let me see if I can help
Hi!
On Tue, Aug 18, 2020 at 02:31:41AM -0400, Michael Meissner wrote:
> Currently on power10, the compiler compiles this as:
>
> ret_var:
> pld 9,ext_variable@got@pcrel
> lwa 3,0(9)
> blr
>
> store_var:
> pld
The ELF-v2 ISA 3.1 support for Power10 has relocations to optimize cases where
the code is references an external variable in only one location. This patch
is similar to the optimizations that the linker already does to optimize TOC
accesses.
I will be submitting 3 patches as follow-ups to this
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