On Thu, 15 Jun 2023, Robin Dapp wrote:
> > the minus in 'operand 2 - operand 3' should be a plus if the
> > bias is really zero or -1. I suppose
>
> Yes, that somehow got lost from when the bias was still +1. Maybe
> Juzhe can fix this in the course of his patch.
>
> > that's quite
> the minus in 'operand 2 - operand 3' should be a plus if the
> bias is really zero or -1. I suppose
Yes, that somehow got lost from when the bias was still +1. Maybe
Juzhe can fix this in the course of his patch.
> that's quite conservative. I think you can do better when the
> loads are
!
juzhe.zh...@rivai.ai
From: Richard Biener
Date: 2023-06-15 17:52
To: Robin Dapp
CC: juzhe.zh...@rivai.ai; gcc-patches; richard.sandiford; krebbel; uweigand;
linkw
Subject: Re: [PATCH V2] VECT: Support LEN_MASK_ LOAD/STORE to support flow
control for length loop control
On Thu, 15 Jun 2023, Robin
On Thu, 15 Jun 2023, Robin Dapp wrote:
> > Meh, PoP is now behind a paywall, trying to get through ... I wonder
> > if there's a nice online html documenting the s390 len_load/store
> > instructions to better understand the need for the bias.
>
>
On 6/15/23 11:18, Robin Dapp wrote:
>> Meh, PoP is now behind a paywall, trying to get through ... I wonder
>> if there's a nice online html documenting the s390 len_load/store
>> instructions to better understand the need for the bias.
This is z16, but obviously no changes for vll/vstl:
> Meh, PoP is now behind a paywall, trying to get through ... I wonder
> if there's a nice online html documenting the s390 len_load/store
> instructions to better understand the need for the bias.
https://publibfp.dhe.ibm.com/epubs/pdf/a227832c.pdf
Look for vector load with length (store). The
On Thu, 15 Jun 2023, Robin Dapp wrote:
> >>> Can you try using the same wording for length and mask operands
> >>> as for len_load and maskload? Also len_load has the "bias"
> >>> operand which you omit here - IIRC that was added for s390 which
> >>> for unknown reason behaves a little different
; richard.sandiford; krebbel; uweigand; linkw
Subject: Re: [PATCH V2] VECT: Support LEN_MASK_ LOAD/STORE to support flow
control for length loop control
>>> Can you try using the same wording for length and mask operands
>>> as for len_load and maskload? Also len_load has the "bias
>>> Can you try using the same wording for length and mask operands
>>> as for len_load and maskload? Also len_load has the "bias"
>>> operand which you omit here - IIRC that was added for s390 which
>>> for unknown reason behaves a little different than power. If
>>> len support for s390 ever
rom: juzhe.zh...@rivai.ai
Date: 2023-06-15 16:47
To: rguenther
CC: gcc-patches; richard.sandiford; krebbel; uweigand
Subject: Re: Re: [PATCH V2] VECT: Support LEN_MASK_ LOAD/STORE to support flow
control for length loop control
Hi, Richard.
Thanks for comments.
>>Can you try using the
IFN as well.
ok
>>use the proper ifn index compute fn
ok
>>so this answers my question - you just have len_mask{load,store}?
Yes.
>>I think we really want to common this somehow, having
>>if (loop_lens) do the final_len compute and then afterwards
>>select the IFN
On Mon, 12 Jun 2023, juzhe.zh...@rivai.ai wrote:
> From: Ju-Zhe Zhong
>
> Target like ARM SVE in GCC has an elegant way to handle both loop control
> and flow control simultaneously:
>
> loop_control_mask = WHILE_ULT
> flow_control_mask = comparison
> control_mask = loop_control_mask &
From: Ju-Zhe Zhong
Target like ARM SVE in GCC has an elegant way to handle both loop control
and flow control simultaneously:
loop_control_mask = WHILE_ULT
flow_control_mask = comparison
control_mask = loop_control_mask & flow_control_mask;
MASK_LOAD (control_mask)
MASK_STORE (control_mask)
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