RE: [PATCH v2] RISC-V: Refactor riscv mode after for VXRM and FRM

2023-07-13 Thread Li, Pan2 via Gcc-patches
(insn) < 0) > return mode; > > - if (reg_mentioned_p (gen_rtx_REG (SImode, FRM_REGNUM), PATTERN (insn))) > + if (reg_mentioned_p (frm_reg, PATTERN (insn))) > return get_attr_frm_mode (insn); >else > return mode; > > Pan > > -Original Me

Re: [PATCH v2] RISC-V: Refactor riscv mode after for VXRM and FRM

2023-07-13 Thread Kito Cheng via Gcc-patches
> return mode; > > - if (reg_mentioned_p (gen_rtx_REG (SImode, FRM_REGNUM), PATTERN (insn))) > + if (reg_mentioned_p (frm_reg, PATTERN (insn))) > return get_attr_frm_mode (insn); >else > return mode; > > Pan > > -Original Message- > F

RE: [PATCH v2] RISC-V: Refactor riscv mode after for VXRM and FRM

2023-07-13 Thread Li, Pan2 via Gcc-patches
uly 13, 2023 4:42 PM To: Kito Cheng Cc: Jeff Law ; gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; rdapp@gmail.com; Wang, Yanzhang Subject: RE: [PATCH v2] RISC-V: Refactor riscv mode after for VXRM and FRM Sure thing, get you point now, will have a try and send v4 if everything goes well

RE: [PATCH v2] RISC-V: Refactor riscv mode after for VXRM and FRM

2023-07-13 Thread Li, Pan2 via Gcc-patches
: Re: [PATCH v2] RISC-V: Refactor riscv mode after for VXRM and FRM oh, I know why you failed on that, you need to put it within the function, not global static, function static variable will construct when first invoked rather than construct at program start. Could you try to apply my diff

Re: [PATCH v2] RISC-V: Refactor riscv mode after for VXRM and FRM

2023-07-13 Thread Kito Cheng via Gcc-patches
/riscv-gnu-toolchain/build-gcc-newlib-stage1/./gcc/xgcc > > > > -B/home/pli/repos/gcc/111/riscv-gnu-toolchain/build-gcc-newlib-stage1/./gcc/ > > -xc -nostdinc /dev/null -S -o /dev/null > > -fself-test=../.././gcc/gcc/testsuite/selftests > > virtual m

RE: [PATCH v2] RISC-V: Refactor riscv mode after for VXRM and FRM

2023-07-13 Thread Li, Pan2 via Gcc-patches
, 2023 2:19 PM To: Li, Pan2 Cc: Jeff Law ; gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; rdapp@gmail.com; Wang, Yanzhang Subject: Re: [PATCH v2] RISC-V: Refactor riscv mode after for VXRM and FRM Hmmm? I didn't get that error on selftest? my diff with your v2: $ git diff diff --git

Re: [PATCH v2] RISC-V: Refactor riscv mode after for VXRM and FRM

2023-07-13 Thread Kito Cheng via Gcc-patches
> To: Li, Pan2 ; gcc-patches@gcc.gnu.org > Cc: juzhe.zh...@rivai.ai; rdapp@gmail.com; Wang, Yanzhang > ; kito.ch...@gmail.com > Subject: Re: [PATCH v2] RISC-V: Refactor riscv mode after for VXRM and FRM > > > > On 7/11/23 23:50, pan2...@intel.com wrote: > > From: Pa

RE: [PATCH v2] RISC-V: Refactor riscv mode after for VXRM and FRM

2023-07-12 Thread Li, Pan2 via Gcc-patches
org Cc: juzhe.zh...@rivai.ai; rdapp@gmail.com; Wang, Yanzhang ; kito.ch...@gmail.com Subject: Re: [PATCH v2] RISC-V: Refactor riscv mode after for VXRM and FRM On 7/11/23 23:50, pan2...@intel.com wrote: > From: Pan Li > > When investigate the FRM dynmaic rounding mode, we find the global

Re: [PATCH v2] RISC-V: Refactor riscv mode after for VXRM and FRM

2023-07-12 Thread Jeff Law via Gcc-patches
On 7/11/23 23:50, pan2...@intel.com wrote: From: Pan Li When investigate the FRM dynmaic rounding mode, we find the global unknown status is quite different between the fixed-point and floating-point. Thus, we separate the unknown function with extracting some inner common functions. We

Re: [PATCH v2] RISC-V: Refactor riscv mode after for VXRM and FRM

2023-07-12 Thread Kito Cheng via Gcc-patches
; Li, Pan2 ; Wang, Yanzhang ; > kito.cheng > Subject: Re: [PATCH v2] RISC-V: Refactor riscv mode after for VXRM and FRM > > > +regnum_definition_p (rtx_insn *insn, unsigned int regno) > > I prefer it to be reg_set_p. > > > > +insn_asm_p (rtx_insn *insn) > >

RE: [PATCH v2] RISC-V: Refactor riscv mode after for VXRM and FRM

2023-07-12 Thread Li, Pan2 via Gcc-patches
2.li<mailto:pan2...@intel.com>; yanzhang.wang<mailto:yanzhang.w...@intel.com>; kito.cheng<mailto:kito.ch...@gmail.com> Subject: [PATCH v2] RISC-V: Refactor riscv mode after for VXRM and FRM From: Pan Li mailto:pan2...@intel.com>> When investigate the FRM dynmaic round

Re: [PATCH v2] RISC-V: Refactor riscv mode after for VXRM and FRM

2023-07-12 Thread juzhe.zh...@rivai.ai
w; pan2.li; yanzhang.wang; kito.cheng Subject: [PATCH v2] RISC-V: Refactor riscv mode after for VXRM and FRM From: Pan Li When investigate the FRM dynmaic rounding mode, we find the global unknown status is quite different between the fixed-point and floating-point. Thus, we separate the unknow

[PATCH v2] RISC-V: Refactor riscv mode after for VXRM and FRM

2023-07-11 Thread Pan Li via Gcc-patches
From: Pan Li When investigate the FRM dynmaic rounding mode, we find the global unknown status is quite different between the fixed-point and floating-point. Thus, we separate the unknown function with extracting some inner common functions. We will also prepare more test cases in another