> > &, ^, | has supported on clang, so I think we should support that as well
>
> Looks gcc lack of such operation right now, so mark the TYPE_INDIVISIBLE_P
> (type) = 0 as aarch64 did.
> I have a try but I am afraid we need separated patch to take care of it for
> risk control consideration.
Ye
are of it for
risk control consideration.
Pan
-Original Message-
From: Kito Cheng
Sent: Thursday, March 21, 2024 9:25 PM
To: Li, Pan2
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; Wang, Yanzhang
; rdapp@gmail.com; vine...@rivosinc.com;
pal...@rivosinc.com
Subject: Re: [PATCH v3
4 9:25 PM
> To: Li, Pan2 ; gcc-patches@gcc.gnu.org
> Cc: juzhe.zh...@rivai.ai; Kito Cheng ; Wang, Yanzhang
> ; rdapp@gmail.com; Vineet Gupta
> ; Palmer Dabbelt
> Subject: Re: [PATCH v3] RISC-V: Introduce gcc attribute riscv_rvv_vector_bits
> for RVV
>
> On Tue,
> For the vint*m*_t below operations are allowed.
> * The sizeof.
> * The global variable(s).
> * The element of union and struct.
> * The cast to other equalities.
> * CMP: >, <, ==, !=, <=, >=
The result of comparison should be vbool* rather than v[u]int*.
> * ALU: +, -, *, /, %, &, |, ^, >>, <
2, 2024 9:25 PM
To: Li, Pan2 ; gcc-patches@gcc.gnu.org
Cc: juzhe.zh...@rivai.ai; Kito Cheng ; Wang, Yanzhang
; rdapp@gmail.com; Vineet Gupta
; Palmer Dabbelt
Subject: Re: [PATCH v3] RISC-V: Introduce gcc attribute riscv_rvv_vector_bits
for RVV
On Tue, Mar 12, 2024, at 2:15 AM, pan2...@intel.com
On Tue, Mar 12, 2024, at 2:15 AM, pan2...@intel.com wrote:
> From: Pan Li
>
> Update in v3:
> * Add pre-defined __riscv_v_fixed_vlen when zvl.
>
> Update in v2:
> * Cleanup some unused code.
> * Fix some typo of commit log.
>
> Original log:
>
> This patch would like to introduce one new gcc attri
From: Pan Li
Update in v3:
* Add pre-defined __riscv_v_fixed_vlen when zvl.
Update in v2:
* Cleanup some unused code.
* Fix some typo of commit log.
Original log:
This patch would like to introduce one new gcc attribute for RVV.
This attribute is used to define fixed-length variants of one
exi
