Re: [patch] Fix PR rtl-optimization/78437

2016-11-23 Thread Eric Botcazou
> It would need strict_low_part unless we're dealing with subwords. I > think the patch should maybe check for that in the !W_R_O case. The code already does the check, it simply won't mess with strict_low_part. > Does WORD_REGISTER_OPERATIONS really buy much on targets that use it? Yes, it make

Re: [patch] Fix PR rtl-optimization/78437

2016-11-23 Thread Jeff Law
On 11/23/2016 03:32 AM, Paolo Bonzini wrote: On 23/11/2016 11:26, Eric Botcazou wrote: Does it really do that with a (set (reg1:QI)), as opposed to a (set (strict_low_part (subreg:QI (reg1:DI)))? That's the question (note that REE runs after register allocation). IIRC, strict_low_part is r

Re: [patch] Fix PR rtl-optimization/78437

2016-11-23 Thread Jeff Law
On 11/23/2016 05:26 AM, Bernd Schmidt wrote: On 11/23/2016 11:18 AM, Paolo Bonzini wrote: On 23/11/2016 10:35, Eric Botcazou wrote: I now wonder whether this also matters for !WORD_REGISTER_OPERATIONS targets, e.g. x86: (set (reg1:DI) ... ... (set (reg1:QI) (expression

Re: [patch] Fix PR rtl-optimization/78437

2016-11-23 Thread Bernd Schmidt
On 11/23/2016 11:18 AM, Paolo Bonzini wrote: On 23/11/2016 10:35, Eric Botcazou wrote: I now wonder whether this also matters for !WORD_REGISTER_OPERATIONS targets, e.g. x86: (set (reg1:DI) ... ... (set (reg1:QI) (expression:QI)) ... (set (reg2:DI)

Re: [patch] Fix PR rtl-optimization/78437

2016-11-23 Thread Eric Botcazou
> Please note that there is no guarantee that "(set (reg1:QI) > (expression:QI))" will preserve high-order bits. This is guaranteed > only when strict_low_part is used on the destination operand. > > C.f. *addqi_1 pattern, where QImode plus RTX can emit SImode ADDL insn > vs. *addqi_1_slp, where Q

Re: [patch] Fix PR rtl-optimization/78437

2016-11-23 Thread Paolo Bonzini
On 23/11/2016 11:26, Eric Botcazou wrote: >> Does it really do that with a (set (reg1:QI)), as opposed to a >> (set (strict_low_part (subreg:QI (reg1:DI)))? > > That's the question (note that REE runs after register allocation). IIRC, strict_low_part is required even after register allocation,

Re: [patch] Fix PR rtl-optimization/78437

2016-11-23 Thread Eric Botcazou
> Does it really do that with a (set (reg1:QI)), as opposed to a > (set (strict_low_part (subreg:QI (reg1:DI)))? That's the question (note that REE runs after register allocation). -- Eric Botcazou

Re: [patch] Fix PR rtl-optimization/78437

2016-11-23 Thread Uros Bizjak
Hello! > I initially thought that this would only matter for WORD_REGISTER_OPERATIONS > targets like Alpha, where the first set in QImode can implicitly set the whole > DImode register so the use reads well-defined upper bits, but I now wonder > whether this also matters for !WORD_REGISTER_OPERATI

Re: [patch] Fix PR rtl-optimization/78437

2016-11-23 Thread Paolo Bonzini
On 23/11/2016 10:35, Eric Botcazou wrote: > I now wonder > whether this also matters for !WORD_REGISTER_OPERATIONS targets, e.g. x86: > > (set (reg1:DI) ... > ... >(set (reg1:QI) (expression:QI)) >... >(set (reg2:DI) (any_extend:DI (reg1:QI))) >

[patch] Fix PR rtl-optimization/78437

2016-11-23 Thread Eric Botcazou
Hi, this is a wrong code regression at -O2 on the mainline for Alpha coming from the REE pass (Alpha is one of the 3 architectures enabling REE at -O2 but I'm probably going to enable it for 64-bit SPARC too). The problem arises when a copy is needed in combine_reaching_defs: /* If the dest