Re: [patch-1, rs6000] enable fctiw on old archs [PR112707]

2023-12-04 Thread Kewen.Lin
Hi Haochen, on 2023/12/1 10:41, HAO CHEN GUI wrote: > Hi, > SImode in float register is supported on P7 above. It causes "fctiw" > can be generated on old 32-bit processors as the output operand of typo? I guess you meant to say "can NOT"? > fctiw insn is a SImode in float/double register.

[patch-1, rs6000] enable fctiw on old archs [PR112707]

2023-11-30 Thread HAO CHEN GUI
Hi, SImode in float register is supported on P7 above. It causes "fctiw" can be generated on old 32-bit processors as the output operand of fctiw insn is a SImode in float/double register. This patch fixes the problem by adding an expand and an insn pattern for fctiw. The output of new pattern