On Wed, 2019-01-23 at 12:50 +, Tamar Christina wrote:
> Hi Steve,
>
> >
> > Hi Steve,
> >
> > No we are using aarch64_be-*-* but this is the only one that popped
> > up as a
> > failure which is why I didn't change the others.
> > But now I'm wondering why... I'll check the log file
Ellcey
> Sent: Tuesday, January 22, 2019 10:34 PM
> To: Tamar Christina; Richard Sandiford
> Cc: gcc-patches@gcc.gnu.org; nd; christophe.l...@linaro.org
> Subject: Re: [EXT] Re: [Patch 2/4][Aarch64] v2: Implement Aarch64 SIMD ABI
>
> On Mon, 2019-01-21 at 18:00 +, Tamar Ch
Sent: Tuesday, January 22, 2019 10:34 PM
To: Tamar Christina; Richard Sandiford
Cc: gcc-patches@gcc.gnu.org; nd; christophe.l...@linaro.org
Subject: Re: [EXT] Re: [Patch 2/4][Aarch64] v2: Implement Aarch64 SIMD ABI
On Mon, 2019-01-21 at 18:00 +, Tamar Christina wrote:
>
> > That w
On Mon, 2019-01-21 at 18:00 +, Tamar Christina wrote:
>
> > That would need to be aarch64*-*-* to include big-endian. Fixing that here
> > and in the other tests is OK under the obvious rule.
>
> Ah, true, I didn't look at the testcase. I tested the ILP32 case and
> committed the fix for
Hi Richard,
> -Original Message-
> From: Richard Sandiford
> Sent: Monday, January 21, 2019 16:42
> To: Tamar Christina
> Cc: Steve Ellcey ; christophe.l...@linaro.org; gcc-
> patc...@gcc.gnu.org; nd
> Subject: Re: [EXT] Re: [Patch 2/4][Aarch64] v2: Imple
org
>> Cc: gcc-patches@gcc.gnu.org; Richard Sandiford
>>
>> Subject: Re: [EXT] Re: [Patch 2/4][Aarch64] v2: Implement Aarch64 SIMD ABI
>>
>> On Fri, 2019-01-18 at 15:35 +0100, Christophe Lyon wrote:
>> >
>> > Hi Steve,
>> >
>> > I've
m: gcc-patches-ow...@gcc.gnu.org
> On Behalf Of Steve Ellcey
> Sent: Friday, January 18, 2019 17:58
> To: christophe.l...@linaro.org
> Cc: gcc-patches@gcc.gnu.org; Richard Sandiford
>
> Subject: Re: [EXT] Re: [Patch 2/4][Aarch64] v2: Implement Aarch64 SIMD ABI
>
> On
On Fri, 2019-01-18 at 15:35 +0100, Christophe Lyon wrote:
>
> Hi Steve,
>
> I've noticed that
> FAIL: g++.dg/vect/simd-clone-7.cc -std=c++14 (test for warnings,
> line 7)
> (and for c++17 and c++98)
> when forcing -mabi=ilp32.
>
> I suspect you want to skip the test in this case?
>
>
On Thu, 17 Jan 2019 at 20:11, Steve Ellcey wrote:
>
> On Thu, 2019-01-17 at 09:10 +, Richard Sandiford wrote:
> >
> > > +static bool supported_simd_type (tree t)
> >
> > Missing line break after "static bool".
>
> Fixed.
>
> > > +static bool currently_supported_simd_type (tree t, tree b)
> >
On Thu, 2019-01-17 at 09:10 +, Richard Sandiford wrote:
>
> > +static bool supported_simd_type (tree t)
>
> Missing line break after "static bool".
Fixed.
> > +static bool currently_supported_simd_type (tree t, tree b)
>
> Same here.
Fixed.
> > + return 0;
>
> The return
Steve Ellcey writes:
> Here is an updated version of the GCC patch to enable SIMD functions on
> Aarch64. There are a number of changes from the last patch.
>
> I reduced the shared code changes, there is still one change in shared code
> (omp-simd-clone.c) to call targetm.simd_clone.adjust from
On Fri, Dec 21, 2018 at 06:01:56PM +, Steve Ellcey wrote:
> Here is an update to the test part of this patch. I did not change the
> actual source code part of this, just the tests, so that is all I am
> including here. I removed the x86 changes that had gotten in there by
> accident and
Here is an update to the test part of this patch. I did not change the
actual source code part of this, just the tests, so that is all I am
including here. I removed the x86 changes that had gotten in there by
accident and used relative line numbers in the warning checks instead
of absolute line
On Wed, 2018-12-19 at 23:57 +0100, Jakub Jelinek wrote:
> On Wed, Dec 19, 2018 at 10:10:19PM +, Steve Ellcey wrote:
> > @@ -199,6 +201,7 @@ int B::f25<7> (int a, int *b, int c)
> > // { dg-final { scan-assembler-times
> > "_ZGVdN8vuva32u__ZN1BIiE3f25ILi7EEEiiPii:" 1 { target { i?86-*-*
> >
On Wed, Dec 19, 2018 at 10:10:19PM +, Steve Ellcey wrote:
> @@ -199,6 +201,7 @@ int B::f25<7> (int a, int *b, int c)
> // { dg-final { scan-assembler-times
> "_ZGVdN8vuva32u__ZN1BIiE3f25ILi7EEEiiPii:" 1 { target { i?86-*-* x86_64-*-* }
> } } }
> // { dg-final { scan-assembler-times
>
Here is an updated version of the GCC patch to enable SIMD functions on
Aarch64. There are a number of changes from the last patch.
I reduced the shared code changes, there is still one change in shared code
(omp-simd-clone.c) to call targetm.simd_clone.adjust from expand_simd_clones
but it now
On Wed, 2018-12-12 at 13:41 +0100, Jakub Jelinek wrote:
> External Email
>
> ---
> ---
> On Wed, Dec 12, 2018 at 12:34:46PM +, Richard Sandiford wrote:
> > > I considered comparing node->decl and cfun->decl to differentiate
> > >
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