Kyrill Tkachov wrote:
> On 14/10/15 13:30, Wilco Dijkstra wrote:
> > Enable instruction fusion of dependent AESE; AESMC and AESD; AESIMC pairs.
> > This can give up to 2x
> > speedup on many AArch64 implementations. Also model the crypto instructions
> > on Cortex-A57 according
> > to the Optimiz
On 14/10/15 13:30, Wilco Dijkstra wrote:
Enable instruction fusion of dependent AESE; AESMC and AESD; AESIMC pairs. This
can give up to 2x
speedup on many AArch64 implementations. Also model the crypto instructions on
Cortex-A57 according
to the Optimization Guide.
Passes regression tests.
On 14 October 2015 at 13:30, Wilco Dijkstra wrote:
> Enable instruction fusion of dependent AESE; AESMC and AESD; AESIMC pairs.
> This can give up to 2x
> speedup on many AArch64 implementations. Also model the crypto instructions
> on Cortex-A57 according
> to the Optimization Guide.
>
> Passes