Hi Srinath, > -----Original Message----- > From: Srinath Parvathaneni <srinath.parvathan...@arm.com> > Sent: 18 March 2020 11:32 > To: gcc-patches@gcc.gnu.org > Cc: Kyrylo Tkachov <kyrylo.tkac...@arm.com> > Subject: [PATCH v2][ARM][GCC][4/4x]: MVE intrinsics with quaternary > operands. > > Hello Kyrill, > > Following patch is the rebased version of v1. > (version v1) https://gcc.gnu.org/pipermail/gcc-patches/2019- > November/534345.html > > #### > > Hello, > > This patch supports following MVE ACLE intrinsics with quaternary operands. > > vabdq_m_f32, vabdq_m_f16, vaddq_m_f32, vaddq_m_f16, vaddq_m_n_f32, > vaddq_m_n_f16, vandq_m_f32, vandq_m_f16, vbicq_m_f32, vbicq_m_f16, > vbrsrq_m_n_f32, vbrsrq_m_n_f16, vcaddq_rot270_m_f32, > vcaddq_rot270_m_f16, vcaddq_rot90_m_f32, vcaddq_rot90_m_f16, > vcmlaq_m_f32, vcmlaq_m_f16, vcmlaq_rot180_m_f32, > vcmlaq_rot180_m_f16, vcmlaq_rot270_m_f32, vcmlaq_rot270_m_f16, > vcmlaq_rot90_m_f32, vcmlaq_rot90_m_f16, vcmulq_m_f32, vcmulq_m_f16, > vcmulq_rot180_m_f32, vcmulq_rot180_m_f16, vcmulq_rot270_m_f32, > vcmulq_rot270_m_f16, vcmulq_rot90_m_f32, vcmulq_rot90_m_f16, > vcvtq_m_n_s32_f32, vcvtq_m_n_s16_f16, vcvtq_m_n_u32_f32, > vcvtq_m_n_u16_f16, veorq_m_f32, veorq_m_f16, vfmaq_m_f32, > vfmaq_m_f16, vfmaq_m_n_f32, vfmaq_m_n_f16, vfmasq_m_n_f32, > vfmasq_m_n_f16, vfmsq_m_f32, vfmsq_m_f16, vmaxnmq_m_f32, > vmaxnmq_m_f16, vminnmq_m_f32, vminnmq_m_f16, vmulq_m_f32, > vmulq_m_f16, vmulq_m_n_f32, vmulq_m_n_f16, vornq_m_f32, > vornq_m_f16, vorrq_m_f32, vorrq_m_f16, vsubq_m_f32, vsubq_m_f16, > vsubq_m_n_f32, vsubq_m_n_f16. > > Please refer to M-profile Vector Extension (MVE) intrinsics [1] for more > details. > [1] https://developer.arm.com/architectures/instruction-sets/simd- > isas/helium/mve-intrinsics > > Regression tested on arm-none-eabi and found no regressions. > > Ok for trunk?
Thanks, I've pushed this patch to master. Kyrill > > Thanks, > Srinath. > > gcc/ChangeLog: > > 2019-10-31 Andre Vieira <andre.simoesdiasvie...@arm.com> > Mihail Ionescu <mihail.ione...@arm.com> > Srinath Parvathaneni <srinath.parvathan...@arm.com> > > * config/arm/arm_mve.h (vabdq_m_f32): Define macro. > (vabdq_m_f16): Likewise. > (vaddq_m_f32): Likewise. > (vaddq_m_f16): Likewise. > (vaddq_m_n_f32): Likewise. > (vaddq_m_n_f16): Likewise. > (vandq_m_f32): Likewise. > (vandq_m_f16): Likewise. > (vbicq_m_f32): Likewise. > (vbicq_m_f16): Likewise. > (vbrsrq_m_n_f32): Likewise. > (vbrsrq_m_n_f16): Likewise. > (vcaddq_rot270_m_f32): Likewise. > (vcaddq_rot270_m_f16): Likewise. > (vcaddq_rot90_m_f32): Likewise. > (vcaddq_rot90_m_f16): Likewise. > (vcmlaq_m_f32): Likewise. > (vcmlaq_m_f16): Likewise. > (vcmlaq_rot180_m_f32): Likewise. > (vcmlaq_rot180_m_f16): Likewise. > (vcmlaq_rot270_m_f32): Likewise. > (vcmlaq_rot270_m_f16): Likewise. > (vcmlaq_rot90_m_f32): Likewise. > (vcmlaq_rot90_m_f16): Likewise. > (vcmulq_m_f32): Likewise. > (vcmulq_m_f16): Likewise. > (vcmulq_rot180_m_f32): Likewise. > (vcmulq_rot180_m_f16): Likewise. > (vcmulq_rot270_m_f32): Likewise. > (vcmulq_rot270_m_f16): Likewise. > (vcmulq_rot90_m_f32): Likewise. > (vcmulq_rot90_m_f16): Likewise. > (vcvtq_m_n_s32_f32): Likewise. > (vcvtq_m_n_s16_f16): Likewise. > (vcvtq_m_n_u32_f32): Likewise. > (vcvtq_m_n_u16_f16): Likewise. > (veorq_m_f32): Likewise. > (veorq_m_f16): Likewise. > (vfmaq_m_f32): Likewise. > (vfmaq_m_f16): Likewise. > (vfmaq_m_n_f32): Likewise. > (vfmaq_m_n_f16): Likewise. > (vfmasq_m_n_f32): Likewise. > (vfmasq_m_n_f16): Likewise. > (vfmsq_m_f32): Likewise. > (vfmsq_m_f16): Likewise. > (vmaxnmq_m_f32): Likewise. > (vmaxnmq_m_f16): Likewise. > (vminnmq_m_f32): Likewise. > (vminnmq_m_f16): Likewise. > (vmulq_m_f32): Likewise. > (vmulq_m_f16): Likewise. > (vmulq_m_n_f32): Likewise. > (vmulq_m_n_f16): Likewise. > (vornq_m_f32): Likewise. > (vornq_m_f16): Likewise. > (vorrq_m_f32): Likewise. > (vorrq_m_f16): Likewise. > (vsubq_m_f32): Likewise. > (vsubq_m_f16): Likewise. > (vsubq_m_n_f32): Likewise. > (vsubq_m_n_f16): Likewise. > (__attribute__): Likewise. > (__arm_vabdq_m_f32): Likewise. > (__arm_vabdq_m_f16): Likewise. > (__arm_vaddq_m_f32): Likewise. > (__arm_vaddq_m_f16): Likewise. > (__arm_vaddq_m_n_f32): Likewise. > (__arm_vaddq_m_n_f16): Likewise. > (__arm_vandq_m_f32): Likewise. > (__arm_vandq_m_f16): Likewise. > (__arm_vbicq_m_f32): Likewise. > (__arm_vbicq_m_f16): Likewise. > (__arm_vbrsrq_m_n_f32): Likewise. > (__arm_vbrsrq_m_n_f16): Likewise. > (__arm_vcaddq_rot270_m_f32): Likewise. > (__arm_vcaddq_rot270_m_f16): Likewise. > (__arm_vcaddq_rot90_m_f32): Likewise. > (__arm_vcaddq_rot90_m_f16): Likewise. > (__arm_vcmlaq_m_f32): Likewise. > (__arm_vcmlaq_m_f16): Likewise. > (__arm_vcmlaq_rot180_m_f32): Likewise. > (__arm_vcmlaq_rot180_m_f16): Likewise. > (__arm_vcmlaq_rot270_m_f32): Likewise. > (__arm_vcmlaq_rot270_m_f16): Likewise. > (__arm_vcmlaq_rot90_m_f32): Likewise. > (__arm_vcmlaq_rot90_m_f16): Likewise. > (__arm_vcmulq_m_f32): Likewise. > (__arm_vcmulq_m_f16): Likewise. > (__arm_vcmulq_rot180_m_f32): Define intrinsic. > (__arm_vcmulq_rot180_m_f16): Likewise. > (__arm_vcmulq_rot270_m_f32): Likewise. > (__arm_vcmulq_rot270_m_f16): Likewise. > (__arm_vcmulq_rot90_m_f32): Likewise. > (__arm_vcmulq_rot90_m_f16): Likewise. > (__arm_vcvtq_m_n_s32_f32): Likewise. > (__arm_vcvtq_m_n_s16_f16): Likewise. > (__arm_vcvtq_m_n_u32_f32): Likewise. > (__arm_vcvtq_m_n_u16_f16): Likewise. > (__arm_veorq_m_f32): Likewise. > (__arm_veorq_m_f16): Likewise. > (__arm_vfmaq_m_f32): Likewise. > (__arm_vfmaq_m_f16): Likewise. > (__arm_vfmaq_m_n_f32): Likewise. > (__arm_vfmaq_m_n_f16): Likewise. > (__arm_vfmasq_m_n_f32): Likewise. > (__arm_vfmasq_m_n_f16): Likewise. > (__arm_vfmsq_m_f32): Likewise. > (__arm_vfmsq_m_f16): Likewise. > (__arm_vmaxnmq_m_f32): Likewise. > (__arm_vmaxnmq_m_f16): Likewise. > (__arm_vminnmq_m_f32): Likewise. > (__arm_vminnmq_m_f16): Likewise. > (__arm_vmulq_m_f32): Likewise. > (__arm_vmulq_m_f16): Likewise. > (__arm_vmulq_m_n_f32): Likewise. > (__arm_vmulq_m_n_f16): Likewise. > (__arm_vornq_m_f32): Likewise. > (__arm_vornq_m_f16): Likewise. > (__arm_vorrq_m_f32): Likewise. > (__arm_vorrq_m_f16): Likewise. > (__arm_vsubq_m_f32): Likewise. > (__arm_vsubq_m_f16): Likewise. > (__arm_vsubq_m_n_f32): Likewise. > (__arm_vsubq_m_n_f16): Likewise. > (vabdq_m): Define polymorphic variant. > (vaddq_m): Likewise. > (vaddq_m_n): Likewise. > (vandq_m): Likewise. > (vbicq_m): Likewise. > (vbrsrq_m_n): Likewise. > (vcaddq_rot270_m): Likewise. > (vcaddq_rot90_m): Likewise. > (vcmlaq_m): Likewise. > (vcmlaq_rot180_m): Likewise. > (vcmlaq_rot270_m): Likewise. > (vcmlaq_rot90_m): Likewise. > (vcmulq_m): Likewise. > (vcmulq_rot180_m): Likewise. > (vcmulq_rot270_m): Likewise. > (vcmulq_rot90_m): Likewise. > (veorq_m): Likewise. > (vfmaq_m): Likewise. > (vfmaq_m_n): Likewise. > (vfmasq_m_n): Likewise. > (vfmsq_m): Likewise. > (vmaxnmq_m): Likewise. > (vminnmq_m): Likewise. > (vmulq_m): Likewise. > (vmulq_m_n): Likewise. > (vornq_m): Likewise. > (vsubq_m): Likewise. > (vsubq_m_n): Likewise. > (vorrq_m): Likewise. > * config/arm/arm_mve_builtins.def > (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use > builtin qualifier. > (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise. > (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise. > * config/arm/mve.md (mve_vabdq_m_f<mode>): Define RTL pattern. > (mve_vaddq_m_f<mode>): Likewise. > (mve_vaddq_m_n_f<mode>): Likewise. > (mve_vandq_m_f<mode>): Likewise. > (mve_vbicq_m_f<mode>): Likewise. > (mve_vbrsrq_m_n_f<mode>): Likewise. > (mve_vcaddq_rot270_m_f<mode>): Likewise. > (mve_vcaddq_rot90_m_f<mode>): Likewise. > (mve_vcmlaq_m_f<mode>): Likewise. > (mve_vcmlaq_rot180_m_f<mode>): Likewise. > (mve_vcmlaq_rot270_m_f<mode>): Likewise. > (mve_vcmlaq_rot90_m_f<mode>): Likewise. > (mve_vcmulq_m_f<mode>): Likewise. > (mve_vcmulq_rot180_m_f<mode>): Likewise. > (mve_vcmulq_rot270_m_f<mode>): Likewise. > (mve_vcmulq_rot90_m_f<mode>): Likewise. > (mve_veorq_m_f<mode>): Likewise. > (mve_vfmaq_m_f<mode>): Likewise. > (mve_vfmaq_m_n_f<mode>): Likewise. > (mve_vfmasq_m_n_f<mode>): Likewise. > (mve_vfmsq_m_f<mode>): Likewise. > (mve_vmaxnmq_m_f<mode>): Likewise. > (mve_vminnmq_m_f<mode>): Likewise. > (mve_vmulq_m_f<mode>): Likewise. > (mve_vmulq_m_n_f<mode>): Likewise. > (mve_vornq_m_f<mode>): Likewise. > (mve_vorrq_m_f<mode>): Likewise. > (mve_vsubq_m_f<mode>): Likewise. > (mve_vsubq_m_n_f<mode>): Likewise. > > gcc/testsuite/ChangeLog: > > 2019-10-31 Andre Vieira <andre.simoesdiasvie...@arm.com> > Mihail Ionescu <mihail.ione...@arm.com> > Srinath Parvathaneni <srinath.parvathan...@arm.com> > > * gcc.target/arm/mve/intrinsics/vabdq_m_f16.c: New test. > * gcc.target/arm/mve/intrinsics/vabdq_m_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vaddq_m_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vaddq_m_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vaddq_m_n_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vaddq_m_n_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vandq_m_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vandq_m_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vbicq_m_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vbicq_m_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmlaq_m_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmlaq_m_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmulq_m_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmulq_m_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcvtq_m_n_s16_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcvtq_m_n_s32_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcvtq_m_n_u16_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcvtq_m_n_u32_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/veorq_m_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/veorq_m_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vfmaq_m_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vfmaq_m_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vfmaq_m_n_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vfmsq_m_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vfmsq_m_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmaxnmq_m_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmaxnmq_m_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vminnmq_m_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vminnmq_m_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_m_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_m_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_m_n_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_m_n_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vornq_m_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vornq_m_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vorrq_m_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vorrq_m_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vsubq_m_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vsubq_m_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vsubq_m_n_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vsubq_m_n_f32.c: Likewise.
