Hi Srinath, > -----Original Message----- > From: Srinath Parvathaneni <srinath.parvathan...@arm.com> > Sent: 18 March 2020 17:18 > To: gcc-patches@gcc.gnu.org > Cc: Kyrylo Tkachov <kyrylo.tkac...@arm.com> > Subject: [PATCH v2][ARM][GCC][8/5x]: Remaining MVE store intrinsics which > stores an half word, word and double word to memory. > > Hello Kyrill, > > Following patch is the rebased version of v1. > (version v1) https://gcc.gnu.org/pipermail/gcc-patches/2019- > November/534340.html > > #### > > Hello, > > This patch supports the following MVE ACLE store intrinsics which stores an > halfword, word or double word to memory. > > vstrdq_scatter_base_p_s64, vstrdq_scatter_base_p_u64, > vstrdq_scatter_base_s64, vstrdq_scatter_base_u64, > vstrdq_scatter_offset_p_s64, vstrdq_scatter_offset_p_u64, > vstrdq_scatter_offset_s64, vstrdq_scatter_offset_u64, > vstrdq_scatter_shifted_offset_p_s64, > vstrdq_scatter_shifted_offset_p_u64, vstrdq_scatter_shifted_offset_s64, > vstrdq_scatter_shifted_offset_u64, vstrhq_scatter_offset_f16, > vstrhq_scatter_offset_p_f16, vstrhq_scatter_shifted_offset_f16, > vstrhq_scatter_shifted_offset_p_f16, > vstrwq_scatter_base_f32, vstrwq_scatter_base_p_f32, > vstrwq_scatter_offset_f32, vstrwq_scatter_offset_p_f32, > vstrwq_scatter_offset_p_s32, vstrwq_scatter_offset_p_u32, > vstrwq_scatter_offset_s32, vstrwq_scatter_offset_u32, > vstrwq_scatter_shifted_offset_f32, > vstrwq_scatter_shifted_offset_p_f32, vstrwq_scatter_shifted_offset_p_s32, > vstrwq_scatter_shifted_offset_p_u32, vstrwq_scatter_shifted_offset_s32, > vstrwq_scatter_shifted_offset_u32. > > Please refer to M-profile Vector Extension (MVE) intrinsics [1] for more > details. > [1] https://developer.arm.com/architectures/instruction-sets/simd- > isas/helium/mve-intrinsics > > In this patch a new predicate "Ri" is defined to check the immediate is in the > range of +/-1016 and multiple of 8. > > Regression tested on arm-none-eabi and found no regressions. > > Ok for trunk?
Thanks, I've pushed this patch to master. Kyrill > > Thanks, > Srinath. > > gcc/ChangeLog: > > 2019-11-05 Andre Vieira <andre.simoesdiasvie...@arm.com> > Mihail Ionescu <mihail.ione...@arm.com> > Srinath Parvathaneni <srinath.parvathan...@arm.com> > > * config/arm/arm_mve.h (vstrdq_scatter_base_p_s64): Define > macro. > (vstrdq_scatter_base_p_u64): Likewise. > (vstrdq_scatter_base_s64): Likewise. > (vstrdq_scatter_base_u64): Likewise. > (vstrdq_scatter_offset_p_s64): Likewise. > (vstrdq_scatter_offset_p_u64): Likewise. > (vstrdq_scatter_offset_s64): Likewise. > (vstrdq_scatter_offset_u64): Likewise. > (vstrdq_scatter_shifted_offset_p_s64): Likewise. > (vstrdq_scatter_shifted_offset_p_u64): Likewise. > (vstrdq_scatter_shifted_offset_s64): Likewise. > (vstrdq_scatter_shifted_offset_u64): Likewise. > (vstrhq_scatter_offset_f16): Likewise. > (vstrhq_scatter_offset_p_f16): Likewise. > (vstrhq_scatter_shifted_offset_f16): Likewise. > (vstrhq_scatter_shifted_offset_p_f16): Likewise. > (vstrwq_scatter_base_f32): Likewise. > (vstrwq_scatter_base_p_f32): Likewise. > (vstrwq_scatter_offset_f32): Likewise. > (vstrwq_scatter_offset_p_f32): Likewise. > (vstrwq_scatter_offset_p_s32): Likewise. > (vstrwq_scatter_offset_p_u32): Likewise. > (vstrwq_scatter_offset_s32): Likewise. > (vstrwq_scatter_offset_u32): Likewise. > (vstrwq_scatter_shifted_offset_f32): Likewise. > (vstrwq_scatter_shifted_offset_p_f32): Likewise. > (vstrwq_scatter_shifted_offset_p_s32): Likewise. > (vstrwq_scatter_shifted_offset_p_u32): Likewise. > (vstrwq_scatter_shifted_offset_s32): Likewise. > (vstrwq_scatter_shifted_offset_u32): Likewise. > (__arm_vstrdq_scatter_base_p_s64): Define intrinsic. > (__arm_vstrdq_scatter_base_p_u64): Likewise. > (__arm_vstrdq_scatter_base_s64): Likewise. > (__arm_vstrdq_scatter_base_u64): Likewise. > (__arm_vstrdq_scatter_offset_p_s64): Likewise. > (__arm_vstrdq_scatter_offset_p_u64): Likewise. > (__arm_vstrdq_scatter_offset_s64): Likewise. > (__arm_vstrdq_scatter_offset_u64): Likewise. > (__arm_vstrdq_scatter_shifted_offset_p_s64): Likewise. > (__arm_vstrdq_scatter_shifted_offset_p_u64): Likewise. > (__arm_vstrdq_scatter_shifted_offset_s64): Likewise. > (__arm_vstrdq_scatter_shifted_offset_u64): Likewise. > (__arm_vstrwq_scatter_offset_p_s32): Likewise. > (__arm_vstrwq_scatter_offset_p_u32): Likewise. > (__arm_vstrwq_scatter_offset_s32): Likewise. > (__arm_vstrwq_scatter_offset_u32): Likewise. > (__arm_vstrwq_scatter_shifted_offset_p_s32): Likewise. > (__arm_vstrwq_scatter_shifted_offset_p_u32): Likewise. > (__arm_vstrwq_scatter_shifted_offset_s32): Likewise. > (__arm_vstrwq_scatter_shifted_offset_u32): Likewise. > (__arm_vstrhq_scatter_offset_f16): Likewise. > (__arm_vstrhq_scatter_offset_p_f16): Likewise. > (__arm_vstrhq_scatter_shifted_offset_f16): Likewise. > (__arm_vstrhq_scatter_shifted_offset_p_f16): Likewise. > (__arm_vstrwq_scatter_base_f32): Likewise. > (__arm_vstrwq_scatter_base_p_f32): Likewise. > (__arm_vstrwq_scatter_offset_f32): Likewise. > (__arm_vstrwq_scatter_offset_p_f32): Likewise. > (__arm_vstrwq_scatter_shifted_offset_f32): Likewise. > (__arm_vstrwq_scatter_shifted_offset_p_f32): Likewise. > (vstrhq_scatter_offset): Define polymorphic variant. > (vstrhq_scatter_offset_p): Likewise. > (vstrhq_scatter_shifted_offset): Likewise. > (vstrhq_scatter_shifted_offset_p): Likewise. > (vstrwq_scatter_base): Likewise. > (vstrwq_scatter_base_p): Likewise. > (vstrwq_scatter_offset): Likewise. > (vstrwq_scatter_offset_p): Likewise. > (vstrwq_scatter_shifted_offset): Likewise. > (vstrwq_scatter_shifted_offset_p): Likewise. > (vstrdq_scatter_base_p): Likewise. > (vstrdq_scatter_base): Likewise. > (vstrdq_scatter_offset_p): Likewise. > (vstrdq_scatter_offset): Likewise. > (vstrdq_scatter_shifted_offset_p): Likewise. > (vstrdq_scatter_shifted_offset): Likewise. > * config/arm/arm_mve_builtins.def (STRSBS): Use builtin qualifier. > (STRSBS_P): Likewise. > (STRSBU): Likewise. > (STRSBU_P): Likewise. > (STRSS): Likewise. > (STRSS_P): Likewise. > (STRSU): Likewise. > (STRSU_P): Likewise. > * config/arm/constraints.md (Ri): Define. > * config/arm/mve.md (VSTRDSBQ): Define iterator. > (VSTRDSOQ): Likewise. > (VSTRDSSOQ): Likewise. > (VSTRWSOQ): Likewise. > (VSTRWSSOQ): Likewise. > (mve_vstrdq_scatter_base_p_<supf>v2di): Define RTL pattern. > (mve_vstrdq_scatter_base_<supf>v2di): Likewise. > (mve_vstrdq_scatter_offset_p_<supf>v2di): Likewise. > (mve_vstrdq_scatter_offset_<supf>v2di): Likewise. > (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di): Likewise. > (mve_vstrdq_scatter_shifted_offset_<supf>v2di): Likewise. > (mve_vstrhq_scatter_offset_fv8hf): Likewise. > (mve_vstrhq_scatter_offset_p_fv8hf): Likewise. > (mve_vstrhq_scatter_shifted_offset_fv8hf): Likewise. > (mve_vstrhq_scatter_shifted_offset_p_fv8hf): Likewise. > (mve_vstrwq_scatter_base_fv4sf): Likewise. > (mve_vstrwq_scatter_base_p_fv4sf): Likewise. > (mve_vstrwq_scatter_offset_fv4sf): Likewise. > (mve_vstrwq_scatter_offset_p_fv4sf): Likewise. > (mve_vstrwq_scatter_offset_p_<supf>v4si): Likewise. > (mve_vstrwq_scatter_offset_<supf>v4si): Likewise. > (mve_vstrwq_scatter_shifted_offset_fv4sf): Likewise. > (mve_vstrwq_scatter_shifted_offset_p_fv4sf): Likewise. > (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si): Likewise. > (mve_vstrwq_scatter_shifted_offset_<supf>v4si): Likewise. > * config/arm/predicates.md (Ri): Define predicate to check > immediate > is the range +/-1016 and multiple of 8. > > gcc/testsuite/ChangeLog: > > 2019-11-05 Andre Vieira <andre.simoesdiasvie...@arm.com> > Mihail Ionescu <mihail.ione...@arm.com> > Srinath Parvathaneni <srinath.parvathan...@arm.com> > > * gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_p_s64.c: New > test. > * gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_p_u64.c: > Likewise. > * gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_s64.c: Likewise. > * gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_u64.c: Likewise. > * gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_p_s64.c: > Likewise. > * gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_p_u64.c: > Likewise. > * gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_s64.c: > Likewise. > * gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_u64.c: > Likewise. > * > gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_p_s64.c: > Likewise. > * > gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_p_u64.c: > Likewise. > * gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_s64.c: > Likewise. > * gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_u64.c: > Likewise. > * gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_f16.c: > Likewise. > * gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_f16.c: > Likewise. > * gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_f16.c: > Likewise. > * > gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_f16.c: > Likewise. > * gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_f32.c: > Likewise. > * gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_f32.c: > Likewise. > * gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_f32.c: > Likewise. > * gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_s32.c: > Likewise. > * gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_u32.c: > Likewise. > * gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_s32.c: > Likewise. > * gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_u32.c: > Likewise. > * gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_f32.c: > Likewise. > * > gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_f32.c: > Likewise. > * > gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_s32.c: > Likewise. > * > gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_u32.c: > Likewise. > * gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_s32.c: > Likewise. > * gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_u32.c: > Likewise.
