Re: RFA: Fix add_predicate_code to acknowledge ZERO_EXTRACT as an lvalue.

2018-11-14 Thread Jeff Law
On 11/11/18 1:52 AM, Joern Wolfgang Rennecke wrote: > With a configurable vector size, it is not really feasible to represent > every vector register > inside GCC as a collection of lots of imaginary BITS_PER_WORD registers. > So you got your general purpose registers that are BITS_PER_WORD, and >

RFA: Fix add_predicate_code to acknowledge ZERO_EXTRACT as an lvalue.

2018-11-11 Thread Joern Wolfgang Rennecke
With a configurable vector size, it is not really feasible to represent every vector register inside GCC as a collection of lots of imaginary BITS_PER_WORD registers. So you got your general purpose registers that are BITS_PER_WORD, and vector registers that are a bit or a lot larger. To void