Pushed to r14-3928. 在 2023/9/13 上午11:31, Xiaolong Chen 写道:
v3 -> v4: Modify the name of the patch file.In order to better test the function of the vector instruction, the 128 bit test cases are further split according to the function of the instruction. Xiaolong Chen (23): LoongArch: Add tests of -mstrict-align option. LoongArch: Add testsuite framework for Loongson SX/ASX. LoongArch: Add tests for Loongson SX builtin functions. LoongArch: Add tests for SX vector floating-point instructions. LoongArch: Add tests for SX vector addition instructions. LoongArch: Add tests for SX vector subtraction instructions. LoongArch: Add tests for SX vector addition vsadd instructions. LoongArch: Add tests for the SX vector multiplication instruction. LoongArch: Add tests for SX vector vavg/vavgr instructions. LoongArch: Add tests for SX vector vmax/vmaxi/vmin/vmini instructions. LoongArch: Add tests for SX vector vexth/vextl/vldi/vneg/vsat instructions. LoongArch: Add tests for SX vector vabsd/vmskgez/vmskltz/vmsknz/vsigncov instructions. LoongArch: Add tests for SX vector vdiv/vmod instructions. LoongArch: Add tests for SX vector vsll/vslli/vsrl/vsrli/vsrln/vsrlni/vsrlr /vsrlri/vslrlrn/vsrlrni instructions. LoongArch: Add tests for SX vector vrotr/vrotri/vsra/vsrai/vsran/vsrani /vsrarn/vsrarni instructions. LoongArch: Add tests for SX vector vssran/vssrani/vssrarn/vssrarni/vssrln /vssrlni/vssrlrn/vssrlrni instructions. LoongArch: Add tests for SX vector vbitclr/vbitclri/vbitrev/vbitrevi/ vbitsel/vbitseli/vbitset/vbitseti/vclo/vclz/vpcnt instructions. LoongArch: Add tests for SX vector floating point arithmetic instructions. LoongArch: Add tests for SX vector vfrstp/vfrstpi/vseq/vseqi/vsle /vslei/vslt/vslti instructions. LoongArch: Add tests for SX vector vfcmp instructions. LoongArch: Add tests for SX vector handling and shuffle instructions. LoongArch: Add tests for SX vector vand/vandi/vandn/vor/vori/vnor/ vnori/vxor/vxori instructions. LoongArch: Add tests for SX vector vfmadd/vfnmadd/vld/vst instructions. .../gcc.target/loongarch/strict-align.c | 12 + .../loongarch/vector/loongarch-vector.exp | 42 + .../loongarch/vector/lsx/lsx-builtin.c | 1461 +++++++++++++++++ .../loongarch/vector/lsx/lsx-vabsd-1.c | 272 +++ .../loongarch/vector/lsx/lsx-vabsd-2.c | 398 +++++ .../loongarch/vector/lsx/lsx-vadd.c | 416 +++++ .../loongarch/vector/lsx/lsx-vadda.c | 344 ++++ .../loongarch/vector/lsx/lsx-vaddi.c | 251 +++ .../loongarch/vector/lsx/lsx-vaddwev-1.c | 335 ++++ .../loongarch/vector/lsx/lsx-vaddwev-2.c | 344 ++++ .../loongarch/vector/lsx/lsx-vaddwev-3.c | 425 +++++ .../loongarch/vector/lsx/lsx-vaddwod-1.c | 408 +++++ .../loongarch/vector/lsx/lsx-vaddwod-2.c | 344 ++++ .../loongarch/vector/lsx/lsx-vaddwod-3.c | 237 +++ .../loongarch/vector/lsx/lsx-vand.c | 159 ++ .../loongarch/vector/lsx/lsx-vandi.c | 67 + .../loongarch/vector/lsx/lsx-vandn.c | 129 ++ .../loongarch/vector/lsx/lsx-vavg-1.c | 398 +++++ .../loongarch/vector/lsx/lsx-vavg-2.c | 308 ++++ .../loongarch/vector/lsx/lsx-vavgr-1.c | 299 ++++ .../loongarch/vector/lsx/lsx-vavgr-2.c | 317 ++++ .../loongarch/vector/lsx/lsx-vbitclr.c | 461 ++++++ .../loongarch/vector/lsx/lsx-vbitclri.c | 279 ++++ .../loongarch/vector/lsx/lsx-vbitrev.c | 407 +++++ .../loongarch/vector/lsx/lsx-vbitrevi.c | 336 ++++ .../loongarch/vector/lsx/lsx-vbitsel.c | 109 ++ .../loongarch/vector/lsx/lsx-vbitseli.c | 84 + .../loongarch/vector/lsx/lsx-vbitset.c | 371 +++++ .../loongarch/vector/lsx/lsx-vbitseti.c | 279 ++++ .../loongarch/vector/lsx/lsx-vbsll.c | 83 + .../loongarch/vector/lsx/lsx-vbsrl.c | 55 + .../loongarch/vector/lsx/lsx-vclo.c | 266 +++ .../loongarch/vector/lsx/lsx-vclz.c | 265 +++ .../loongarch/vector/lsx/lsx-vdiv-1.c | 299 ++++ .../loongarch/vector/lsx/lsx-vdiv-2.c | 254 +++ .../loongarch/vector/lsx/lsx-vexth-1.c | 342 ++++ .../loongarch/vector/lsx/lsx-vexth-2.c | 182 ++ .../loongarch/vector/lsx/lsx-vextl-1.c | 83 + .../loongarch/vector/lsx/lsx-vextl-2.c | 83 + .../loongarch/vector/lsx/lsx-vextrins.c | 479 ++++++ .../loongarch/vector/lsx/lsx-vfadd_d.c | 407 +++++ .../loongarch/vector/lsx/lsx-vfadd_s.c | 470 ++++++ .../loongarch/vector/lsx/lsx-vfclass_d.c | 83 + .../loongarch/vector/lsx/lsx-vfclass_s.c | 74 + .../loongarch/vector/lsx/lsx-vfcmp_caf.c | 244 +++ .../loongarch/vector/lsx/lsx-vfcmp_ceq.c | 516 ++++++ .../loongarch/vector/lsx/lsx-vfcmp_cle.c | 530 ++++++ .../loongarch/vector/lsx/lsx-vfcmp_clt.c | 476 ++++++ .../loongarch/vector/lsx/lsx-vfcmp_cne.c | 378 +++++ .../loongarch/vector/lsx/lsx-vfcmp_cor.c | 170 ++ .../loongarch/vector/lsx/lsx-vfcmp_cun.c | 253 +++ .../loongarch/vector/lsx/lsx-vfcmp_saf.c | 214 +++ .../loongarch/vector/lsx/lsx-vfcmp_seq.c | 450 +++++ .../loongarch/vector/lsx/lsx-vfcmp_sle.c | 407 +++++ .../loongarch/vector/lsx/lsx-vfcmp_slt.c | 512 ++++++ .../loongarch/vector/lsx/lsx-vfcmp_sne.c | 398 +++++ .../loongarch/vector/lsx/lsx-vfcmp_sor.c | 269 +++ .../loongarch/vector/lsx/lsx-vfcmp_sun.c | 335 ++++ .../loongarch/vector/lsx/lsx-vfcvt-1.c | 398 +++++ .../loongarch/vector/lsx/lsx-vfcvt-2.c | 278 ++++ .../loongarch/vector/lsx/lsx-vffint-1.c | 161 ++ .../loongarch/vector/lsx/lsx-vffint-2.c | 264 +++ .../loongarch/vector/lsx/lsx-vffint-3.c | 102 ++ .../loongarch/vector/lsx/lsx-vflogb_d.c | 76 + .../loongarch/vector/lsx/lsx-vflogb_s.c | 185 +++ .../loongarch/vector/lsx/lsx-vfmadd_d.c | 251 +++ .../loongarch/vector/lsx/lsx-vfmadd_s.c | 381 +++++ .../loongarch/vector/lsx/lsx-vfmax_d.c | 200 +++ .../loongarch/vector/lsx/lsx-vfmax_s.c | 335 ++++ .../loongarch/vector/lsx/lsx-vfmaxa_d.c | 155 ++ .../loongarch/vector/lsx/lsx-vfmaxa_s.c | 230 +++ .../loongarch/vector/lsx/lsx-vfnmadd_d.c | 196 +++ .../loongarch/vector/lsx/lsx-vfnmadd_s.c | 381 +++++ .../loongarch/vector/lsx/lsx-vfrint_d.c | 230 +++ .../loongarch/vector/lsx/lsx-vfrint_s.c | 350 ++++ .../loongarch/vector/lsx/lsx-vfrstp.c | 218 +++ .../loongarch/vector/lsx/lsx-vfrstpi.c | 209 +++ .../loongarch/vector/lsx/lsx-vfsqrt_d.c | 216 +++ .../loongarch/vector/lsx/lsx-vfsqrt_s.c | 372 +++++ .../loongarch/vector/lsx/lsx-vftint-1.c | 349 ++++ .../loongarch/vector/lsx/lsx-vftint-2.c | 695 ++++++++ .../loongarch/vector/lsx/lsx-vftint-3.c | 1028 ++++++++++++ .../loongarch/vector/lsx/lsx-vftint-4.c | 345 ++++ .../loongarch/vector/lsx/lsx-vhaddw-1.c | 488 ++++++ .../loongarch/vector/lsx/lsx-vhaddw-2.c | 452 +++++ .../loongarch/vector/lsx/lsx-vhsubw-1.c | 327 ++++ .../loongarch/vector/lsx/lsx-vhsubw-2.c | 353 ++++ .../loongarch/vector/lsx/lsx-vilvh.c | 353 ++++ .../loongarch/vector/lsx/lsx-vilvl.c | 327 ++++ .../loongarch/vector/lsx/lsx-vinsgr2vr.c | 278 ++++ .../gcc.target/loongarch/vector/lsx/lsx-vld.c | 62 + .../loongarch/vector/lsx/lsx-vldi.c | 61 + .../loongarch/vector/lsx/lsx-vmadd.c | 450 +++++ .../loongarch/vector/lsx/lsx-vmaddwev-1.c | 472 ++++++ .../loongarch/vector/lsx/lsx-vmaddwev-2.c | 383 +++++ .../loongarch/vector/lsx/lsx-vmaddwev-3.c | 383 +++++ .../loongarch/vector/lsx/lsx-vmaddwod-1.c | 372 +++++ .../loongarch/vector/lsx/lsx-vmaddwod-2.c | 438 +++++ .../loongarch/vector/lsx/lsx-vmaddwod-3.c | 460 ++++++ .../loongarch/vector/lsx/lsx-vmax-1.c | 317 ++++ .../loongarch/vector/lsx/lsx-vmax-2.c | 362 ++++ .../loongarch/vector/lsx/lsx-vmaxi-1.c | 279 ++++ .../loongarch/vector/lsx/lsx-vmaxi-2.c | 223 +++ .../loongarch/vector/lsx/lsx-vmin-1.c | 434 +++++ .../loongarch/vector/lsx/lsx-vmin-2.c | 344 ++++ .../loongarch/vector/lsx/lsx-vmini-1.c | 314 ++++ .../loongarch/vector/lsx/lsx-vmini-2.c | 216 +++ .../loongarch/vector/lsx/lsx-vmod-1.c | 254 +++ .../loongarch/vector/lsx/lsx-vmod-2.c | 254 +++ .../loongarch/vector/lsx/lsx-vmskgez.c | 119 ++ .../loongarch/vector/lsx/lsx-vmskltz.c | 321 ++++ .../loongarch/vector/lsx/lsx-vmsknz.c | 104 ++ .../loongarch/vector/lsx/lsx-vmsub.c | 461 ++++++ .../loongarch/vector/lsx/lsx-vmuh-1.c | 353 ++++ .../loongarch/vector/lsx/lsx-vmuh-2.c | 372 +++++ .../loongarch/vector/lsx/lsx-vmul.c | 282 ++++ .../loongarch/vector/lsx/lsx-vmulwev-1.c | 434 +++++ .../loongarch/vector/lsx/lsx-vmulwev-2.c | 344 ++++ .../loongarch/vector/lsx/lsx-vmulwev-3.c | 245 +++ .../loongarch/vector/lsx/lsx-vmulwod-1.c | 272 +++ .../loongarch/vector/lsx/lsx-vmulwod-2.c | 282 ++++ .../loongarch/vector/lsx/lsx-vmulwod-3.c | 308 ++++ .../loongarch/vector/lsx/lsx-vneg.c | 321 ++++ .../loongarch/vector/lsx/lsx-vnor.c | 109 ++ .../loongarch/vector/lsx/lsx-vnori.c | 91 + .../gcc.target/loongarch/vector/lsx/lsx-vor.c | 169 ++ .../loongarch/vector/lsx/lsx-vori.c | 123 ++ .../loongarch/vector/lsx/lsx-vorn.c | 109 ++ .../loongarch/vector/lsx/lsx-vpackev.c | 452 +++++ .../loongarch/vector/lsx/lsx-vpackod.c | 461 ++++++ .../loongarch/vector/lsx/lsx-vpcnt.c | 350 ++++ .../loongarch/vector/lsx/lsx-vpickev.c | 362 ++++ .../loongarch/vector/lsx/lsx-vpickod.c | 336 ++++ .../loongarch/vector/lsx/lsx-vpickve2gr.c | 488 ++++++ .../loongarch/vector/lsx/lsx-vpremi.c | 20 + .../loongarch/vector/lsx/lsx-vreplgr2vr.c | 212 +++ .../loongarch/vector/lsx/lsx-vreplve.c | 300 ++++ .../loongarch/vector/lsx/lsx-vreplvei.c | 293 ++++ .../loongarch/vector/lsx/lsx-vrotr.c | 381 +++++ .../loongarch/vector/lsx/lsx-vrotri.c | 294 ++++ .../loongarch/vector/lsx/lsx-vsadd-1.c | 335 ++++ .../loongarch/vector/lsx/lsx-vsadd-2.c | 345 ++++ .../loongarch/vector/lsx/lsx-vsat-1.c | 231 +++ .../loongarch/vector/lsx/lsx-vsat-2.c | 272 +++ .../loongarch/vector/lsx/lsx-vseq.c | 470 ++++++ .../loongarch/vector/lsx/lsx-vseqi.c | 328 ++++ .../loongarch/vector/lsx/lsx-vshuf.c | 394 +++++ .../loongarch/vector/lsx/lsx-vshuf4i.c | 348 ++++ .../loongarch/vector/lsx/lsx-vsigncov.c | 425 +++++ .../loongarch/vector/lsx/lsx-vsle-1.c | 290 ++++ .../loongarch/vector/lsx/lsx-vsle-2.c | 444 +++++ .../loongarch/vector/lsx/lsx-vslei-1.c | 258 +++ .../loongarch/vector/lsx/lsx-vslei-2.c | 293 ++++ .../loongarch/vector/lsx/lsx-vsll.c | 254 +++ .../loongarch/vector/lsx/lsx-vslli.c | 293 ++++ .../loongarch/vector/lsx/lsx-vsllwil-1.c | 244 +++ .../loongarch/vector/lsx/lsx-vsllwil-2.c | 189 +++ .../loongarch/vector/lsx/lsx-vslt-1.c | 434 +++++ .../loongarch/vector/lsx/lsx-vslt-2.c | 236 +++ .../loongarch/vector/lsx/lsx-vslti-1.c | 328 ++++ .../loongarch/vector/lsx/lsx-vslti-2.c | 293 ++++ .../loongarch/vector/lsx/lsx-vsra.c | 344 ++++ .../loongarch/vector/lsx/lsx-vsrai.c | 258 +++ .../loongarch/vector/lsx/lsx-vsran.c | 290 ++++ .../loongarch/vector/lsx/lsx-vsrani.c | 246 +++ .../loongarch/vector/lsx/lsx-vsrar.c | 354 ++++ .../loongarch/vector/lsx/lsx-vsrari.c | 265 +++ .../loongarch/vector/lsx/lsx-vsrarn.c | 236 +++ .../loongarch/vector/lsx/lsx-vsrarni.c | 398 +++++ .../loongarch/vector/lsx/lsx-vsrl.c | 389 +++++ .../loongarch/vector/lsx/lsx-vsrli.c | 328 ++++ .../loongarch/vector/lsx/lsx-vsrln.c | 335 ++++ .../loongarch/vector/lsx/lsx-vsrlni.c | 281 ++++ .../loongarch/vector/lsx/lsx-vsrlr.c | 434 +++++ .../loongarch/vector/lsx/lsx-vsrlri.c | 300 ++++ .../loongarch/vector/lsx/lsx-vsrlrn.c | 164 ++ .../loongarch/vector/lsx/lsx-vsrlrni.c | 686 ++++++++ .../loongarch/vector/lsx/lsx-vssran.c | 390 +++++ .../loongarch/vector/lsx/lsx-vssrani.c | 679 ++++++++ .../loongarch/vector/lsx/lsx-vssrarn.c | 669 ++++++++ .../loongarch/vector/lsx/lsx-vssrarni.c | 848 ++++++++++ .../loongarch/vector/lsx/lsx-vssrln.c | 543 ++++++ .../loongarch/vector/lsx/lsx-vssrlni.c | 668 ++++++++ .../loongarch/vector/lsx/lsx-vssrlrn.c | 470 ++++++ .../loongarch/vector/lsx/lsx-vssrlrni.c | 597 +++++++ .../loongarch/vector/lsx/lsx-vssub-1.c | 398 +++++ .../loongarch/vector/lsx/lsx-vssub-2.c | 408 +++++ .../gcc.target/loongarch/vector/lsx/lsx-vst.c | 70 + .../loongarch/vector/lsx/lsx-vsub.c | 381 +++++ .../loongarch/vector/lsx/lsx-vsubi.c | 329 ++++ .../loongarch/vector/lsx/lsx-vsubwev-1.c | 326 ++++ .../loongarch/vector/lsx/lsx-vsubwev-2.c | 417 +++++ .../loongarch/vector/lsx/lsx-vsubwod-1.c | 326 ++++ .../loongarch/vector/lsx/lsx-vsubwod-2.c | 308 ++++ .../loongarch/vector/lsx/lsx-vxor.c | 79 + .../loongarch/vector/lsx/lsx-vxori.c | 67 + .../loongarch/vector/simd_correctness_check.h | 54 + 197 files changed, 62937 insertions(+) create mode 100644 gcc/testsuite/gcc.target/loongarch/strict-align.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/loongarch-vector.exp create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-builtin.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vabsd-1.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vabsd-2.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vadd.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vadda.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vaddi.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vaddwev-1.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vaddwev-2.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vaddwev-3.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vaddwod-1.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vaddwod-2.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vaddwod-3.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vand.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vandi.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vandn.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vavg-1.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vavg-2.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vavgr-1.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vavgr-2.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vbitclr.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vbitclri.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vbitrev.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vbitrevi.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vbitsel.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vbitseli.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vbitset.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vbitseti.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vbsll.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vbsrl.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vclo.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vclz.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vdiv-1.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vdiv-2.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vexth-1.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vexth-2.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vextl-1.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vextl-2.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vextrins.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vfadd_d.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vfadd_s.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vfclass_d.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vfclass_s.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vfcmp_caf.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vfcmp_ceq.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vfcmp_cle.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vfcmp_clt.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vfcmp_cne.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vfcmp_cor.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vfcmp_cun.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vfcmp_saf.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vfcmp_seq.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vfcmp_sle.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vfcmp_slt.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vfcmp_sne.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vfcmp_sor.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vfcmp_sun.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vfcvt-1.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vfcvt-2.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vffint-1.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vffint-2.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vffint-3.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vflogb_d.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vflogb_s.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vfmadd_d.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vfmadd_s.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vfmax_d.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vfmax_s.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vfmaxa_d.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vfmaxa_s.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vfnmadd_d.c create mode 100644 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