tches@gcc.gnu.org>
CC: juzhe.zhong<mailto:juzhe.zh...@rivai.ai>;
yanzhang.wang<mailto:yanzhang.w...@intel.com>;
kito.cheng<mailto:kito.ch...@gmail.com>;
richard.guenther<mailto:richard.guent...@gmail.com>;
tamar.christina<mailto:tamar.christ...@arm.com>
Subject: Re: [
Maybe use riscv_v ?
juzhe.zh...@rivai.ai
From: Jeff Law
Date: 2023-12-22 03:16
To: pan2.li; gcc-patches
CC: juzhe.zhong; yanzhang.wang; kito.cheng; richard.guenther; tamar.christina
Subject: Re: [PATCH v1] RISC-V: XFail the signbit-5 run test for RVV
On 12/20/23 19:25, pan2...@intel.com
On 12/20/23 19:25, pan2...@intel.com wrote:
From: Pan Li
This patch would like to XFail the signbit-5 run test case for
the RVV. Given the case has one limitation like "This test does not
work when the truth type does not match vector type." in the beginning
of the test file. Aka, the RVV