Re: [PATCH v2] rs6000: Prefer assigning the MMA vector operands to altivec registers [PR105556]

2022-05-17 Thread Peter Bergner via Gcc-patches
On 5/17/22 6:41 PM, Segher Boessenkool wrote: > On Mon, May 16, 2022 at 05:31:31PM -0500, Peter Bergner wrote: >> (define_insn "mma_" >> - [(set (match_operand:XO 0 "fpr_reg_operand" "=") >> -(unspec:XO [(match_operand:V16QI 1 "vsx_register_operand" "wa") >> -

Re: [PATCH v2] rs6000: Prefer assigning the MMA vector operands to altivec registers [PR105556]

2022-05-17 Thread Segher Boessenkool
On Mon, May 16, 2022 at 05:31:31PM -0500, Peter Bergner wrote: > On 5/10/22 5:35 PM, Segher Boessenkool wrote: > > Out of interest, did you try using v,?wa (so just two alternatives, not > > four)? Or did you think it wouldresult in measurably worse code? Or > > did you decide it is not such

[PATCH v2] rs6000: Prefer assigning the MMA vector operands to altivec registers [PR105556]

2022-05-16 Thread Peter Bergner via Gcc-patches
On 5/10/22 5:35 PM, Segher Boessenkool wrote: > Out of interest, did you try using v,?wa (so just two alternatives, not > four)? Or did you think it wouldresult in measurably worse code? Or > did you decide it is not such bad backend code size explosion after > all :-) So I tried using just

Re: rs6000: Prefer assigning the MMA vector operands to altivec registers [PR105556]

2022-05-10 Thread Peter Bergner via Gcc-patches
On 5/10/22 5:46 PM, Peter Bergner wrote: >> Out of interest, did you try using v,?wa (so just two alternatives, not >> four)? Or did you think it wouldresult in measurably worse code? Or >> did you decide it is not such bad backend code size explosion after >> all :-) > > I have not tried

Re: rs6000: Prefer assigning the MMA vector operands to altivec registers [PR105556]

2022-05-10 Thread Peter Bergner via Gcc-patches
On 5/10/22 5:35 PM, Segher Boessenkool wrote: > If you want to use this same message as commit message, you shouldn't > say "this patch". Also, try not to use lines more than 72 positions > wide (which handily is also a good maximum length for email messages, > that way it can be quoted a few

Re: rs6000: Prefer assigning the MMA vector operands to altivec registers [PR105556]

2022-05-10 Thread Segher Boessenkool
Hi! On Tue, May 10, 2022 at 03:47:40PM -0500, Peter Bergner wrote: > This patch addresses an issue when compiling the MMA optimized DGEMM kernel If you want to use this same message as commit message, you shouldn't say "this patch". Also, try not to use lines more than 72 positions wide (which

rs6000: Prefer assigning the MMA vector operands to altivec registers [PR105556]

2022-05-10 Thread Peter Bergner via Gcc-patches
This patch addresses an issue when compiling the MMA optimized DGEMM kernel in OpenBLAS. The MMA code uses all 8 accumulators, which overlap all vs0-vs31 vector registers. Current trunk assigns one of the normal vector inputs to one of the MMA instructions, which forces us to spill one of the