Hi,
Please find attached the patch that fixes abitest for ilp32.
testfunc_ptr is a 32bit pointer in ILP32 but is being loaded as 64bit.
Hence some of the func-ret testcases FAIL's for ILP32.
Please review the patch and let us know if its okay?
Regression tested on aarch64-elf.
Thanks,
Naveen
Hi,
this workaround actually triggers bug in quite recent golds, so it seems
to be good motivation to finally drop it. The bug is long fixed.
Bootstrapped/regtested x86_64-linux, will commit it shortly.
Honza
* tree-profile.c (init_ic_make_global_vars): Drop workaround
for
Hi,
in December I conditoinally disabled expensive sanity checking in inliner.
This triggeres bootstrap miscompare because caches are getting out of sync.
This patch fixes the problem found by sanity check - the node growth cache
was removed from use in badness calculation by Richard a while ago,
2015-01-14 6:22 GMT+08:00 Joseph Myers jos...@codesourcery.com:
On Tue, 13 Jan 2015, Chung-Ju Wu wrote:
To fix this issue, we are going to use -mcmodel=X options, which probably
gives more flexibility to support varied code model on code generation.
The -mgp-direct option now becomes
This patch fixes the above PR where it was reported that the C++
frontend does not reject the malformed class declaration
struct X5;
Instead of rejecting it, the FE treats this declaration as if it were a
forward declaration of a template specialization, i.e. as if it were
written
Hi,
I would like to ping the patch to fix divergence between a type and its main
variant introduced by C++ FE.
https://gcc.gnu.org/ml/gcc-patches/2014-12/msg01202.html
Honza
On 01/13/15 15:42, Joseph Myers wrote:
On Tue, 13 Jan 2015, Jeff Law wrote:
In many ways having the compiler or assembler spitting out an error here is
preferable to silently compiling the code. That would also help explain why
As usual, an error is incorrect in such a case that only has
On 01/13/15 17:03, Segher Boessenkool wrote:
On Tue, Jan 13, 2015 at 03:17:08PM -0700, Jeff Law wrote:
And finally there is the case of non-volatile asm with memory clobber
with
no memory stores in between the two - the posted (safer) patch will not
allow to CSE the two, while in theory we
Hi, all,
The nds32 target supports two features, fp-as-gp and ex9, designed
for code size optimizations. They are majorly performed by linker
so that compiler is merely to give some hints or directives with
-mforce-fp-as-gp, -mforbid-fp-as-gp, and -mex9 options.
However, those two features are
Jakub Jelinek ja...@redhat.com writes:
Patch too large to attach uncompressed, this
has been created with update-copyright.py --this-year.
Note, I had to temporarily move away gcc/jit/docs/conf.py,
the python script dies on that and leaves almost all files unchanged.
Thanks for doing the
On Tue, Jan 13, 2015 at 10:51:27AM +0100, Richard Biener wrote:
IMHO SHIFT_COUNT_TRUNCATED should be removed and instead
backends should provide shift patterns with a (and:QI ...) for the
shift amount which simply will omit that operation if suitable.
Note that that catches less though, e.g.
Nowadays, just storing the (bigendian-corrected) vector element to the address,
generates exactly the same assembler for all cases except
{float,int,uint}64x1_t, where
st1 {v0.d}[0], [x0]
becomes
str d0, [x0]
This is not a problem, and the change will be much better for optimization
through
On Tue, Jan 13, 2015 at 05:06:35PM +, Richard Sandiford wrote:
Jakub Jelinek ja...@redhat.com writes:
Patch too large to attach uncompressed, this
has been created with update-copyright.py --this-year.
Note, I had to temporarily move away gcc/jit/docs/conf.py,
the python script dies
On 09/12/14 08:17, Yangfei (Felix) wrote:
On 28 November 2014 at 09:23, Yangfei (Felix) felix.y...@huawei.com wrote:
Hi,
This patch converts vpmaxX vpminX intrinsics to use builtin functions
instead of the previous inline assembly syntax.
Regtested with aarch64-linux-gnu on QEMU. Also
Mon, 12 Jan 2015 11:00:44 -0700
Jeff Law l...@redhat.com:
On 11/11/14 23:13, Martin Uecker wrote:
...
* gcc/tree-vrp.c (check_array_ref): Emit more warnings
for warn_array_bounds = 2.
* gcc/testsuite/gcc.dg/Warray-bounds-11.c: New test-case.
* gcc/c-family/c.opt: New option
Hi,
The call-saved-{4-6}.c tests in the mips testsuite fail for micromips. The
reason is
that micromips uses the swm and lwm instructions to save/restore the call-saved
registers
rather than using the sw and lw instructions. The swm and lwm instructions
only list
the range of registers to
Is it really sufficient here to verify that all the defs are on latch
predecessors,
what about the case where there is a predecessor without a def. How do
you guarantee domination in that case?
ISTM that given the structure for the code you're writing that you'd want to
verify that in
On Tue, 13 Jan 2015, Andrew Bennett wrote:
The call-saved-{4-6}.c tests in the mips testsuite fail for micromips. The
reason is
that micromips uses the swm and lwm instructions to save/restore the
call-saved registers
rather than using the sw and lw instructions. The swm and lwm
On 01/13/15 09:18, Jakub Jelinek wrote:
Hi!
My PR60663 fix unfortunately stopped CSE of all inline-asms, even when
they e.g. only have the clobbers added by default.
This patch attempts to restore the old behavior, with the exceptions:
1) as always, asm volatile is not CSEd
2) inline-asm with
On 01/13/15 17:40, Martin Uecker wrote:
Jeff Law l...@redhat.com:
On 01/13/15 10:34, Martin Uecker wrote:
Mon, 12 Jan 2015 11:00:44 -0700
Jeff Law l...@redhat.com:
On 11/11/14 23:13, Martin Uecker wrote:
...
Has this patch been bootstrapped and regression tested, if so on what
platform.
On 01/13/15 15:56, Andrew MacLeod wrote:
On 01/13/2015 02:06 PM, Andrew MacLeod wrote:
On 01/13/2015 01:38 PM, Torvald Riegel wrote:
On Tue, 2015-01-13 at 10:11 -0500, Andrew MacLeod wrote:
On 01/13/2015 09:59 AM, Richard Biener wrote:
On Tue, Jan 13, 2015 at 3:56 PM, Andrew MacLeod
On 01/10/15 06:05, Richard Sandiford wrote:
Sorry for the slow response. Jeff has approved the patch in the
meantime, but I didn't want to go ahead and apply it while there
was still disagreement...
Thanks. I didn't realize there was a disagreement when I approved.
Let's continue to hash this
On 09/12/14 08:17, Yangfei (Felix) wrote:
On 28 November 2014 at 09:23, Yangfei (Felix) felix.y...@huawei.com
wrote:
Hi,
This patch converts vpmaxX vpminX intrinsics to use builtin
functions
instead of the previous inline assembly syntax.
Regtested with aarch64-linux-gnu on
On 01/13/15 14:27, H.J. Lu wrote:
-fprofile -mfentry works with PIE if gcrt1.o is compiled with -fPIC. A
glibc has been filed, PR 17836, and a glibc patch has been submitted.
OK for trunk?
Thanks.
H.J.
--
* gcc.target/i386/fentry-override.c: Properly place {} in target
Maciej W. Rozycki ma...@linux-mips.org writes:
On Tue, 13 Jan 2015, Matthew Fortune wrote:
I have tested this for both mips and micromips, and the tests now
pass successfully.
The ChangeLog and patch are below.
Hmm, instead of trying to avoid testing microMIPS code generation
On 01/13/15 11:55, Eric Botcazou wrote:
(1) we have a non-paradoxical subreg;
(2) both (reg:ymode xregno) and (reg:xmode xregno) occupy full
hard registers (no padding or unused upper bits);
(3) (reg:ymode xregno) and (reg:xmode xregno) store the same number
of bytes (X) in each
Jeff Law l...@redhat.com:
On 01/13/15 17:40, Martin Uecker wrote:
Jeff Law l...@redhat.com:
On 01/13/15 10:34, Martin Uecker wrote:
Mon, 12 Jan 2015 11:00:44 -0700
Jeff Law l...@redhat.com:
On 11/11/14 23:13, Martin Uecker wrote:
...
Has this patch been bootstrapped and
On 01/13/2015 01:38 PM, Torvald Riegel wrote:
On Tue, 2015-01-13 at 10:11 -0500, Andrew MacLeod wrote:
On 01/13/2015 09:59 AM, Richard Biener wrote:
On Tue, Jan 13, 2015 at 3:56 PM, Andrew MacLeod amacl...@redhat.com wrote:
Lengthy discussion :
On Tue, Jan 13, 2015 at 12:45:27PM -0700, Jeff Law wrote:
On 01/13/15 09:38, Segher Boessenkool wrote:
On Tue, Jan 13, 2015 at 05:18:19PM +0100, Jakub Jelinek wrote:
3) on request from Richard (which Segher on IRC argues against), memory
clobber also prevents CSE;
As extend.texi used to
Hi,
On 06/09/2014 04:46 PM, Jason Merrill wrote:
On 06/09/2014 10:32 AM, Marc Glisse wrote:
On Mon, 9 Jun 2014, Jason Merrill wrote:
On 06/09/2014 10:18 AM, Marc Glisse wrote:
I doubt the patch can be wrong, but it may be that this is a situation
that is not supposed to happen and should be
On 01/13/15 11:38, Torvald Riegel wrote:
On Tue, 2015-01-13 at 10:11 -0500, Andrew MacLeod wrote:
On 01/13/2015 09:59 AM, Richard Biener wrote:
On Tue, Jan 13, 2015 at 3:56 PM, Andrew MacLeod amacl...@redhat.com wrote:
Lengthy discussion : https://gcc.gnu.org/bugzilla/show_bug.cgi?id=59448
On 01/13/15 09:28, Marek Polacek wrote:
We ICE on this testcase, because the usage of #pragma GCC ivdep
pulls in the ANNOTATE internal functions which don't have underlying
fndecls, hence we segv on a NULL_TREE. This patch makes get_attrs_for
be prepared for such a scenario. The callers of
On 01/13/15 05:52, H.J. Lu wrote:
On Mon, Jan 12, 2015 at 03:04:20PM -0700, Jeff Law wrote:
On 01/12/15 14:51, Magnus Granberg wrote:
måndag 12 januari 2015 12.11.17 skrev H.J. Lu:
On Mon, Jan 12, 2015 at 12:03 PM, Jeff Law l...@redhat.com wrote:
On 01/12/15 12:59, H.J. Lu wrote:
I don't
On 01/13/15 05:54, H.J. Lu wrote:
On Mon, Jan 12, 2015 at 03:04:20PM -0700, Jeff Law wrote:
On 01/12/15 14:51, Magnus Granberg wrote:
måndag 12 januari 2015 12.11.17 skrev H.J. Lu:
On Mon, Jan 12, 2015 at 12:03 PM, Jeff Law l...@redhat.com wrote:
On 01/12/15 12:59, H.J. Lu wrote:
I don't
Sorry for the slow response. Jeff has approved the patch in the
meantime, but I didn't want to go ahead and apply it while there
was still disagreement...
I still think that it isn't appropriate to short-circuit the main computation
as the patch does, but I don't want to block it after
Maciej W. Rozycki ma...@linux-mips.org writes:
On Tue, 13 Jan 2015, Andrew Bennett wrote:
The call-saved-{4-6}.c tests in the mips testsuite fail for micromips.
The reason is
that micromips uses the swm and lwm instructions to save/restore the
call-saved registers
rather than using the sw
Richard Sandiford rdsandif...@googlemail.com writes:
Maciej W. Rozycki ma...@linux-mips.org writes:
On Tue, 13 Jan 2015, Andrew Bennett wrote:
The call-saved-{4-6}.c tests in the mips testsuite fail for
micromips.
The reason is
that micromips uses the swm and lwm instructions to
On Tue, 2015-01-13 at 10:11 -0500, Andrew MacLeod wrote:
On 01/13/2015 09:59 AM, Richard Biener wrote:
On Tue, Jan 13, 2015 at 3:56 PM, Andrew MacLeod amacl...@redhat.com wrote:
Lengthy discussion : https://gcc.gnu.org/bugzilla/show_bug.cgi?id=59448
Basically we can generate incorrect
On 01/13/15 11:01, Zamyatin, Igor wrote:
Is it really sufficient here to verify that all the defs are on latch
predecessors,
what about the case where there is a predecessor without a def. How do
you guarantee domination in that case?
ISTM that given the structure for the code you're writing
On 01/13/15 10:34, Martin Uecker wrote:
Mon, 12 Jan 2015 11:00:44 -0700
Jeff Law l...@redhat.com:
On 11/11/14 23:13, Martin Uecker wrote:
...
* gcc/tree-vrp.c (check_array_ref): Emit more warnings
for warn_array_bounds = 2.
* gcc/testsuite/gcc.dg/Warray-bounds-11.c: New
On 01/13/15 09:11, Jakub Jelinek wrote:
On Mon, Jan 12, 2015 at 02:29:53PM -0700, Jeff Law wrote:
On 01/12/15 12:59, Jakub Jelinek wrote:
Hi!
As mentioned in the PR, giving up for all vector mode extensions
is unnecessary, but unlike scalar integer extensions, where the low part
of the
On 01/13/15 09:38, Segher Boessenkool wrote:
On Tue, Jan 13, 2015 at 05:18:19PM +0100, Jakub Jelinek wrote:
3) on request from Richard (which Segher on IRC argues against), memory
clobber also prevents CSE;
As extend.texi used to say:
If your assembler instructions access memory in an
Jeff Law l...@redhat.com:
On 01/13/15 10:34, Martin Uecker wrote:
Mon, 12 Jan 2015 11:00:44 -0700
Jeff Law l...@redhat.com:
On 11/11/14 23:13, Martin Uecker wrote:
...
Has this patch been bootstrapped and regression tested, if so on what
platform.
x86_64-unknown-linux-gnu
Eric Botcazou ebotca...@adacore.com writes:
Some ports are missing (lm32, moxie, nios2, nvptx, rl78, rx) so the relevant
maintainers are CCed (see 6.3.9 Anatomy of a Target Back End in the doc).
I think I got this right
| Characteristics
Target | HMSLQNFICBD
On 09/01/2015 19:22, Kyrill Tkachov wrote:
Hi Xingxing,
On 19/12/14 11:01, Xingxing Pan wrote:
+/* Return true if vector element size is byte. */
Minor nit: two spaces after full stop and before */ Same in other places
in the patch.
+bool
+marvell_whitney_vector_element_size_is_byte (rtx
On 12/01/15 20:15, Philipp Tomsich wrote:
---
gcc/ChangeLog-2014| 10 ++
gcc/config/arm/arm-cores.def | 1 +
gcc/config/arm/arm-tables.opt | 3 +++
gcc/config/arm/arm-tune.md| 3 ++-
gcc/config/arm/arm.c | 22 ++
On Sun, Jan 11, 2015 at 9:55 PM, Andreas Tobler andreast-l...@fgznet.ch wrote:
Hi,
I have here a possible way to make the enum_9.f90 and the enum_10.f90 work
under arm*-*-freebsd*. The solution for enum_9.f90 is straight forward. But
the one for enum_10.f90 requires a reordering of the
On 12/01/15 20:15, Philipp Tomsich wrote:
---
gcc/config/aarch64/aarch64.md | 2 +-
gcc/config/arm/types.md | 2 ++
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 1f6b1b6..98f4f30 100644
---
On Tue, Jan 13, 2015 at 6:13 AM, Marcus Shawcroft
marcus.shawcr...@gmail.com wrote:
On 11 January 2015 at 02:37, Andrew Pinski pins...@gmail.com wrote:
On Tue, Nov 11, 2014 at 6:47 AM, Marcus Shawcroft
marcus.shawcr...@gmail.com wrote:
On 30 October 2014 08:54, Gopalasubramanian, Ganesh
Great. I should have an update patch-set ready tested later tonight.
Best,
Phil.
On 13 Jan 2015, at 15:18, Andrew Pinski pins...@gmail.com wrote:
On Tue, Jan 13, 2015 at 6:13 AM, Marcus Shawcroft
marcus.shawcr...@gmail.com wrote:
On 11 January 2015 at 02:37, Andrew Pinski
On 13/01/15 13:46, Marcus Shawcroft wrote:
On 12 January 2015 at 20:15, Philipp Tomsich
philipp.toms...@theobroma-systems.com wrote:
---
gcc/config/aarch64/aarch64.md | 1 +
gcc/config/arm/xgene1.md | 531
++
2 files changed, 532
On 11 January 2015 at 02:37, Andrew Pinski pins...@gmail.com wrote:
On Tue, Nov 11, 2014 at 6:47 AM, Marcus Shawcroft
marcus.shawcr...@gmail.com wrote:
On 30 October 2014 08:54, Gopalasubramanian, Ganesh
ganesh.gopalasubraman...@amd.com wrote:
2014-10-30 Ganesh Gopalasubramanian
On Mon, Jan 12, 2015 at 03:04:20PM -0700, Jeff Law wrote:
On 01/12/15 14:51, Magnus Granberg wrote:
måndag 12 januari 2015 12.11.17 skrev H.J. Lu:
On Mon, Jan 12, 2015 at 12:03 PM, Jeff Law l...@redhat.com wrote:
On 01/12/15 12:59, H.J. Lu wrote:
I don't know if -pg will work PIE on any
Lengthy discussion : https://gcc.gnu.org/bugzilla/show_bug.cgi?id=59448
Basically we can generate incorrect code for an atomic consume operation
in some circumstances. The general feeling seems to be that we should
simply promote all consume operations to an acquire operation until
there is
The existing tests for these functions are compile-only so didn't
catch that I forgot to export these new symbols. I'll add a better
test next week.
Tested x86_64-linux, committed to trunk.
commit d428e75af04d995451a917ef7c9caed6b8cee737
Author: Jonathan Wakely jwak...@redhat.com
Date: Tue Jan
On Tue, Jan 13, 2015 at 3:56 PM, Andrew MacLeod amacl...@redhat.com wrote:
Lengthy discussion : https://gcc.gnu.org/bugzilla/show_bug.cgi?id=59448
Basically we can generate incorrect code for an atomic consume operation in
some circumstances. The general feeling seems to be that we should
On Thu, Jan 8, 2015 at 8:51 PM, Andreas Tobler andreast-l...@fgznet.ch wrote:
On 08.01.15 17:27, Richard Earnshaw wrote:
On 29/12/14 18:44, Andreas Tobler wrote:
All,
here is the third attempt to support ARM with FreeBSD.
In the meantime we found another issue in the unwinder where I had
Jeff Law l...@redhat.com writes:
For fun I've got an m68k bootstrap of the trunk running. I don't expect
it to finish for at least a week or so, assuming it runs to completion.
The last time I did that it took about 10 days (with all languages
enabled, running in Aranym on a moderately fast
On 13 January 2015 at 15:34, Richard Biener rguent...@suse.de wrote:
On Sun, 11 Jan 2015, Prathamesh Kulkarni wrote:
Hi,
This is a revamped expr.h flattening flattening patch rebased on
tree.h and tree-core.h flattening patch (r219402).
It depends upon the following patch to get committed.
Hi Paul,
thanks for the reviewed and the valued comments.
Just for completeness I have attached the patch with the changes requested.
Bootstraps and regtests ok on x86_64-linux-gnu.
Regards,
Andre
On Mon, 12 Jan 2015 22:07:29 +0100
Paul Richard Thomas paul.richard.tho...@gmail.com
On Mon, Jan 12, 2015 at 11:12 PM, Jeff Law l...@redhat.com wrote:
On 04/08/14 14:07, Mike Stump wrote:
Something broke in the compiler to cause combine to incorrectly optimize:
(insn 12 11 13 3 (set (reg:SI 604 [ D.6102 ])
(lshiftrt:SI (subreg/s/u:SI (reg/v:DI 601 [ x ]) 0)
On 19/11/14 02:43, Joey Ye wrote:
Current thumb2 -Os generates suboptimal code for following tail call case:
int f4(int b, int a, int c, int d);
int g(int a, int b, int c, int d)
{ return f4(b, a, c, d); }
arm-none-eabi-gcc -Os -mthumb -mcpu=cortex-m3 test.c
push
{r4, lr}
mov r4, r1
mov r1,
On Sun, 11 Jan 2015, Prathamesh Kulkarni wrote:
Hi,
This is a revamped expr.h flattening flattening patch rebased on
tree.h and tree-core.h flattening patch (r219402).
It depends upon the following patch to get committed.
https://gcc.gnu.org/ml/gcc-patches/2015-01/msg00565.html
Changes:
On 9 January 2015 at 16:31, Tejas Belagod tejas.bela...@arm.com wrote:
gcc/testsuite:
* gcc.target/aarch64/vect-movi.c: Check for vectorization for
64-bit and 128-bit.
OK /Marcus
Hi!
On Mon, 12 Jan 2015 17:39:16 +0100, Jakub Jelinek ja...@redhat.com wrote:
On Mon, Jan 12, 2015 at 05:32:14PM +0100, Thomas Schwinge wrote:
I have now committed the patch to gomp-4_0-branch in the following form.
The issues raised above remain to be resolved.
(I'll try to address those
On Mon, 12 Jan 2015, Thomas Preud'homme wrote:
Hi all,
To identify if a set of loads, shift, cast, mask (bitwise and) and bitwise OR
is equivalent to a load or byteswap, the bswap pass assign a number to each
byte loaded according to its significance (1 for lsb, 2 for next least
Several sub-based patterns allowed the stack pointer to be the destination
but not the first source. This looked like an oversight; in all the patterns
changed here (but not for example in *sub_mul_imm_mode), the instruction
allows the stack pointer to appear in both positions.
Tested on
On 7 January 2015 at 14:01, Renlin Li renlin...@arm.com wrote:
Is it Okay for branch 4.9?
gcc/ChangeLog:
2014-11-19 Renlin Li renlin...@arm.com
PR target/63424
* config/aarch64/aarch64-simd.md (sumaxminv2di3): New.
gcc/testsuite/ChangeLog:
2014-11-19 Renlin Li renlin...@arm.com
On Mon, Jan 12, 2015 at 03:04:20PM -0700, Jeff Law wrote:
On 01/12/15 14:51, Magnus Granberg wrote:
måndag 12 januari 2015 12.11.17 skrev H.J. Lu:
On Mon, Jan 12, 2015 at 12:03 PM, Jeff Law l...@redhat.com wrote:
On 01/12/15 12:59, H.J. Lu wrote:
I don't know if -pg will work PIE on any
Hi,
is this patch commited now? I don't have the rights to do so myself.
- Andre
On Sun, 28 Dec 2014 17:17:50 +0100
FX fxcoud...@gmail.com wrote:
2014-12-28 Andre Vehreschild ve...@gmx.de
* trans-decl.c (gfc_finish_var_decl): Fixed displaced comment.
* trans-stmt.c
On Tue, 13 Jan 2015, Jakub Jelinek wrote:
On Tue, Jan 13, 2015 at 02:04:26PM +0100, Richard Biener wrote:
The following removes -fvar-tracking-assignments from being eligible
to the optimization attribute/pragma which fixes LTO operation for
mixed inputs (LTO just drops debug stmts if the
On 13 January 2015 at 10:47, Richard Sandiford
richard.sandif...@arm.com wrote:
Several sub-based patterns allowed the stack pointer to be the destination
but not the first source. This looked like an oversight; in all the patterns
changed here (but not for example in *sub_mul_imm_mode), the
On 13 January 2015 at 04:48, Andrew Pinski pins...@gmail.com wrote:
ChangeLog:
* config/aarch64/aarch64.c (fusion_load_store): Check dest mode
instead of src mode.
* gcc.target/aarch64/store-pair-1.c: New testcase.
OK, thanks /Marcus
On Mon, Jan 12, 2015 at 11:50:41PM +, Joseph Myers wrote:
On Mon, 12 Jan 2015, H.J. Lu wrote:
+if test x$enable_default_pie = xyes; then
+ AC_MSG_CHECKING(if $target supports default PIE)
+ enable_default_pie=no
+ case $target in
+i?86*-*-linux* | x86_64*-*-linux*)
+
On Tue, Jan 13, 2015 at 04:54:32AM -0800, H.J. Lu wrote:
On Mon, Jan 12, 2015 at 03:04:20PM -0700, Jeff Law wrote:
On 01/12/15 14:51, Magnus Granberg wrote:
måndag 12 januari 2015 12.11.17 skrev H.J. Lu:
On Mon, Jan 12, 2015 at 12:03 PM, Jeff Law l...@redhat.com wrote:
On 01/12/15 12:59,
The following patch guards LTO against PARM_DECLs without DECL_CONTEXT.
Bootstrapped on x86_64-unknown-linux-gnu, testing in progress.
Richard.
2015-02-13 Richard Biener rguent...@suse.de
PR lto/64373
* lto-streamer-out.c (tree_is_indexable): Guard for NULL
On Tue, Jan 13, 2015 at 02:04:26PM +0100, Richard Biener wrote:
The following removes -fvar-tracking-assignments from being eligible
to the optimization attribute/pragma which fixes LTO operation for
mixed inputs (LTO just drops debug stmts if the flag is false).
In theory we could also fix
When a optimization pass in the loop pipeline moves stmts between
loops or removes loops we have to reset the SCEV cache to not
have stale CHREC_LOOPs. This patch does it for loop distribution
for which I have a testcase.
Bootstrapped on x86_64-unknown-linux-gnu, testing in progress.
Richard.
Hello,
The LRA register alloator is enabled by default for the ARM backend and
-mno-lra should no longer be used. This patch removes the -mlra/-mno-lra
option from the ARM backend.
arm-none-linux-gnueabihf passes gcc-check with no new failures.
Matthew
2015-01-13 Matthew Wahab
On 12 January 2015 at 20:15, Philipp Tomsich
philipp.toms...@theobroma-systems.com wrote:
---
gcc/config/aarch64/aarch64.md | 1 +
gcc/config/arm/xgene1.md | 531
++
2 files changed, 532 insertions(+)
create mode 100644
On Mon, Jan 12, 2015 at 12:19 PM, Jakub Jelinek ja...@redhat.com wrote:
Hi!
The 991213-3.c testcase ICEs on aarch64-linux with -mabi=ilp32
since wide-int merge. The problem is that
x = convert_memory_address (Pmode, x)
is used twice on a VOIDmode CONST_INT, which is wrong.
For non-VOIDmode
On 10 December 2014 at 02:18, Andrew Pinski pins...@gmail.com wrote:
Hi,
As mentioned in
https://gcc.gnu.org/ml/gcc-patches/2014-12/msg00609.html, the
load/store pair peepholes currently accept volatile mem which can
cause wrong code as the architecture does not define which part of the
On Mon, Jan 12, 2015 at 03:04:20PM -0700, Jeff Law wrote:
On 01/12/15 14:51, Magnus Granberg wrote:
måndag 12 januari 2015 12.11.17 skrev H.J. Lu:
On Mon, Jan 12, 2015 at 12:03 PM, Jeff Law l...@redhat.com wrote:
On 01/12/15 12:59, H.J. Lu wrote:
I don't know if -pg will work PIE on any
On 12 January 2015 at 20:15, Philipp Tomsich
philipp.toms...@theobroma-systems.com wrote:
+2014-11-19 Philipp Tomsich philipp.toms...@theobroma-systems.com
+
+ * config/aarch64/aarch64-cores.def (xgene1): Update/add the
+ xgene1 (APM XGene-1) core definition.
+ *
The following fixes a bug in outer loop reduction vectorization which
happens to use a bogus vectorized stmt for the inner loop exit PHI.
Bootstrap and regtest in progress on x86_64-unknown-linux-gnu.
Richard.
2015-01-13 Richard Biener rguent...@suse.de
PR tree-optimization/64493
On Tue, Jan 13, 2015 at 02:26:39PM +0100, Richard Biener wrote:
The following seems to work (for the testcase). Testing coverage
of this mode will of course be bad.
LGTM.
2015-01-13 Richard Biener rguent...@suse.de
PR lto/64415
* tree-inline.c (insert_debug_decl_map): Check
On Mon, 12 Jan 2015, Richard Biener wrote:
I am testing the following patch to fix a latent bug in the vectorizer
dealing with redundant DRs.
Bootstrap and regtest pending on x86_64-unknown-linux-gnu.
Which shows the patch is bogus. Instead we are not prepared to
handle this situation.
The following removes -fvar-tracking-assignments from being eligible
to the optimization attribute/pragma which fixes LTO operation for
mixed inputs (LTO just drops debug stmts if the flag is false).
In theory we could also fix inlining to do that when inlining
debug stmts into a non-VTA
On Mon, Jan 12, 2015 at 6:52 PM, Pat Haugen pthau...@linux.vnet.ibm.com wrote:
Following backport tested on 4.8/4.9 with no new regressions. Ok to commit
to those branches?
-Pat
2015-01-12 Pat Haugen pthau...@us.ibm.com
Backport from mainline
2014-12-20 Segher
On 01/13/2015 09:59 AM, Richard Biener wrote:
On Tue, Jan 13, 2015 at 3:56 PM, Andrew MacLeod amacl...@redhat.com wrote:
Lengthy discussion : https://gcc.gnu.org/bugzilla/show_bug.cgi?id=59448
Basically we can generate incorrect code for an atomic consume operation in
some circumstances. The
* gcc.target/aarch64/advsimd-intrinsics/vXXXhn.inc: New file.
* gcc.target/aarch64/advsimd-intrinsics/vraddhn.c: New file.
* gcc.target/aarch64/advsimd-intrinsics/vrsubhn.c: New file.
* gcc.target/aarch64/advsimd-intrinsics/vsubhn.c: New file.
*
* gcc.target/aarch64/advsimd-intrinsics/vmlXl_n.inc: New file.
* gcc.target/aarch64/advsimd-intrinsics/vmlal_n.c: New file.
* gcc.target/aarch64/advsimd-intrinsics/vmlsl_n.c: New file.
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmlXl_n.inc
* gcc.target/aarch64/advsimd-intrinsics/vmlX_lane.inc: New file.
* gcc.target/aarch64/advsimd-intrinsics/vmla_lane.c: New file.
* gcc.target/aarch64/advsimd-intrinsics/vmls_lane.c: New file.
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmlX_lane.inc
* gcc.target/aarch64/advsimd-intrinsics/vmlXl.inc: New file.
* gcc.target/aarch64/advsimd-intrinsics/vmlal.c: New file.
* gcc.target/aarch64/advsimd-intrinsics/vmlsl.c: New file.
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmlXl.inc
* gcc.target/aarch64/advsimd-intrinsics/vmul_lane.c: New file.
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmul_lane.c
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmul_lane.c
new file mode 100644
index 000..978cd9b
--- /dev/null
+++
* gcc.target/aarch64/advsimd-intrinsics/vmul_n.c: New file.
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmul_n.c
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmul_n.c
new file mode 100644
index 000..be0ee65
--- /dev/null
+++
* gcc.target/aarch64/advsimd-intrinsics/vmull.c: New file.
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmull.c
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmull.c
new file mode 100644
index 000..3fdd51e
--- /dev/null
+++
* gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h (CHECK):
Add trace.
(CHECK_FP): Likewise.
(CHECK_CUMULATIVE_SAT): Likewise.
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h
* gcc.target/aarch64/advsimd-intrinsics/vmull_lane.c: New file.
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmull_lane.c
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmull_lane.c
new file mode 100644
index 000..d3aa879
--- /dev/null
+++
* gcc.target/aarch64/advsimd-intrinsics/vqdmull_lane.c: New file.
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqdmull_lane.c
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqdmull_lane.c
new file mode 100644
index 000..12f2a6b
--- /dev/null
+++
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