Re: [PATCH, VECTOR ABI] Add __attribute__((__simd__)) to GCC.

On Tue, Nov 10, 2015 at 11:44:18AM +0300, Kirill Yukhin wrote: > gcc/ > * omp-low.c (pass_omp_simd_clone::gate): If target allows - call > without additional conditions. Please make sure CHangeLog entries are tab indented. I would just use a comma instead of " -" above. >

Re: [mask conversion, patch 2/2, i386] Add pack/unpack patterns for scalar masks

On 19 Oct 15:30, Ilya Enkovich wrote: > Hi, > > This patch adds patterns to be used for vector masks pack/unpack for AVX512. > Bootstrapped and tested on x86_64-unknown-linux-gnu. Does it look OK? > > Thanks, > Ilya Here is a modified version which reflects changes in boolean type sign.

Re: [1/2] OpenACC routine support

On Mon, Nov 09, 2015 at 09:28:47PM -0800, Cesar Philippidis wrote: > Here's the patch that Nathan was referring to. I ended up introducing a > boolean variable named first in the various functions which call > finalize_oacc_routines. The problem the original approach was having was > that the

Re: [RFC][PATCH] Preferred rename register in regrename pass

On 11/09/2015 02:32 PM, Robert Suchanek wrote: @@ -1707,6 +1749,8 @@ build_def_use (basic_block bb) scan_rtx (insn, (note, 0), ALL_REGS, mark_read, OP_INOUT); + terminated_this_insn = NULL; + /* Step 4: Close chains for registers that die

Re: [PATCH] PR/67682, break SLP groups up if only some elements match

On Mon, Nov 9, 2015 at 3:59 PM, Alan Lawrence wrote: > On 06/11/15 12:55, Richard Biener wrote: >> >>> + /* GROUP_GAP of the first group now has to skip over the second group >>> too. */ >>> + GROUP_GAP (first_vinfo) += group2_size; >> >> Please add a MSG_NOTE debug

Re: [PATCH] Make BB vectorizer work on sub-BBs

On 6 November 2015 at 12:11, Kyrill Tkachov wrote: > Hi Richard, > > > On 06/11/15 11:09, Richard Biener wrote: >> >> On Fri, 6 Nov 2015, Richard Biener wrote: >> >>> The following patch makes the BB vectorizer not only handle BB heads >>> (until the first stmt with a data

Re: [PATCH] Make BB vectorizer work on sub-BBs

On Tue, 10 Nov 2015, Christophe Lyon wrote: > On 6 November 2015 at 12:11, Kyrill Tkachov wrote: > > Hi Richard, > > > > > > On 06/11/15 11:09, Richard Biener wrote: > >> > >> On Fri, 6 Nov 2015, Richard Biener wrote: > >> > >>> The following patch makes the BB vectorizer

Re: [RFC] Combine vectorized loops with its scalar remainder.

2015-11-10 15:30 GMT+03:00 Richard Biener : > On Tue, Nov 3, 2015 at 1:08 PM, Yuri Rumyantsev wrote: >> Richard, >> >> It looks like misunderstanding - we assume that for GCCv6 the simple >> scheme of remainder will be used through introducing new

Re: [PATCH 10/12] always define EH_RETURN_HANDLER_RTX

On Tue, Nov 10, 2015 at 11:02:04PM +0100, Bernd Schmidt wrote: > On 11/09/2015 11:53 PM, Trevor Saunders wrote: > >I don't really know him, but I don't really disagree with where he wants > >to get to. However I think we work fairly different ways, and review > >things differently. When I review

Re: [mask-vec_cond, patch 2/2, i386] Add patterns for vcond_mask_optab

Hello Ilya On 08 Oct 18:53, Ilya Enkovich wrote: > Hi, > > This patch add patterns for vcond_mask_optab. No new expand code is > required, existing ix86_expand_sse_movcc is used. The patch is OK for trunk. -- Thanks, K > > Thanks, > Ilya > -- > gcc/ChangeLog: > > 2015-10-08 Ilya Enkovich

[PATCH 0/2] Fix invalid left shift of negative value.

The following series of patches fixes all occurences of left-shifting negative constants in C code which is undefined by the C standard. The patches have been tested on s390x, covering only a small subset of the changes. Ciao Dominik ^_^ ^_^ -- Dominik Vogt IBM Germany

Re: [PATCH 1/2] Fix invalid left shift of negative value.

On Tue, Nov 10, 2015 at 12:11:23PM +0100, Dominik Vogt wrote: > The following series of patches fixes all occurences of > left-shifting negative constants in C code which is undefined by > the C standard. The patches have been tested on s390x, covering > only a small subset of the changes.

Re: Add basic support for direct_optab internal functions

On Sat, Nov 7, 2015 at 1:26 PM, Richard Sandiford wrote: > This patch adds a concept of internal functions that map directly to an > optab (here called "direct internal functions"). The function can only > be used if the associated optab can be used. > > We currently

[patch] Tweak comments in libstdc++ header

Minor grammatical fix. Committed to trunk. commit 1d82192ff38f4d0777ed57e8c05f3d1659e98649 Author: Jonathan Wakely Date: Tue Nov 10 08:41:57 2015 + * include/bits/functional_hash.h: Fix grammar in comment. diff --git a/libstdc++-v3/include/bits/functional_hash.h

Re: Replace match.pd DEFINE_MATH_FNs with auto-generated lists

On Sat, Nov 7, 2015 at 2:23 PM, Richard Sandiford wrote: > This patch autogenerates the operator lists for maths functions > like SQRT, adding an additional entry for internal functions. > E.g.: > > (define_operator_list SQRT > BUILT_IN_SQRTF >

Re: Short-cut generation of simple built-in functions

On Sat, Nov 7, 2015 at 2:31 PM, Richard Sandiford wrote: > This patch short-circuits the builtins.c expansion code for a particular > gimple call if: > > - the function has an associated internal function > - the target implements that internal function > - the call has

[Patch ARM] Switch ARM to unified asm.

[Resending as I managed to muck this up with my mail client] Hi, I held off committing a previous version of this patch that I posted in July to be nice to folks backporting fixes and to watch for any objections to move the ARM backend completely over into the unified assembler. The patch

Re: Add internal math functions

Thanks for the review. Jeff Law writes: > On 11/07/2015 05:30 AM, Richard Sandiford wrote: >> This patch adds internal functions for simple FLT_FN built-in functions, >> in cases where an associated optab already exists. Unlike some of the >> built-in functions, these internal

Re: RFC: Incomplete Draft Patches to Correct Errors in Loop Unrolling Frequencies (bugzilla problem 68212)

On Mon, Nov 9, 2015 at 6:35 PM, Bernd Schmidt wrote: > On 11/07/2015 03:44 PM, Kelvin Nilsen wrote: >> >> This is a draft patch to partially address the concerns described in >> bugzilla problem report >> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68212). The patch is >>

Re: [PATCH 1/6] Use IFN_SQRT in tree-vect-patterns.c

Richard Biener writes: > On Mon, Nov 9, 2015 at 5:21 PM, Richard Sandiford > wrote: >> In practice all targets that can vectorise sqrt define the appropriate >> sqrt2 optab. The only case where this isn't immediately obvious >> is the

Re: [mask conversion, patch 2/2, i386] Add pack/unpack patterns for scalar masks

Hello Ilya, On 10 Nov 13:25, Ilya Enkovich wrote: > On 19 Oct 15:30, Ilya Enkovich wrote: > > Hi, > > > > This patch adds patterns to be used for vector masks pack/unpack for > > AVX512. Bootstrapped and tested on x86_64-unknown-linux-gnu. Does it > > look OK? The patch is OK for trunk. --

Re: [PATCH 2/2] Fix invalid left shift of negative value.

On Tue, Nov 10, 2015 at 12:11:23PM +0100, Dominik Vogt wrote: > The following series of patches fixes all occurences of > left-shifting negative constants in C code which is undefined by > the C standard. The patches have been tested on s390x, covering > only a small subset of the changes.

Re: [PATCH 0/2] Fix invalid left shift of negative value.

Sorry, wrong mailing list, please ignore. On Tue, Nov 10, 2015 at 12:11:23PM +0100, Dominik Vogt wrote: > The following series of patches fixes all occurences of > left-shifting negative constants in C code which is undefined by > the C standard. The patches have been tested on s390x, covering >

[PATCH] Improve C++ loop's backward-jump location

While fixing PR67192 it turned out that there are multiple potential issues with the location of the backward-jump statement generated by the C and C++ front-ends for an unconditional loop. First, due to a bug the C front-end had sometimes set the location to the token following the loop. This

Re: [mask-load, patch 2/2, i386] Add/modify mask load/store patterns

Hi Ilya, On 08 Oct 18:42, Ilya Enkovich wrote: > Hi, > > This patch reflects changes in maskload and maskstore optabs and adds > patterns for AVX-512. The patch is OK for trunk. -- Thanks, K > > Thanks, > Ilya > -- > 2015-10-08 Ilya Enkovich > > *

Re: [PATCH 1/2] simplify-rtx: Simplify trunc of and of shiftrt

On 11/09/2015 08:33 AM, Segher Boessenkool wrote: If we have (truncate:M1 (and:M2 (lshiftrt:M2 (x:M2) C) C2)) we can write it instead as (and:M1 (lshiftrt:M1 (truncate:M1 (x:M2)) C) C2) + /* Likewise (truncate:QI (and:SI (lshiftrt:SI (x:SI) C) C2)) into + (and:QI

Re: Add genmatch support for internal functions

On Sat, Nov 7, 2015 at 2:17 PM, Richard Sandiford wrote: > Richard Sandiford writes: >> This patch makes genmatch match calls based on combined_fn rather >> than built_in_function and extends the matching to internal functions. >> It also

Re: [RFC][PATCH] Preferred rename register in regrename pass

On 9 November 2015 at 18:01, Robert Suchanek wrote: > Hi, > >> On 11/09/2015 02:32 PM, Robert Suchanek wrote: >> > The results below were generated for CSiBE benchmark and the numbers in >> > columns express bytes in format 'net (gain/loss)' to show the difference >> >

RE: [RFC][PATCH] Preferred rename register in regrename pass

Hi Christophe, > Hi, > > Since you committed this (r230087 if I'm correct), I can see that GCC > fails to build > ligfortran for target arm-none-linuxgnueabi --with-cpu=cortex-a9. ... > > Can you have a look? Sorry for the breakage. I see that my assertion is being triggered. I'll investigate

[PATCH] Fix target arch attribute for skylake

Hi, This patch fixes the issue, when target(arch="haswell") function was chosen instead of target(arch="skylake") on skylake. Ok for trunk? gcc/ * config/i386/i386.c: Handle "skylake" and "skylake-avx512". gcc/testsuite/ * g++.dg/ext/mv16.C: New functions. Yulia patch_skylake

Re: [PATCH][ARM][cleanup] Remove uses of CONST_DOUBLE_HIGH/LOW

On Thu, Nov 5, 2015 at 9:32 AM, Kyrill Tkachov wrote: > Hi all, > > This cleanup patch removes handling of CONST_DOUBLE rtxes that carry large > integers. > These should never be passed down from the midend and the arm backend > doesn't create them. > The code has been

Re: [1/2] OpenACC routine support

On 11/10/2015 12:16 AM, Jakub Jelinek wrote: > On Mon, Nov 09, 2015 at 09:28:47PM -0800, Cesar Philippidis wrote: >> Here's the patch that Nathan was referring to. I ended up introducing a >> boolean variable named first in the various functions which call >> finalize_oacc_routines. The problem

[PATCH] PR47266

I’ld like to close PR47266 as FIXED after the commit on trunk and 5.2.1 of the following test extracted from https://gcc.gnu.org/ml/fortran/2011-01/msg00094.html. The test succeeds on trunk and 5.2.1 (see https://gcc.gnu.org/ml/gcc-testresults/2015-11/msg00965.html in which it was included).

Re: [PATCH 1/6] Use IFN_SQRT in tree-vect-patterns.c

On Tue, Nov 10, 2015 at 11:57 AM, Richard Sandiford wrote: > Richard Biener writes: >> On Mon, Nov 9, 2015 at 5:21 PM, Richard Sandiford >> wrote: >>> In practice all targets that can vectorise sqrt define the

Re: [Patch GCC 5/Vect] Partial backport of r228751 (pr68238)

On Tue, Nov 10, 2015 at 10:11:30AM +, James Greenhalgh wrote: > > Hi, > > As requested in the PR, this patch is a partial backport of r228751. > > I can't claim any responsibility for it, but I did take it through the > paces on an aarch64-none-linux-gnu and x86_64-none-linux-gnu bootstrap/

Re: [PATCH] Simple optimization for MASK_STORE.

On Tue, Nov 10, 2015 at 1:48 PM, Ilya Enkovich wrote: > 2015-11-10 15:33 GMT+03:00 Richard Biener : >> On Fri, Nov 6, 2015 at 2:28 PM, Yuri Rumyantsev wrote: >>> Richard, >>> >>> I tried it but 256-bit precision integer type

Re: [Patch,tree-optimization]: Add new path Splitting pass on tree ssa representation

On 09/12/2015 04:38 AM, Ajit Kumar Agarwal wrote: -Original Message- From: Jeff Law [mailto:l...@redhat.com] Sent: Thursday, September 10, 2015 3:10 AM To: Ajit Kumar Agarwal; Richard Biener Cc: GCC Patches; Vinod Kathail; Shail Aditya Gupta; Vidhumouli Hunsigida; Nagaraju Mekala

Re: [RFC] [PATCH V2]: RE: [RFC] [Patch] Relax tree-if-conv.c trap assumptions.

On Sat, Nov 7, 2015 at 12:41 PM, Kumar, Venkataramanan wrote: > Hi Richard, > > I have now implemented storing of DR and references using hash maps. > Please find attached patch. > > As discussed, I am now storing the ref, DR and baseref, DR pairs along with >

Re: [PATCH] Fix target arch attribute for skylake

On Tue, Nov 10, 2015 at 12:54 PM, Yulia Koval wrote: > Hi, > > This patch fixes the issue, when target(arch="haswell") function was > chosen instead of target(arch="skylake") on skylake. Ok for trunk? > > gcc/ > * config/i386/i386.c: Handle "skylake" and >

Re: Enable pointer TBAA for LTO

On Sun, 8 Nov 2015, Jan Hubicka wrote: > Hi, > this patch adds basic TBAA for pointers to LTO. The basic scheme is simple; > because TYPE_CANONICAL is not really needed by get_alias_set, we completely > drop the caluclation of these (which also saves about 50% canonical type hash > searches) and

Re: [RFC] Combine vectorized loops with its scalar remainder.

On Tue, Nov 3, 2015 at 1:08 PM, Yuri Rumyantsev wrote: > Richard, > > It looks like misunderstanding - we assume that for GCCv6 the simple > scheme of remainder will be used through introducing new IV : > https://gcc.gnu.org/ml/gcc-patches/2015-09/msg01435.html > > Is it true

Re: [PATCH] Simple optimization for MASK_STORE.

On Fri, Nov 6, 2015 at 2:28 PM, Yuri Rumyantsev wrote: > Richard, > > I tried it but 256-bit precision integer type is not yet supported. What's the symptom? The compare cannot be expanded? Just add a pattern then. After all we have modes up to XImode. Richard. > Yuri. >

Re: [PATCH] Simple optimization for MASK_STORE.

2015-11-10 15:33 GMT+03:00 Richard Biener : > On Fri, Nov 6, 2015 at 2:28 PM, Yuri Rumyantsev wrote: >> Richard, >> >> I tried it but 256-bit precision integer type is not yet supported. > > What's the symptom? The compare cannot be expanded? Just

Re: [PATCH] PR/67682, break SLP groups up if only some elements match

On Tue, Nov 10, 2015 at 1:45 PM, Richard Biener wrote: > On Mon, Nov 9, 2015 at 3:59 PM, Alan Lawrence wrote: >> On 06/11/15 12:55, Richard Biener wrote: >>> + /* GROUP_GAP of the first group now has to skip over the second group

Re: [PATCH 2/2][ARC] Add support for ARCv2 CPUs

On 30/10/15 11:22, Claudiu Zissulescu wrote: Hi, Please find the updated patch. Both ARC patches were tested using dg.exp. The ChangeLog entry is unchanged. This is OK.

[patch] Update C++17 library implementation status

Committed to trunk. commit 49c7ea7c21cb4592233904cc1a4eb293ac6d851c Author: Jonathan Wakely Date: Tue Nov 10 14:03:39 2015 + Update C++17 library implementation status * doc/xml/manual/status_cxx2017.xml: Update. * doc/html/*: Regenerate. diff --git

Re: OpenACC Firstprivate

On 11/09/15 09:46, Nathan Sidwell wrote: I'm going to try and get clarification, but I think the intent is to initialize with the value seen on the device. Consider: My thinking is that the intent of the firstprivate is to initialize with the value known on the device (and behave as-if

Re: [0/7] Type promotion pass and elimination of zext/sext

On Sun, Nov 8, 2015 at 10:43 AM, Kugan wrote: > > Thanks Richard for the comments. Please find the attached patches which > now passes bootstrap with x86_64-none-linux-gnu, aarch64-linux-gnu and > ppc64-linux-gnu. Regression testing is ongoing. Please find the

Re: [PATCH][ARM] Fix costing of vmul+vcvt combine pattern

On Tue, Oct 27, 2015 at 1:55 PM, Kyrill Tkachov wrote: > Hi all, > > This patch allows us to handle the *combine_vcvtf2i pattern in rtx costs by > properly identifying it > as a toint coversion. Before this I saw a pattern like: > (set (reg/i:SI 0 r0) > (fix:SI (fix:SF

Re: RFC: Incomplete Draft Patches to Correct Errors in Loop Unrolling Frequencies (bugzilla problem 68212)

Hi, On Tue, 10 Nov 2015, Richard Biener wrote: > >> +static bool > >> +same_edge_p (edge an_edge, edge another_edge) > >> +{ > >> + return ((an_edge->src == another_edge->src) > >> + && (an_edge->dest == another_edge->dest)); > >> +} > > > > > > Formatting aside (extra parentheses), I

[gomp4] Random omp-low.c backporting

I've committed this to backport a bunch of random bits from trunk to gomp4, and thereby reduce divergence. nathan 2015-11-10 Nathan Sidwell * omp-low.c: Backport whitespace & formatting changes from trunk. (is_atomic_compatible_p): Delete.

Re: [PATCH 10/12] always define EH_RETURN_HANDLER_RTX

On 11/09/2015 11:53 PM, Trevor Saunders wrote: I don't really know him, but I don't really disagree with where he wants to get to. However I think we work fairly different ways, and review things differently. When I review patches (mostly for stuff more directly related to Mozilla my standards

[patch] libsanitizer

Hi all, the attached patch removes the hard-coded requirement for the link operation with -ldl. On FreeBSD we do not need that, it breaks compilation. The patch is tested against CentOS7.1 Ok to apply for trunk? TIA, Andreas 2015-11-10 Andreas Tobler *

Re: Remove instantiations when no concept check

On 09/11/15 22:14 +0100, François Dumont wrote: Hi I just committed this trivial cleanup. 2015-11-09 François Dumont * include/bits/stl_algo.h (partial_sort_copy): Instantiate std::iterator_traits only if concept checks. (lower_bound): Likewise.

Re: [PATCH] Add configure flag for operator new (std::nothrow)

On 06/11/15 09:59 +, Pedro Alves wrote: On 11/06/2015 01:56 AM, Jonathan Wakely wrote: On 5 November 2015 at 23:31, Daniel Gutson The issue is, as I understand it, to do the actual work of operator new, i.e. allocate memory. It should force us to copy most of the code of the original

[PATCH] Fix IRA register preferencing

Ping of https://gcc.gnu.org/ml/gcc-patches/2014-12/msg00829.html: This fixes a bug in register preferencing. When live range splitting creates a new register from another, it copies most fields except for the register preferences. The preference GENERAL_REGS is used as reg_pref[i].prefclass is

remove inadvertent testcase commit

I've removed a testcase I inadvertently committed along with the routine testcases: 2015-11-09 Nathan Sidwell * testsuite/libgomp.oacc-c-c++-common/firstprivate-1.c: Remove inadvertent commit. nathan

Re: [PATCH 1/2][ARC] Add support for ARCv2 CPUs

On 30/10/15 11:19, Claudiu Zissulescu wrote: Hi, Please find the updated patch. I will defer the secondary reload optimization which will use the ld instructions with LIMM, for the time being. Apart from the gen_compare_reg change, the patch is OK. If the v2 support mostly works like

Re: RFC: Experimental use of Sphinx for GCC documentation

[resending, gcc-patches won't allow a screenshot attachment] On 11/10/2015 03:27 PM, David Malcolm wrote: Correct, readable and well-organized documentation are laudable goals... but I think that, to a first approximation, we're already there: I just feel that the content is hidden behind a

[PATCH] AIX asserts

This patch adds some asserts of cpu and machine to fix an assert testcase and makes the defines consistent with PPC64 Linux. boottrapped on powerpc-ibm-aix7.1.0.0 * config/rs6000/aix.h (TARGET_OS_AIX_CPP_BUILTINS): Add cpu and machine asserts. Update defines for 64 bit. Thanks, David Index:

Re: [PATCH] gcc.c: new macro POST_LINK_SPECS to be able to add additional steps after linking

On 11/10/2015 11:20 PM, Jeff Law wrote: On 11/10/2015 11:16 AM, Andris Pavenis wrote: One may need to execute extra steps after linking program. This is required for example for DJGPP to run stubify.exe on file generated by linker. The only way how to achieve was to use LINK_COMMAND_SPEC. It

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