[PATCH, i386]: Merge *extendsfdf2_mixed and *extendsfdf2_i387 insn patterns

2016-05-03 Uros Bizjak * config/i386/predicates.md (x87nonimm_ssenomem_operand): Rename from nonimm_ssenomem_operand. (nonimm_ssenomem_operand): New predicate. * config/i386/i386.md (extendsfdf2): Use nonimm_ssenomem_operand as operand 0 predicate.

Re: An abridged "Writing C" for the gcc web pages

Jeff Law writes: > On 05/02/2016 02:40 PM, Carlos O'Donell wrote: >> >> However, in the end, I think that yet-another-document is not the >> solution we want. What we actually need is a program that just formats >> your source according to the GNU Coding Style and that way you

Fix tree-inlinine ICE with uninitializer return value

Hi, the code path handling the case where callee is missing return statement but calle statement has LHS is broken in tree-inline since anonymous SSA_NAMEs was introduced. This code is not not used because all those inlines are disabled by gimple_check_call_matching_types, but since I would

[PATCH] Fix if-conversion (PR tree-optimization/70916)

Hi! As mentioned in the PR and on IRC, the initial problem on the testcase from this PR is that if-conv mistakenly assumes that some bb predicates are true predicates, when they really should not be. The problem is if we have a loop (perhaps finite) inside of some infinite loop, when computing

Re: [PATCH] Fix if-conversion (PR tree-optimization/70916)

On May 3, 2016 8:16:18 PM GMT+02:00, Jakub Jelinek wrote: >Hi! > >As mentioned in the PR and on IRC, the initial problem on the testcase >from this PR is that if-conv mistakenly assumes that some bb predicates >are true predicates, when they really should not be. >The problem is

Re: [C++ Patch] PR 70635 ([4.9/5/6 Regression] ICE on (and rejects) valid code...)

On 05/03/2016 01:15 PM, Paolo Carlini wrote: Hi, On 13/04/2016 17:27, Jason Merrill wrote: On 04/13/2016 11:05 AM, Paolo Carlini wrote: As it happens, anyway, the below exceedingly trivial patch avoids the ICE in resolve_typename_type and appears to pass testing (is already past

Cleanup call_stmt_cannot_inline_p wrt inline_failed

Hi, call_stmt_cannot_inline_p ultimately translated into setting inline_failed to CIF_MISMATCHED_ARGUMENTS. This is not always accurate because the flag is set for multiple reasons. THis patch makes it possible to simply set inline_failed to any of the CIF_FATAL_ERROR codes and inliner won't try

Re: [RFC] Update gmp/mpfr/mpc minimum versions

On 28.04.2016 09:09, Richard Biener wrote: > > As said elsewhere the main reason for all of this is to make the > in-tree builds work better for newer archs that are not happy with > the versions provided by download_prerequesites. This should come > with a documentation adjustment that the only

[PATCH] Don't emit AVX512DQ insns for -mavx512vl -mno-avx512dq (PR target/70927)

Hi! While working on a patch I'm going to post momentarily, I've noticed that we sometimes emit AVX512DQ specific instructions even when avx512dq is not enabled (in particular, EVEX andnps and andnpd are AVX512DQ plus if they have 128-bit or 256-bit arguments, also AVX512VL). I'm not 100% happy

[PATCH] Some further XMM16+ improvements

Hi! This patch improves code generation e.g. on the first attached testcase and allows accepting the second one. I've noticed we don't allow TFmode or V1TImode in xmm16+ regs at all, while they are allowed in xmm0-xmm15, so IMHO should be ok even with AVX512VL. Wonder if it wouldn't be better

Re: Canonicalize X u< X to UNORDERED_EXPR

This removes the duplication. I also removed the case (A)&(A) which is handled by reassoc. And I need 2 NOP checks, for the case where @0 is a constant (that couldn't happen before my patch because canonicalization would put the constant as second operand). Bootstrap+regtest on

[PATCH 2/3] cfgcleanup: Fold jumps and conditional branches with returns

This patch makes cfgcleanup optimize jumps to returns. There are three cases this handles: -- A jump to a return; this is simplified to just that return. -- A conditional branch to a return; simplified to a conditional return. -- A conditional branch that falls through to a return. This is

[PATCH 3/3] shrink-wrap: Remove complicated simple_return manipulations

Now that cfgcleanup knows how to optimize with return statements, the epilogue insertion code doesn't have to deal with it itself anymore. 2016-05-03 Segher Boessenkool * function.c (emit_use_return_register_into_block): Delete.

[PATCH 0/3] Simplify the simple_return handling

This series teaches cfgcleanup how to optimize jumps and branches to and around return statements, after which the shrink-wrap code doesn't have to deal with it anymore. The simplified code also catches a few more cases. Tested on powerpc64-linux (-m32 and -m64, all languages), and also on

[PATCH 1/3] cfgcleanup: Bugfix in try_simplify_condjump

If the jump_block here contains just a return, we will crash later in invert_jump. Don't allow that case. 2016-05-03 Segher Boessenkool * cfgcleanup.c (try_simplify_condjump): Don't try to simplify a branch to a return. --- gcc/cfgcleanup.c | 1

[SH][committed] Cleanup div and mul patterns

Hi, The attached patch cleans up the SH div and mul patterns a bit. Almost no changes in CSiBE, except for a few minor improvements. Tested on sh-elf with make -k check RUNTESTFLAGS="--target_board=sh-sim\{-m2/-ml,-m2/-mb, -m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a/-mb}" Committed as r235803.

Re: [patch] cleanup *finish_omp_clauses

This patch introduced /home/marek/src/gcc/gcc/c-family/c-common.h:1270:58: warning: comma at end of enumerator list [-Wpedantic] C_ORT_OMP_DECLARE_SIMD = C_ORT_OMP | C_ORT_DECLARE_SIMD, ^ I'm fixing that with 2016-05-03 Marek Polacek

Re: [PATCH] Re-use cc1-checksum.c for stage-final

On Mon, 2 May 2016, Jeff Law wrote: > On 04/29/2016 05:36 AM, Richard Biener wrote: > > On Thu, 28 Apr 2016, Jeff Law wrote: > > > > > On 04/28/2016 02:49 AM, Richard Biener wrote: > > > > > > > > The following prototype patch re-uses cc1-checksum.c from the > > > > previous stage when

Re: [PATCH 0/3] IVOPTS: support profiling

On Fri, Apr 29, 2016 at 12:56 PM, marxin wrote: > Hello. > > As profile-guided optimization can provide very useful information > about basic block frequencies within a loop, following patch set leverages > that information. It speeds up a single benchmark from upcoming SPECv6 >

Re: PR 70687: Use wide_int in combine.c:change_zero_ext

On 05/03/2016 11:11 AM, Richard Sandiford wrote: PR 70687 reports a case where combine.c mishandles integer modes wider than unsigned HOST_WIDE_INT. I don't have a testcase since the PR is just pointing out the hole. Also, I think a ZERO_EXTEND of a vector mode could in principle satisfy the

Re: [PATCH GCC]Proving no-trappness for array ref in tree if-conv using loop niter information.

On Mon, May 2, 2016 at 10:00 AM, Richard Biener wrote: > On Fri, Apr 29, 2016 at 5:05 PM, Bin.Cheng wrote: >> On Fri, Apr 29, 2016 at 12:16 PM, Richard Biener >> wrote: >>> On Thu, Apr 28, 2016 at 2:56 PM, Bin Cheng

Re: [PATCH GCC]Proving no-trappness for array ref in tree if-conv using loop niter information.

On Tue, May 3, 2016 at 12:01 PM, Bin.Cheng wrote: > On Mon, May 2, 2016 at 10:00 AM, Richard Biener > wrote: >> On Fri, Apr 29, 2016 at 5:05 PM, Bin.Cheng wrote: >>> On Fri, Apr 29, 2016 at 12:16 PM, Richard Biener >>>

Re: fix libsanitizer build on ppc-linux

> On 29 Apr 2016, at 12:42, Olivier Hainque wrote: > > I'll discuss with the compiler-rt folks. The change just went in upstream. http://reviews.llvm.org/D19799. Olivier

PR 70687: Use wide_int in combine.c:change_zero_ext

PR 70687 reports a case where combine.c mishandles integer modes wider than unsigned HOST_WIDE_INT. I don't have a testcase since the PR is just pointing out the hole. Also, I think a ZERO_EXTEND of a vector mode could in principle satisfy the subreg condition but wouldn't be equivalent to an

Re: Splitting up gcc/omp-low.c?

Hi! On Wed, 13 Apr 2016 18:01:09 +0200, I wrote: > On Fri, 08 Apr 2016 11:36:03 +0200, I wrote: > > On Thu, 10 Dec 2015 09:08:35 +0100, Jakub Jelinek wrote: > > > On Wed, Dec 09, 2015 at 06:23:22PM +0100, Bernd Schmidt wrote: > > > > On 12/09/2015 05:24 PM, Thomas Schwinge

Re: Inline across -ffast-math boundary

On 2 May 2016 at 19:01, Jan Hubicka wrote: >> On Thu, 21 Apr 2016, Jan Hubicka wrote: >> >> > Hi, >> > this patch implements the long promised logic to inline across -ffast-math >> > boundary when eitehr caller or callee has no fp operations in it. This is >> > needed to resolve

Re: Inline across -ffast-math boundary

On Tue, 3 May 2016, Christophe Lyon wrote: > On 2 May 2016 at 19:01, Jan Hubicka wrote: > >> On Thu, 21 Apr 2016, Jan Hubicka wrote: > >> > >> > Hi, > >> > this patch implements the long promised logic to inline across > >> > -ffast-math > >> > boundary when eitehr caller or

Re: [PATCH GCC]Do more tree if-conversions by handlding PHIs with more than two arguments.

On Mon, May 2, 2016 at 10:02 AM, Richard Biener wrote: > On Fri, Apr 29, 2016 at 5:51 PM, Bin.Cheng wrote: >> On Thu, Apr 28, 2016 at 10:18 AM, Richard Biener >> wrote: >>> On Wed, Apr 27, 2016 at 5:49 PM, Bin Cheng

Re: [PATCH] Improve detection of constant conditions during jump threading

On Mon, May 2, 2016 at 9:25 PM, H.J. Lu wrote: > On Sat, Apr 30, 2016 at 2:28 PM, Patrick Palka wrote: >> `On Fri, Apr 29, 2016 at 3:15 PM, Jeff Law wrote: >>> On 04/19/2016 11:50 AM, Patrick Palka wrote: >>> 1. This patch

Re: An abridged "Writing C" for the gcc web pages

On 05/03/2016 03:59 PM, Richard Sandiford wrote: > Jeff Law writes: >> On 05/02/2016 02:40 PM, Carlos O'Donell wrote: >>> >>> However, in the end, I think that yet-another-document is not the >>> solution we want. What we actually need is a program that just formats >>> your

Re: [PATCH 1/3] cfgcleanup: Bugfix in try_simplify_condjump

On Tue, May 03, 2016 at 10:28:37PM +0200, Steven Bosscher wrote: > On Tue, May 3, 2016 at 8:59 AM, Segher Boessenkool wrote: > > If the jump_block here contains just a return, we will crash later > > in invert_jump. Don't allow that case. > > But if jump_block contains a return, then it isn't

Re: Enabling -frename-registers?

On Fri, Apr 29, 2016 at 10:21 AM, Richard Biener wrote: > On April 29, 2016 3:48:37 PM GMT+02:00, David Edelsohn > wrote: >>On Fri, Apr 29, 2016 at 9:44 AM, Bernd Schmidt >>wrote: >>> >>> >>> On 04/29/2016 03:42 PM, David

Re: [PATCH 1/3] cfgcleanup: Bugfix in try_simplify_condjump

On Tue, May 3, 2016 at 8:59 AM, Segher Boessenkool wrote: > If the jump_block here contains just a return, we will crash later > in invert_jump. Don't allow that case. But if jump_block contains a return, then it isn't the EXIT_BLOCK for the function. Is the conditional jump a conditional return

Re: [PATCH] Optimize bit test and * atomics into lock; bt[src] (PR target/49244)

On Mon, May 02, 2016 at 11:01:02PM +0200, Uros Bizjak wrote: > Please don't use operands[N] without corresponding (match_dup N) in > the RTL pattern. Tthe "operands" array is only as long as the last > operand number from the pattern. Just grep the pattern name from > generated insn-emit.c and you

[PATCH] Allow xmm16-xmm31 in sse2_movq128

Hi! Another insn where we can just unconditionally use v constraint instead of x - for V2DImode HARD_REGNO_MODE_OK will only allow it for AVX512VL for the ext regs, the insn is actually already available in AVX512F, but probably not worth spending too much time on this to allow it even for

[PATCH][ARM] Add mode to probe_stack set operands

Hi all, When building the arm backend genrecog complains that the probe_stack set expression doesn't specify any modes. This patch adds the SI mode annotation and fixes the warning Bootstrapped and tested on arm-none-linux-gnueabihf. Ok for trunk? Thanks, Kyrill 2016-05-03 Kyrylo Tkachov

[RS6000] Fix ICE caused by rs6000_savres_strategy thinko

rev 235672 (git cffc0b35) changed the condition for SAVE_MULTIPLE/ STORE_MULTIPLE, wrongly allowing a single reg. Bootstrapped and regression tested powerpc64-linux. OK to apply? Incidentally, the added testcase function shows a regression in -m32 -Os code quality that I'll fix sometime soon.

[PATCH] Improve folding of COND_EXPRs in tree-if-conv.c (PR tree-optimization/70916)

Hi! This allows us to better fold the COND_EXPR, so that _1 = 1 ? : _2; is folded to _1 = There is another bug, the 1 in this case is wrong, but it could appear on some other code too. Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk? 2016-05-03 Jakub Jelinek

Re: Inline across -ffast-math boundary

On 3 May 2016 at 10:09, Richard Biener wrote: > On Tue, 3 May 2016, Christophe Lyon wrote: > >> On 2 May 2016 at 19:01, Jan Hubicka wrote: >> >> On Thu, 21 Apr 2016, Jan Hubicka wrote: >> >> >> >> > Hi, >> >> > this patch implements the long promised logic to

Re: [RS6000] Fix ICE caused by rs6000_savres_strategy thinko

On Tue, May 03, 2016 at 09:02:26PM +0930, Alan Modra wrote: > rev 235672 (git cffc0b35) changed the condition for SAVE_MULTIPLE/ > STORE_MULTIPLE, wrongly allowing a single reg. Bootstrapped and > regression tested powerpc64-linux. OK to apply? Yes, this is okay for trunk, thanks for fixing it.

Re: Allow redefinition of libcilkrts debug macros

Hi Ilya, > On Fri, Apr 29, 2016 at 10:58:25 +0200, Rainer Orth wrote: >> > On 04/26/2016 08:04 AM, Rainer Orth wrote: >> >> When working on a couple of Cilk Plus issues lately (PRs target/60290, >> >> target/68945), I noticed that you have to modify the libcilkplus sources >> >> to enable various

Re: [patch, libstdc++] std::shuffle: Generate two swap positions at a time if possible

ENOPATCH On 1 May 2016 at 15:21, Eelis wrote: > Sorry, forgot to include the libstdc++ list. > > On 2016-05-01 16:18, Eelis wrote: >> >> Hi, >> >> The attached patch optimizes std::shuffle for the very common case >> where the generator range is large enough that a single

[PATCH] pr70890, r235660 miscompiles stage2

My r235660 ira.c change results in some single def/single ref cases moving the def insn to just before the ref insn, that were not previously moved. Unfortunately doing so resulted in a reload problem. The following shows a series of ia64 insns after ira, with insn 2078 (wasn't previously moved)

Re: [PATCH] pr70890, r235660 miscompiles stage2

On 05/03/2016 12:45 PM, Alan Modra wrote: PR rtl-optimization/70890 * ira.c (combine_and_move_insns): When moving def_insn, remove equivs on use_insn. I'm not sure yet, but it looks to me like this tweaks the wrong place. diff --git a/gcc/ira.c b/gcc/ira.c index

Re: Inline across -ffast-math boundary

On Tue, 3 May 2016, Christophe Lyon wrote: > On 3 May 2016 at 10:09, Richard Biener wrote: > > On Tue, 3 May 2016, Christophe Lyon wrote: > > > >> On 2 May 2016 at 19:01, Jan Hubicka wrote: > >> >> On Thu, 21 Apr 2016, Jan Hubicka wrote: > >> >> > >> >> > Hi,

Contents of PO file 'cpplib-6.1.0.nl.po'

cpplib-6.1.0.nl.po.gz Description: Binary data The Translation Project robot, in the name of your translation coordinator.

Re: [PATCHv2 0/7] ARC: Add support for nps400 variant

* Claudiu Zissulescu [2016-05-02 09:02:16 +]: > Please also consider to address also the following warnings introduced: > > mainline/gcc/gcc/config/arc/arc.md:888: warning: source missing a mode? > mainline/gcc/gcc/config/arc/arc.md:906: warning: source

Re: [PATCH] Optimize bit test and * atomics into lock; bt[src] (PR target/49244)

On Tue, May 3, 2016 at 1:04 PM, Richard Biener wrote: > On Tue, 3 May 2016, Jakub Jelinek wrote: > >> On Mon, May 02, 2016 at 11:01:02PM +0200, Uros Bizjak wrote: >> > Please don't use operands[N] without corresponding (match_dup N) in >> > the RTL pattern. Tthe "operands"

[PATCH] Avoid ICE in tree-vect-patterns.c (PR tree-optimization/70916)

Hi! We ICE on the following testcase. There are multiple issues, this patch fixes just the ICE part; INTEGER_CST rhs1 is completely valid on COND_EXPR, though of course a sign of missed optimization earlier; so we don't need to spend too much time on it, but shouldn't ICE.

Re: Two small optimizations to vrp pass

On Tue, May 3, 2016 at 4:07 AM, Patrick Palka wrote: > This patch > > 1. changes the need_assert_for bitmap into an sbitmap since its size is > known to be at most num_ssa_names But then it is redundant anyway as we have asserts_for[num_ssa_names], initialized to NULL. So

Re: [PATCH] Avoid ICE in tree-vect-patterns.c (PR tree-optimization/70916)

On Tue, 3 May 2016, Jakub Jelinek wrote: > Hi! > > We ICE on the following testcase. There are multiple issues, this patch > fixes just the ICE part; INTEGER_CST rhs1 is completely valid on COND_EXPR, > though of course a sign of missed optimization earlier; so we don't need > to spend too much

Re: [PATCH] Improve folding of COND_EXPRs in tree-if-conv.c (PR tree-optimization/70916)

On Tue, 3 May 2016, Jakub Jelinek wrote: > Hi! > > This allows us to better fold the COND_EXPR, so that _1 = 1 ? : _2; > is folded to _1 = There is another bug, the 1 in this case is wrong, > but it could appear on some other code too. > > Bootstrapped/regtested on x86_64-linux and

Re: [PATCH] Allow xmm16-xmm31 in *trunc* insns

On Tue, May 3, 2016 at 1:25 PM, Jakub Jelinek wrote: > Hi! > > As the testcase shows, in some truncations we weren't unnecessarily allowing > xmm16-xmm31 regs. But VCVTSD2SS is already in AVX512F ISA, and the rest are > just splitters that use movs that are also in AVX512F. > >

Re: Allow redefinition of libcilkrts debug macros

Hi Balaji, > I suspected that much. It would be good to have a libcilkrts/README.gcc > describing the rules which changes can go into the gcc tree directly, which > need to go upstream first, and how. libo and libsanitizer already have > this. > > Hi Rainer, > It is mentioned under the

Re: [PATCH 0/3] Simplify the simple_return handling

On 05/03/2016 08:59 AM, Segher Boessenkool wrote: This series teaches cfgcleanup how to optimize jumps and branches to and around return statements, after which the shrink-wrap code doesn't have to deal with it anymore. The simplified code also catches a few more cases. Tested on

Re: [Openacc] Adjust automatic loop partitioning

Hi Nathan! On Fri, 29 Apr 2016 10:00:43 -0400, Nathan Sidwell wrote: > currently automatic loop partitioning assigns from the innermost loop > outwards > -- that was the simplest thing to implement. A better algorithm is to assign > the outermost loop to the outermost

Re: [PATCH] Optimize bit test and * atomics into lock; bt[src] (PR target/49244)

On Tue, 3 May 2016, Jakub Jelinek wrote: > On Mon, May 02, 2016 at 11:01:02PM +0200, Uros Bizjak wrote: > > Please don't use operands[N] without corresponding (match_dup N) in > > the RTL pattern. Tthe "operands" array is only as long as the last > > operand number from the pattern. Just grep the

Re: [PATCH][RFC] Gimplify "into SSA"

On Tue, 3 May 2016, Richard Biener wrote: > On Wed, 27 Apr 2016, Jeff Law wrote: > > > On 04/21/2016 06:55 AM, Richard Biener wrote: > > > > > > The following patch makes us not allocate decls but SSA names for > > > temporaries required during gimplification. This is basically the > > > same

New Dutch PO file for 'cpplib' (version 6.1.0)

Hello, gentle maintainer. This is a message from the Translation Project robot. A revised PO file for textual domain 'cpplib' has been submitted by the Dutch team of translators. The file is available at: http://translationproject.org/latest/cpplib/nl.po (This file, 'cpplib-6.1.0.nl.po',

Re: [PATCH] Re-use cc1-checksum.c for stage-final

On Tue, 3 May 2016, Richard Biener wrote: > On Mon, 2 May 2016, Jeff Law wrote: > > > On 04/29/2016 05:36 AM, Richard Biener wrote: > > > On Thu, 28 Apr 2016, Jeff Law wrote: > > > > > > > On 04/28/2016 02:49 AM, Richard Biener wrote: > > > > > > > > > > The following prototype patch re-uses

Re: [PATCH] Better location info for "incomplete type" error msg (PR c/70756)

On Mon, May 02, 2016 at 01:34:30PM -0400, Jason Merrill wrote: > On 05/02/2016 12:41 PM, Marek Polacek wrote: > > On Fri, Apr 29, 2016 at 04:04:13PM -0400, Jason Merrill wrote: > > > On 04/28/2016 11:59 AM, Marek Polacek wrote: > > > > 3) for the C++ FE I used a macro so that I don't have to

Re: [PATCH] Improve add/sub TImode double word splitters (PR rtl-optimization/70467)

On Fri, Apr 01, 2016 at 08:29:17PM +0200, Uros Bizjak wrote: > > Bootstrapped/regtested on x86_64-linux and i686-linux, ok for stage1 > > (while the previous patch looks simple enough that I'd like to see it in > > 6.x, this one IMHO can wait). > > Yes, please. This is not a regression. > > >

Re: Canonicalize X u< X to UNORDERED_EXPR

On Tue, May 3, 2016 at 8:36 AM, Marc Glisse wrote: > This removes the duplication. I also removed the case (A)&(A) which is > handled by reassoc. And I need 2 NOP checks, for the case where @0 is a > constant (that couldn't happen before my patch because canonicalization >

[PATCH] Allow xmm16-xmm31 in *trunc* insns

Hi! As the testcase shows, in some truncations we weren't unnecessarily allowing xmm16-xmm31 regs. But VCVTSD2SS is already in AVX512F ISA, and the rest are just splitters that use movs that are also in AVX512F. Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk? 2016-05-03

Re: [RS6000] Fix ICE caused by rs6000_savres_strategy thinko

On Tue, May 03, 2016 at 07:03:45AM -0500, Segher Boessenkool wrote: > On Tue, May 03, 2016 at 09:02:26PM +0930, Alan Modra wrote: > > Incidentally, the added testcase function shows a regression in -m32 > > -Os code quality that I'll fix sometime soon. > > Could you tell more please? This

Re: [PATCH] pr70890, r235660 miscompiles stage2

On 05/03/2016 02:20 PM, Alan Modra wrote: diff --git a/gcc/ira.c b/gcc/ira.c index a38e67e..cf5be35 100644 --- a/gcc/ira.c +++ b/gcc/ira.c @@ -3742,6 +3742,16 @@ combine_and_move_insns (void) if (use_insn == BB_HEAD (use_bb)) BB_HEAD (use_bb) = new_insn; + /*

Re: [PATCH 12/18] haifa-sched.c: make insn_queue[] a vec

On 04/25/2016 04:17 PM, Trevor Saunders wrote: On Mon, Apr 25, 2016 at 03:55:15PM +0200, Bernd Schmidt wrote: On 04/20/2016 08:22 AM, tbsaunde+...@tbsaunde.org wrote: -/* Remove INSN from queue. */ +/* Remove INSN at idx from queue. */ +static void +queue_remove (unsigned int q, unsigned int

Re: [PATCH 12/18] haifa-sched.c: make insn_queue[] a vec

On Tue, May 03, 2016 at 02:36:55PM +0200, Bernd Schmidt wrote: > On 04/25/2016 04:17 PM, Trevor Saunders wrote: > > On Mon, Apr 25, 2016 at 03:55:15PM +0200, Bernd Schmidt wrote: > > > On 04/20/2016 08:22 AM, tbsaunde+...@tbsaunde.org wrote: > > > > -/* Remove INSN from queue. */ > > > > +/*

[RS6000] Fragile testcase breaks with -frename-registers

See comments added below. Bootstrapped and regression tested powerpc64le-linux. OK to apply? PR testsuite/70826 * gcc.target/powerpc/savres.c: Compile with -fno-rename-registers. diff --git a/gcc/testsuite/gcc.target/powerpc/savres.c b/gcc/testsuite/gcc.target/powerpc/savres.c

Re: Inline across -ffast-math boundary

On 05/03/2016 10:20 AM, Richard Biener wrote: On Tue, 3 May 2016, Jan Hubicka wrote: On 21/04/16 12:45, Jan Hubicka wrote: this patch implements the long promised logic to inline across -ffast-math boundary when eitehr caller or callee has no fp operations in it. This is needed to resolve

Fix for PR70926 in Libiberty Demangler (5)

Hi, This fixes four access violations (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70926). Two of these first read the value of a length variable len from the mangled string, then strncpy len characters from the mangled string; more than necessary. The other two read the value of an array

Re: [PATCH] pr70890, r235660 miscompiles stage2

On Tue, May 03, 2016 at 03:51:11PM +0200, Bernd Schmidt wrote: > If that is all ok and we just have a really odd cfg, then your patch is ok > with a better comment as to which situations can cause the problem. Thanks, committed rev 235825. diff --git a/gcc/ira.c b/gcc/ira.c index

Re: Allow embedded timestamps by C/C++ macros to be set externally (3)

On 16-04-18 15:04:58, Markus Trippelsdorf wrote: > A nice follow-up patch would be to set SOURCE_DATE_EPOCH to the current > time during -fcompare-debug. This would avoid false positives like: > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70679 I've been working on a patch to implement that, but

Re: [RS6000] powerpc64le -ffixed-cr2 -ffixed-cr3 -ffixed-cr4 ICE

On Wed, May 04, 2016 at 12:22:24AM +0930, Alan Modra wrote: > Fixes an ICE found when using odd options. Bootstrapped and > regression tested both powerpc64-linux and powerpc64le-linux. OK to > apply? > > gcc/ > PR target/70866 > * config/rs6000/rs6000.c (rs6000_stack_info): Don't

Re: [PATCH 0/3] Simplify the simple_return handling

Hi Segher, On 03/05/16 07:59, Segher Boessenkool wrote: This series teaches cfgcleanup how to optimize jumps and branches to and around return statements, after which the shrink-wrap code doesn't have to deal with it anymore. The simplified code also catches a few more cases. Tested on

Re: [PATCH][RFC] Gimplify "into SSA"

On Wed, 27 Apr 2016, Jeff Law wrote: > On 04/21/2016 06:55 AM, Richard Biener wrote: > > > > The following patch makes us not allocate decls but SSA names for > > temporaries required during gimplification. This is basically the > > same thing as we do when calling the gimplifier on GENERIC

Re: [PATCH][GCC7] Remove scaling of COMPONENT_REF/ARRAY_REF ops 2/3

> It seems to me that the issue in the end is that where we compute > alignment from is the pieces gathered by get_inner_reference > instead of computing it alongside of that information in > get_inner_reference, taking advantage of DECL_OFFSET_ALIGN > and the array element type alignment there.

Re: [patch, libstdc++] std::shuffle: Generate two swap positions at a time if possible

Ah, thanks, I forgot to re-attach when I sent to include the libstdc++ list. On 2016-05-03 14:38, Jonathan Wakely wrote: ENOPATCH On 1 May 2016 at 15:21, Eelis wrote: Sorry, forgot to include the libstdc++ list. On 2016-05-01 16:18, Eelis wrote: Hi, The attached patch

[RS6000] powerpc64le -ffixed-cr2 -ffixed-cr3 -ffixed-cr4 ICE

Fixes an ICE found when using odd options. Bootstrapped and regression tested both powerpc64-linux and powerpc64le-linux. OK to apply? gcc/ PR target/70866 * config/rs6000/rs6000.c (rs6000_stack_info): Don't set cr_save_p when cr2,3,4 are all fixed regs. gcc/testsuite/

Re: Allow embedded timestamps by C/C++ macros to be set externally (3)

On 2016.05.03 at 16:42 +0200, Dhole wrote: > On 16-04-18 15:04:58, Markus Trippelsdorf wrote: > > A nice follow-up patch would be to set SOURCE_DATE_EPOCH to the current > > time during -fcompare-debug. This would avoid false positives like: > > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70679 >

[PATCH] Remove TARGET_INVALID_PARAMETER_TYPE and TARGET_INVALID_RETURN_TYPE hooks.

Hello, The target hooks TARGET_INVALID_PARAMETER_TYPE and TARGET_INVALID_RETURN_TYPE were only used by the ARM backend and are no longer used. This patch removes them. Tested for arm-none-linux-gnueabihf with native bootstrap and make check and for and x86_64-none-linux native bootstrap and

Re: S/390: Add patterns for rsbg instructions.

On 04/27/2016 09:55 AM, Dominik Vogt wrote: gcc/ChangeLog * config/s390/s390.md ("*rsbg__sll") ("*rsbg__srl"): New define_insns. ("*rsbg__srl_bitmask"): Renamed by adding "_bitmask". ("*rsbg__sll_bitmask"): Likewise. gcc/testsuite/ChangeLog *

Re: Canonicalize X u< X to UNORDERED_EXPR

On Tue, May 3, 2016 at 3:26 PM, Marc Glisse wrote: > On Tue, 3 May 2016, Richard Biener wrote: > >> On Tue, May 3, 2016 at 8:36 AM, Marc Glisse wrote: >>> >>> This removes the duplication. I also removed the case (A)&(A) which >>> is >>> handled by

Re: Inline across -ffast-math boundary

> On 21/04/16 12:45, Jan Hubicka wrote: > > this patch implements the long promised logic to inline across -ffast-math > > boundary when eitehr caller or callee has no fp operations in it. This is > > needed to resolve code quality regression on Firefox with LTO where > > -O3/-O2/-Ofast flags are

[PATCH] Fix a typo in dwarf2out.c:resolve_args_picking_1

Hello, Under specific circumstances for Ada programs, such as in the testcase this change adds, the DWARF back-end currently crashes because of inconsistent internal state. This is due to a typo: a local variable is called frame_offset_ but resolve_args_picking_1 wrongly modifies emit-rtl.h's

[PATCH], Add PowerPC ISA 3.0 vector d-form addressing

This patch implements the new instructions added in ISA 3.0 (power9) to allow d-form (register + offset) memory loads and stores to/from vector registers. I split the previous -mpower9-dform switch to -mpower9-dform-vector and -mpower9-dform-scalar in case you need to disable one or both forms.

Re: An abridged "Writing C" for the gcc web pages

On Tue, 3 May 2016, Richard Sandiford wrote: > And sometimes there are multiple acceptable ways of writing the same code. > Which wins is an aesthetic choice, which tools tend to be bad at handling. > E.g. if a parameter list is too long for a line, there's often a choice > of how to balance the

Re: [RS6000] powerpc64le -ffixed-cr2 -ffixed-cr3 -ffixed-cr4 ICE

On Wed, May 04, 2016 at 09:15:20AM +0930, Alan Modra wrote: > On Tue, May 03, 2016 at 10:22:02AM -0500, Segher Boessenkool wrote: > > Have you tested if save and restore are correct now? I.e. not touching > > the fixed ones. > > It doesn't matter if we save more cr fields than needed, Right,

Re: Enabling -frename-registers?

On Tue, May 3, 2016 at 6:52 PM, Bernd Schmidt wrote: > On 05/03/2016 11:26 PM, David Edelsohn wrote: >> >> Optimizations enabled by default at -O2 should show an overall net >> benefit -- that is the general justification that we have used in the >> past. I request that this

Re: [RS6000] powerpc64le -ffixed-cr2 -ffixed-cr3 -ffixed-cr4 ICE

On Tue, May 03, 2016 at 10:22:02AM -0500, Segher Boessenkool wrote: > Have you tested if save and restore are correct now? I.e. not touching > the fixed ones. It doesn't matter if we save more cr fields than needed, and I think the epilogue restores are good. Restores done by the unwinder won't

Re: [SH][committed] Remove SH5 support in compiler

> Did that. Looks there are no changes after regeneration. Not in the libada directory: eric@polaris:~/svn/gcc/libada> svn info configure configure.ac Path: configure Name: configure Working Copy Root Path: /home/eric/svn/gcc URL: svn+ssh://gcc.gnu.org/svn/gcc/trunk/libada/configure Relative

Re: [PATCH 0/3] Simplify the simple_return handling

On Tue, May 03, 2016 at 02:53:42PM +0200, Bernd Schmidt wrote: > Looking at the outputs I see a number of jump to return replaced with > plain return, which seems like an improvement. There are random changes > in .p2align output: > Do you have an explanation as to why this happens?

Re: An abridged "Writing C" for the gcc web pages

On 05/03/2016 06:39 PM, Bernd Schmidt wrote: > On 05/03/2016 09:59 PM, Richard Sandiford wrote: >> >> And sometimes there are multiple acceptable ways of writing the >> same code. Which wins is an aesthetic choice, which tools tend to >> be bad at handling. E.g. if a parameter list is too long

[RS6000] TARGET_RELOCATABLE

For ABI_V4, -mrelocatable and -fPIC both generate position independent code, with some extra "fixup" output for -mrelocatable. The similarity of these two options has led to the situation where the sysv4.h SUBTARGET_OVERRIDE_OPTIONS sets flag_pic on seeing -mrelocatable, and sets

[RS6000] Align .toc section

Lack of any .toc section alignment causes kexec and kdump failure when linking without the usual linker script. This of course is really a kexec-tools error, now fixed, but it is also true that .toc ought to always be word aligned. Bootstrapped and regression tested powerpc64le-linux and

[RS6000] Rewrite rs6000_frame_related to use simplify_replace_rtx

was Re: [PATCH] Change replace_rtx if from is a REG (PR target/70245, take 2) On Thu, Mar 17, 2016 at 11:07:03PM +1030, Alan Modra wrote: > By the look of what you posted in the bugzilla, the pattern is the > parallel emitted by rs6000_emit_savres_rtx. In that parallel, the > stack memory

[RS6000] out-of-line exit register restore funcs

This fixes the regression from gcc-4.5 for -m32 -Os shown by gcc.target/powerpc/savres.c:s_r31. Bootstrap and regression tests on powerpc64le-linux and powerpc64-linux in progress. OK assuming no regressions? * config/rs6000/rs6000.c (rs6000_savres_strategy): Don't use

Re: [PATCH] Fix a typo in dwarf2out.c:resolve_args_picking_1

On May 3, 2016 4:05:40 PM GMT+02:00, Pierre-Marie de Rodat wrote: >Hello, > >Under specific circumstances for Ada programs, such as in the testcase >this change adds, the DWARF back-end currently crashes because of >inconsistent internal state. This is due to a typo: a local

C PATCH for c/70859 (Bad column number in type-generic function errors)

This PR points out that we emit bad column number when validating builtin functions arguments and this patch fixes this deficiency for the C part, where I can simply use the vector of argument locations. You'll see that I introduced expansion_point_location function. The reason for that is that

Re: [PATCH] Fix a typo in dwarf2out.c:resolve_args_picking_1

On 05/03/2016 05:41 PM, Richard Biener wrote: This change fixes this typo. Bootstrapped and regtested on x86_64-linux successfuly. Ok to commit? Thank you in advance! OK also for branches. Comitted to trunk and gcc-6-branch. Thank you! -- Pierre-Marie de Rodat

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