Re: [PATCH] rs6000: Disparage CTR and LR in movcc_internal1

On Tue, Sep 27, 2016 at 02:29:46PM +0930, Alan Modra wrote: > On Tue, Sep 27, 2016 at 12:33:59AM +, Segher Boessenkool wrote: > > * config/rs6000/rs6000.md (movcc_internal1): Disparage using CTR or LR. > > Actually, not disparage, but ignore when choosing register > preferences. @cindex

Re: [PATCH] rs6000: Disparage CTR and LR in movcc_internal1

On Tue, Sep 27, 2016 at 12:33:59AM +, Segher Boessenkool wrote: > * config/rs6000/rs6000.md (movcc_internal1): Disparage using CTR or LR. Actually, not disparage, but ignore when choosing register preferences. > (define_insn "*movcc_internal1" > - [(set (match_operand:CC 0

Re: Re: [PATCH] Fixed up missing semicolons.

In case my previous mail is swallowed by mailman: I am not familiar with your convention. Elsewhere, I usually don't use my full name. If people suggest I use a full name when submitting patches, I am glad to go with that. My name is Liu Hao (LH for short). The word 'Mouse' is a homophony joke

Re: [PATCH] Fix PR tree-optimization/77550

On 26 September 2016 at 22:09, Bernd Edlinger wrote: > On 09/26/16 21:19, Christophe Lyon wrote: >> >> Sorry for the delay, I've been travelling. >> >> Compilation is: >> .../xg++ >> -B/aci-gcc-fsf/builds/gcc-fsf-gccsrc/obj-arm-none-eabi/gcc3/gcc/testsuite/g++/../../

Re: [v3 PATCH] Implement LWG 2729 for pair.

On 27 September 2016 at 03:21, Ville Voutilainen wrote: > On 27 September 2016 at 03:16, Christophe Lyon > wrote: >> 20_util/declval/requirements/1_neg.cc (test for errors, line 2263) >> 20_util/declval/requirements/1_neg.cc (test for

[PATCH] rs6000: Disparage CTR and LR in movcc_internal1

Hi! LRA likes to use CTR and LR to store CCmode values. Not such a good idea. All other similar patterns disparage using CTR and LR; do so here, too. Committing to trunk. Segher 2016-09-27 Segher Boessenkool * config/rs6000/rs6000.md

Re: [v3 PATCH] Implement LWG 2729 for pair.

On 27 September 2016 at 03:16, Christophe Lyon wrote: > 20_util/declval/requirements/1_neg.cc (test for errors, line 2263) > 20_util/declval/requirements/1_neg.cc (test for excess errors) > 20_util/make_signed/requirements/typedefs_neg.cc (test for errors, line

Re: [v3 PATCH] Implement LWG 2729 for pair.

Hi, On 26 September 2016 at 14:54, Jonathan Wakely wrote: > On 24/09/16 21:13 +0300, Ville Voutilainen wrote: >> >> So, this has been applied to trunk, and also applies cleanly to the >> gcc-6 branch, and we need >> to backport it to fix PR libstdc++/77537. Ok for the gcc-6

Re: [v3 PATCH] PR libstdc++/77288 and the newest proposed resolution for LWG 2756

Hi Jonathan, On 23 September 2016 at 12:41, Jonathan Wakely wrote: > On 22/09/16 20:22 +0200, Christophe Lyon wrote: >> >> On 22 September 2016 at 15:25, Jonathan Wakely wrote: >>> >>> On 22/09/16 12:15 +0100, Jonathan Wakely wrote: On

[BUILDROBOT] tic6x-uclinux: undefined reference to `gnu_libc_printf_pointer_format(tree_node*, char const**)' (was: [PATCH] - improve sprintf buffer overflow detection (middle-end/49905))

Hi Martin, On Thu, 2016-09-08 13:03:12 -0600, Martin Sebor wrote: > Attached is another update to the patch to address the last round > of comments and suggestions, most notably to: [...] with the currently committed version, the tic6x-uclinux target fails, see ie.

Re: [PATCH, LRA] Fix PR 77714

On 09/26/2016 09:55 AM, Bernd Edlinger wrote: Bootstrapped and reg-tested on x86_64-pc-linux-gnu. Is it OK for trunk? Yes. Thank you for working on the problem, Bernd.

Re: debug container mutex association

Fixed with attached patch. François On 26/09/2016 13:56, Andreas Schwab wrote: FAIL: 23_containers/list/debug/invalidation/4.cc (test for excess errors) Excess errors: /daten/aranym/gcc/gcc-20160926/Build/m68k-linux/libstdc++-v3/include/debug/safe_sequence.tcc:89: error: 'void __gnu_debug

Re: Implement -Wimplicit-fallthrough (version 9)

Hi Marek, > On Mon, Sep 26, 2016 at 03:34:40PM +0200, Rainer Orth wrote: >> Hi Marek, >> >> > All right. I'll commit the patch on Monday. >> >> this patch caused quite some breakage: Ada, Solaris/x86 and SPARC don't >> bootstrap any longer. > > Sorry about that. I had tested Ada +

Re: Implement -Wimplicit-fallthrough (version 9)

Hi Jakub, > On Mon, Sep 26, 2016 at 03:34:40PM +0200, Rainer Orth wrote: >> Ok for mainline if the bootstraps pass (with appropriate changelog >> entries, of course)? > > Yes. testing completed successfully, so I've installed the patch with this ChangeLog entry: 2016-09-26 Rainer Orth

Re: [PATCH] Fix PR tree-optimization/77550

On 09/26/16 21:19, Christophe Lyon wrote: > > Sorry for the delay, I've been travelling. > > Compilation is: > .../xg++ > -B/aci-gcc-fsf/builds/gcc-fsf-gccsrc/obj-arm-none-eabi/gcc3/gcc/testsuite/g++/../../ > /aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/testsuite/g++.dg/pr77550.C > g++_tg.o

Re: [Patch, avr] Backport fix for PR 65210 to gcc-5-branch

Approved. Please commit. 2016-09-26 15:30 GMT+03:00 Senthil Kumar Selvaraj : > Ping! > > Regards > Senthil > Senthil Kumar Selvaraj writes: > >> Hi, >> >> Is it ok to backport PR 65210 to gcc-5-branch? The patch is already in >> 6.x and trunk. >> >> Regards

Re: [PATCH] Fix PR tree-optimization/77550

On 22 September 2016 at 22:30, Bernd Edlinger wrote: > On 09/22/16 21:30, Christophe Lyon wrote: >> On 21 September 2016 at 22:20, Bernd Edlinger >> wrote: >>> On 09/21/16 21:57, Christophe Lyon wrote: Hi, The new testcase

Re: [PATCH 6/17][ARM] Add data processing intrinsics for float16_t.

On 26 September 2016 at 15:19, Christophe Lyon wrote: > On 26 September 2016 at 15:03, Ramana Radhakrishnan > wrote: >> On Mon, Sep 26, 2016 at 1:48 PM, Christophe Lyon >> wrote: >>> On 26 September 2016 at

[PATCH RESEND 2/2] Extend -falign-FOO=N to N[,M[,N2[,M2]]]

falign-functions=N is too simplistic. Ingo Molnar ran some tests and it seems that on latest x86 CPUs, 64-byte alignment of functions runs fastest (he tried many other possibilites): this way, after a call CPU can fetch a lot of insns in the first cacheline fill. However, developers are less

[PATCH RESEND 1/2] Temporary remove "at least 8 byte alignment" code from x86

This change drops forced alignment to 8 if requested alignment is higher than 8: before the patch, -falign-functions=9 was generating .p2align 4,,8 .p2align 3 which means: "align to 16 if the skip is 8 bytes or less; else align to 8". After this change, ".p2align 3" is not

[Committed] PR fortran/77420

This is a follow-up commit to really fix PR fortran/77420. The code has been in my tree for 2 weeks and has passed numerous regression tests. 2016-09-26 Steven G. Kargl PR fortran/77420 * trans-common.c: Handle array elements in equivalence when the

Re: [PATCH, Fortran] Extension: COTAN and degree-valued trig intrinsics with -fdec-math

On 09/26/2016 04:01 PM, Fritz Reese wrote: All, Attached is a patch extending the GNU Fortran front-end to support some additional math intrinsics, enabled with a new compile flag -fdec-math. The flag adds the COTAN intrinsic (cotangent), as well as degree versions of all trigonometric

Re: [PATCH, 1/7] Move memory model declarations in memmodel.h

On September 26, 2016 7:39:13 PM GMT+02:00, Thomas Preudhomme wrote: >On 26/09/16 18:22, Thomas Preudhomme wrote: >> >> I committed as is because emit-rtl.h uses enum memmodel so all files >that >> includes it must be updated. This gets worse because tm.h uses

Re: [PATCH GCC][v2]Simplify alias check code generation in vectorizer

On September 26, 2016 5:46:28 PM GMT+02:00, Bernd Edlinger wrote: >Hi, > >>@@ -2310,7 +2313,8 @@ create_intersect_range_checks_index >(loop_vec_info loop_vinfo, tree *cond_expr, >> gcc_assert (TREE_CODE (DR_STEP (dr_a.dr)) == INTEGER_CST); >> >> bool neg_step =

Re: [PATCH 5/5] rs6000: Separate shrink-wrapping

On Fri, Sep 23, 2016 at 4:21 AM, Segher Boessenkool wrote: > This implements the hooks for separate shrink-wrapping for rs6000. > It handles GPRs and LR. The GPRs get a component number corresponding > to their register number; LR gets component number 0. > > >

Re: [PATCH, 1/7] Move memory model declarations in memmodel.h

On 26/09/16 18:22, Thomas Preudhomme wrote: I committed as is because emit-rtl.h uses enum memmodel so all files that includes it must be updated. This gets worse because tm.h uses emit-rtl.h so all target needs to be updated as well. The diff was becoming big so I decided to keep it separate.

Re: [PATCH, 1/7] Move memory model declarations in memmodel.h

On 26/09/16 11:53, Richard Biener wrote: On Mon, 26 Sep 2016, Thomas Preudhomme wrote: On 26/09/16 10:15, Richard Biener wrote: On Thu, 22 Sep 2016, Thomas Preudhomme wrote: Hi, This patch is part of a patch series to add support for ARMv8-M[1] to GCC. This specific patch moves memory

Re: parallel/algo.h cleanup

On 25/09/16 17:23 +0200, François Dumont wrote: Hi Trivial patch to cleanup parallel/algo.h by generalizing usage of std::__iterator_category. * include/parallel/algo.h: Generalize usage of std::__iterator_category. Adjust whitespaces. N.B. for a patch of this size it would have

Re: [wwwdocs] Add some missing C++17 features

On 26/09/16 18:35 +0200, Jakub Jelinek wrote: Hi! The following patch adds some missing C++1z features to the table (wording from https://isocpp.org/std/standing-documents/sd-6-sg10-feature-test-recommendations#recs.cpp17 except for P0386R2 which is too new for that (Jon, can you look up the

Re: [PATCH 1/5] separate shrink-wrap: New command-line flag, status flag, hooks, and doc

On 09/23/2016 02:21 AM, Segher Boessenkool wrote: This patch adds a new command-line flag "-fshrink-wrap-separate", a status flag "shrink_wrapped_separate", hooks for abstracting the target components, and documentation for all those. 2016-09-23 Segher Boessenkool

Re: [PATCH 5/5] rs6000: Separate shrink-wrapping

On 09/23/2016 02:21 AM, Segher Boessenkool wrote: This implements the hooks for separate shrink-wrapping for rs6000. It handles GPRs and LR. The GPRs get a component number corresponding to their register number; LR gets component number 0. 2016-09-23 Segher Boessenkool

Re: [PATCH 2/5] dce: Don't dead-code delete separately wrapped restores

On 09/23/2016 02:21 AM, Segher Boessenkool wrote: If there is a separately wrapped register restore on some path that is dead (say, control goes into an endless loop after it), then we cannot delete that restore because that would confuse the DWARF CFI (if there is another path joining after

Re: [PATCH 3/5] regrename: Don't rename restores

On 09/23/2016 02:21 AM, Segher Boessenkool wrote: A restore is supposed to restore some certain register. Restoring it into some other register will not work. Don't. 2016-09-23 Segher Boessenkool * regrename.c (build_def_use): Invalidate chains that

[wwwdocs] Add some missing C++17 features

Hi! The following patch adds some missing C++1z features to the table (wording from https://isocpp.org/std/standing-documents/sd-6-sg10-feature-test-recommendations#recs.cpp17 except for P0386R2 which is too new for that (Jon, can you look up the feature test macro if any from newer SD-6 draft?).

Re: Ping Re: Make max_align_t respect _Float128 [version 3]

On 09/19/2016 09:58 AM, Joseph Myers wrote: Ping. This patch is pending review. OK. I never like adding more conditionals to stddef.h, but it's likely unavoidable in this case. jeff

Re: [PATCH] Disable sim build for ARC in top-level configure.ac

On 09/22/2016 06:12 AM, Anton Kolesov wrote: Hi, This disables "sim" build for ARC, otherwise it is required to pass --disable-sim to top-level configure. Anton 0001-Disable-sim-builds-for-ARC-in-top-level-configure.ac.patch From 1fb11bf060ef0bccb0dd949fbf7ea63c763f008d Mon Sep 17 00:00:00

Re: [PATCH v2] [RTEMS] Always use atomic builtins for libstdc++

On Sep 26 2016, Bernhard Reutner-Fischer wrote: > On 26 September 2016 10:27:13 CEST, Andreas Schwab wrote: >>On Sep 22 2016, Bernhard Reutner-Fischer wrote: >> >>> On 22 September 2016 11:11:42 CEST, Andreas Schwab

Re: [PATCH] Fixed up missing semicolons.

On 09/23/2016 09:28 AM, lhmouse wrote: Hi GCC developers, Today I was trying bootstrapping GCC 7.0.0 and stage 1 compilation failed because of two missing semicolons. After this patch was applied, xgcc could be built successfully, although it still failed the self-test.

Re: [PATCH, Fortran] Extension: COTAN and degree-valued trig intrinsics with -fdec-math

Fritz Reese wrote: > Attached is a patch extending the GNU Fortran front-end to support > some additional math intrinsics, enabled with a new compile flag > -fdec-math. The flag adds the COTAN intrinsic (cotangent), as well as > degree versions of all trigonometric intrinsics (SIND, TAND, ACOSD, >

[wwwdocs] [[fallthrough]] attribute is supported in GCC 7

... so update C++1z Language Features. Applying. Index: projects/cxx-status.html === RCS file: /cvs/gcc/wwwdocs/htdocs/projects/cxx-status.html,v retrieving revision 1.20 diff -u -r1.20 cxx-status.html --- projects/cxx-status.html

Re: [PATCH v2] [RTEMS] Always use atomic builtins for libstdc++

On 26 September 2016 10:27:13 CEST, Andreas Schwab wrote: >On Sep 22 2016, Bernhard Reutner-Fischer wrote: > >> On 22 September 2016 11:11:42 CEST, Andreas Schwab >wrote: >>>On Sep 22 2016, Sebastian Huber

Re: [PR77719] Fix ICE in pp_string, at pretty-print.c:955

On 09/25/2016 08:39 PM, kugan wrote: On 25/09/16 04:50, kugan wrote: Hi, In make_new_ssa_for_def (tree-reassoc.c) we should use gimple_get_lhs to get lhs instead of gimple_assign_lhs as stmt can be builtins too. Attached patch fixes this. Testcase from PR (attached) seems to fail. I dont

Re: C++ PATCH for __has_cpp_attribute and fallthrough

OK. On Mon, Sep 26, 2016 at 8:23 AM, Marek Polacek wrote: > This patch updates __has_cpp_attribute for fallthrough, which is now > supported. > > The system.h hunk should aid people building trunk GCC with older GCC 7 not > supporting this attribute yet. > >

Re: Implement -Wimplicit-fallthrough (version 9)

It seems unfortunate that the warning doesn't accept /* ... fall through ... */ as a fallthrough comment. Jason

Re: [Patch, reload, tentative, PR 71627] Tweak conditions in find_valid_class_1

On 09/16/2016 09:02 PM, Senthil Kumar Selvaraj wrote: Does this make sense? I ran a reg test for the avr target with a slightly older version of this patch, it did not show any regressions. If this is the right fix, I'll make sure to run reg tests on x86_64 after backporting to a gcc

Re: [PATCH GCC][v2]Simplify alias check code generation in vectorizer

Hi, >@@ -2310,7 +2313,8 @@ create_intersect_range_checks_index (loop_vec_info >loop_vinfo, tree *cond_expr, > gcc_assert (TREE_CODE (DR_STEP (dr_a.dr)) == INTEGER_CST); > > bool neg_step = tree_int_cst_compare (DR_STEP (dr_a.dr), size_zero_node) < > 0; >- unsigned HOST_WIDE_INT abs_step =

Re: [PATCH, GCC] Deal with singular sentences in builtin-sprintf-warn-1.c regex

On 09/26/2016 03:55 AM, Thomas Preudhomme wrote: How about this reworked patch? Best regards, Thomas On 23/09/16 17:17, Martin Sebor wrote: On 09/23/2016 09:42 AM, Thomas Preudhomme wrote: Sorry, forgot the patch. Please find it attached. Best regards, Thomas On 23/09/16 16:40, Thomas

Re: [PATCH GCC][v2]Simplify alias check code generation in vectorizer

> And also please mention https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77724 > and perhaps > add its testcase, too. > Patch according to Richard's suggestion, included test case. The test case works unpatched on x86-64 but fails on s390. Is gcc.dg/vect the proper place for it? (I didn't manage

Re: [PATCH, RFC] gcov: dump in a static dtor instead of in an atexit handler

On 08/12/2016 04:08 PM, Martin Liška wrote: > On 08/10/2016 02:53 PM, Nathan Sidwell wrote: >> On 08/10/16 06:43, Martin Liška wrote: >>> Hello. >>> >>> There are multiple PRs (mentioned in ChangeLog) which suffer from missing >>> capability of gcov >>> to save counters for functions with

Re: PATCH to use the new gimple_call_internal_p overload

On 09/26/2016 07:53 AM, Marek Polacek wrote: In my recent -Wimplicit-fallthrough patch I introduced a new overload gimple_call_internal_p to check whether a stmt is a specific internal function. So use this predicate in the rest of the codebase, too. Bootstrapped/regtested on x86_64-linux, ok

Re: Implement -Wimplicit-fallthrough (version 9)

> this patch caused quite some breakage: Ada, Solaris/x86 and SPARC don't > bootstrap any longer. > > The following patch allows i386-pc-solaris2.12 and > sparc-sun-solaris2.12 > bootstraps continue. > > Strangely, I needed to use gcc_fallthrough () in i386.c; a mere /* FALLTHRU > */ > had no

Re: Split c-common.c?

On 09/26/2016 07:38 AM, Marek Polacek wrote: On Mon, Sep 26, 2016 at 03:26:28PM +0200, Jakub Jelinek wrote: On Mon, Sep 26, 2016 at 03:22:08PM +0200, Marek Polacek wrote: Before I spend time on this, I wanted to check if you consider this a good idea. Since c-common.c has grown a lot and is

Re: [patch, avr, pr71676 and pr71678] Issues with casesi expand

On 26.09.2016 15:19, Pitchumani Sivanupandi wrote: Attached patch for PR71676 and PR71678. PR71676 is for AVR target that generates wrong code when switch case index is more than 16 bits. Switch case index of larger than SImode are checked for out of range before 'casesi' expand. RTL expand of

Re: [PATCH][regrename][sel-sched] Fix bogus use of HARD_FRAME_POINTER_REGNUM (was: Fix arm bootstrap)

On 09/26/2016 04:34 PM, Kyrill Tkachov wrote: Hi all, This patch implements the minimal fixes for the issues that https://gcc.gnu.org/ml/gcc-patches/2016-09/msg01547.html was supposed to address as suggested by Alexander. Bootstrapped and tested on aarch64-none-linux-gnu and

[PATCH][regrename][sel-sched] Fix bogus use of HARD_FRAME_POINTER_REGNUM (was: Fix arm bootstrap)

Hi all, This patch implements the minimal fixes for the issues that https://gcc.gnu.org/ml/gcc-patches/2016-09/msg01547.html was supposed to address as suggested by Alexander. Bootstrapped and tested on aarch64-none-linux-gnu and arm-none-linux-gnueabihf. Is this ok for trunk? Thanks, Kyrill

[PATCH] Cleanup of input.c

Hi, this started, because I saw get_next_line returns -1 on error, instead of false: PR 77699. But when I was there I also saw that read_line_num is using memmove on non-aliased src & dest, instead of memcpy. But then I see that also adding a NUL byte is superfluos, and all the copying as

[Committed] S/390: Add missing fallthrough comments.

gcc/ChangeLog: 2016-09-26 Andreas Krebbel * config/s390/s390.c (s390_rtx_costs): Add /* fallthrough */. (s390_sched_score): Likewise. --- gcc/config/s390/s390.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/gcc/config/s390/s390.c

Re: [PATCH] Bits from Early LTO debug merge -- move stuff from late to early finish

On Fri, 23 Sep 2016, Richard Biener wrote: > On Fri, 23 Sep 2016, Richard Biener wrote: > > > On Thu, 22 Sep 2016, Richard Biener wrote: > > > > > > > > This merges moving of unused type pruning from late to early finish as > > > well as handling of debug types and dwarf2 dups elimination.

[PATCH, Fortran] Extension: COTAN and degree-valued trig intrinsics with -fdec-math

All, Attached is a patch extending the GNU Fortran front-end to support some additional math intrinsics, enabled with a new compile flag -fdec-math. The flag adds the COTAN intrinsic (cotangent), as well as degree versions of all trigonometric intrinsics (SIND, TAND, ACOSD, etc...). This

[PATCH, LRA] Fix PR 77714

Hi! This fixes another fallout of the recent change in the pattern matching, which makes LRA choose a different alternative for this insn: (insn 48 21 23 3 (set (reg/f:SI 102 sfp) (reg/f:SI 7 r7)) 808 {*thumb1_movsi_insn} (nil)) This is replaced as a special case to

PATCH to use the new gimple_call_internal_p overload

In my recent -Wimplicit-fallthrough patch I introduced a new overload gimple_call_internal_p to check whether a stmt is a specific internal function. So use this predicate in the rest of the codebase, too. Bootstrapped/regtested on x86_64-linux, ok for trunk? 2016-09-26 Marek Polacek

Re: Implement -Wimplicit-fallthrough (version 9)

On Mon, Sep 26, 2016 at 03:34:40PM +0200, Rainer Orth wrote: > Hi Marek, > > > All right. I'll commit the patch on Monday. > > this patch caused quite some breakage: Ada, Solaris/x86 and SPARC don't > bootstrap any longer. Sorry about that. I had tested Ada + x86_64/ppc64/aarch64, but

Re: Implement -Wimplicit-fallthrough (version 9)

On Mon, Sep 26, 2016 at 03:34:40PM +0200, Rainer Orth wrote: > Ok for mainline if the bootstraps pass (with appropriate changelog > entries, of course)? Yes. > diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c > --- a/gcc/config/i386/i386.c > +++ b/gcc/config/i386/i386.c > @@ -17917,6

Re: Split c-common.c?

On Mon, Sep 26, 2016 at 03:26:28PM +0200, Jakub Jelinek wrote: > On Mon, Sep 26, 2016 at 03:22:08PM +0200, Marek Polacek wrote: > > Before I spend time on this, I wanted to check if you consider this a good > > idea. Since c-common.c has grown a lot and is quite large now, I think we > > might

Re: Implement -Wimplicit-fallthrough (version 9)

Hi Marek, > All right. I'll commit the patch on Monday. this patch caused quite some breakage: Ada, Solaris/x86 and SPARC don't bootstrap any longer. The following patch allows i386-pc-solaris2.12 and sparc-sun-solaris2.12 bootstraps continue. Strangely, I needed to use gcc_fallthrough () in

Re: Split c-common.c?

On Mon, Sep 26, 2016 at 03:22:08PM +0200, Marek Polacek wrote: > Before I spend time on this, I wanted to check if you consider this a good > idea. Since c-common.c has grown a lot and is quite large now, I think we > might split it into c-warn.c, where various warning routines would go. What >

Re: [PATCH 5/17][ARM] Enable HI mode moves for floating point values.

On 26/09/16 14:15, Christophe Lyon wrote: Hi, Sorry for the delay, I've been travelling. On 27 July 2016 at 15:57, Ramana Radhakrishnan wrote: On Tue, May 17, 2016 at 3:29 PM, Matthew Wahab wrote: The handling of 16-bit integer

Split c-common.c?

Before I spend time on this, I wanted to check if you consider this a good idea. Since c-common.c has grown a lot and is quite large now, I think we might split it into c-warn.c, where various warning routines would go. What do you think? Marek

[patch, avr, pr71676 and pr71678] Issues with casesi expand

Attached patch for PR71676 and PR71678. PR71676 is for AVR target that generates wrong code when switch case index is more than 16 bits. Switch case index of larger than SImode are checked for out of range before 'casesi' expand. RTL expand of casesi gets index as SImode, but index is

Re: [PATCH 6/17][ARM] Add data processing intrinsics for float16_t.

On 26 September 2016 at 15:03, Ramana Radhakrishnan wrote: > On Mon, Sep 26, 2016 at 1:48 PM, Christophe Lyon > wrote: >> On 26 September 2016 at 11:43, Matthew Wahab >> wrote: >>> Hello, >>> >>> On 25/09/16

Re: [PATCH 5/17][ARM] Enable HI mode moves for floating point values.

Hi, Sorry for the delay, I've been travelling. On 27 July 2016 at 15:57, Ramana Radhakrishnan wrote: > On Tue, May 17, 2016 at 3:29 PM, Matthew Wahab > wrote: >> The handling of 16-bit integer data-movement in the ARM backend doesn't >>

Re: [PATCH 6/17][ARM] Add data processing intrinsics for float16_t.

On 26/09/16 14:03, Ramana Radhakrishnan wrote: On Mon, Sep 26, 2016 at 1:48 PM, Christophe Lyon wrote: On 26 September 2016 at 11:43, Matthew Wahab wrote: Hello, On 25/09/16 14:00, Christophe Lyon wrote: This patch adds the new

Re: [PATCH] Increase lto-min-partition

Prathamesh Kulkarni wrote: > Hi Wilco, > I am working on LTO varpool partitioning to improve performance for > section anchors. > I posted a preliminary patch posted at: > https://gcc.gnu.org/ml/gcc/2016-07/msg00033.html > Unfortunately I haven't yet been able to

Re: [PATCH 6/17][ARM] Add data processing intrinsics for float16_t.

On Mon, Sep 26, 2016 at 1:48 PM, Christophe Lyon wrote: > On 26 September 2016 at 11:43, Matthew Wahab > wrote: >> Hello, >> >> On 25/09/16 14:00, Christophe Lyon wrote: > > > This patch adds the new intrinsics: >

Re: [v3 PATCH] Implement LWG 2729 for pair.

On 24/09/16 21:13 +0300, Ville Voutilainen wrote: So, this has been applied to trunk, and also applies cleanly to the gcc-6 branch, and we need to backport it to fix PR libstdc++/77537. Ok for the gcc-6 branch? Yes, OK for gcc-6-branch too, as it fixes a regression since 5.x

Re: [PATCH GCC][v2]Simplify alias check code generation in vectorizer

On 2016.09.26 at 13:14 +0200, Richard Biener wrote: > On Mon, Sep 26, 2016 at 11:21 AM, Robin Dapp wrote: > >> Comments added. Bootstrap and test, is it reasonable? > > > > This introduces an ICE on s390x with a Fortran testcase, because > > of an assertion failure in

Re: [PATCH 6/17][ARM] Add data processing intrinsics for float16_t.

On 26 September 2016 at 11:43, Matthew Wahab wrote: > Hello, > > On 25/09/16 14:00, Christophe Lyon wrote: This patch adds the new intrinsics: vbsl_f16, vbslq_f16, vdup_n_f16, vdupq_n_f16, vdup_lane_f16, vdupq_lane_f16, vext_f16, vextq_f16,

Re: [PATCH GCC][v2]Simplify alias check code generation in vectorizer

On Mon, Sep 26, 2016 at 10:21 AM, Robin Dapp wrote: >> Comments added. Bootstrap and test, is it reasonable? > > This introduces an ICE on s390x with a Fortran testcase, because > of an assertion failure in tree_to_uhwi (DR_STEP (dr_a.dr)) for > DR_STEP (dr_a.dr) =

Re: [Patch, reload, tentative, PR 71627] Tweak conditions in find_valid_class_1

Ping! Regards Senthil Senthil Kumar Selvaraj writes: > Hi, > > The below patch fixes what I think are a couple of problems with > reload.c:find_valid_class_1. > > First, even if no regno is in_hard_reg_set_p, it goes ahead and > considers rclass as valid. bad is set only if a regno is

Re: [Patch, avr] Backport fix for PR 65210 to gcc-5-branch

Ping! Regards Senthil Senthil Kumar Selvaraj writes: > Hi, > > Is it ok to backport PR 65210 to gcc-5-branch? The patch is already in > 6.x and trunk. > > Regards > Senthil > > gcc/ChangeLog > > 2016-09-22 Senthil Kumar Selvaraj > > Backport from

C++ PATCH for __has_cpp_attribute and fallthrough

This patch updates __has_cpp_attribute for fallthrough, which is now supported. The system.h hunk should aid people building trunk GCC with older GCC 7 not supporting this attribute yet. Bootstrapped/regtested on x86_64-linux, ok for trunk? 2016-09-26 Marek Polacek

Re: [PATCH] Increase lto-min-partition

Markus Trippelsdorf wrote: > On 2016.09.26 at 09:42 +0200, Richard Biener wrote: > > On Sat, Sep 24, 2016 at 10:52 AM, Markus Trippelsdorf > > wrote: > > > On 2016.09.23 at 15:29 +0200, Richard Biener wrote: > > > If for example you limit partitions to 4 on a 4-core

Re: debug container mutex association

FAIL: 23_containers/list/debug/invalidation/4.cc (test for excess errors) Excess errors: /daten/aranym/gcc/gcc-20160926/Build/m68k-linux/libstdc++-v3/include/debug/safe_sequence.tcc:89: error: 'void __gnu_debug::_Safe_iterator_base::_M_detach_single()' is protected within this context /daten

[PATCH, OBVIOUS] Fix documentation of gcov tool

gcov program produces a different output compared to what's mentioned in documentation. Attached patch changes that. Installed as obvious. Martin >From 76d40ef712b42b60f74087a6ecbd6ee163554d5b Mon Sep 17 00:00:00 2001 From: marxin Date: Mon, 26 Sep 2016 13:51:55 +0200 Subject:

Re: [Patch, fortran] Clean up of error recovery in DTIO procedures

Dear Rainer and Dominique, Committed as obvious in revision 240493. Thanks for doing the testing. Cheers Paul 2016-09-26 Paul Thomas PR fortran/48298 * interface.c (gfc_find_specific_dtio_proc) : Return NULL if the derived type is broken, as indicated by a

Re: debug container mutex association

On 20/09/16 09:57 +0100, Jonathan Wakely wrote: On 19/09/16 21:56 +0200, François Dumont wrote: Hi Following our conversation here is a much simpler patch. I just consider that all debug containers will have the same alignment. Even if I submit this patch as a whole I will commit into

Re: [PATCH GCC][v2]Simplify alias check code generation in vectorizer

On Mon, Sep 26, 2016 at 11:21 AM, Robin Dapp wrote: >> Comments added. Bootstrap and test, is it reasonable? > > This introduces an ICE on s390x with a Fortran testcase, because > of an assertion failure in tree_to_uhwi (DR_STEP (dr_a.dr)) for > DR_STEP (dr_a.dr) =

Re: [PATCH, 1/7] Move memory model declarations in memmodel.h

On Mon, 26 Sep 2016, Thomas Preudhomme wrote: > > > On 26/09/16 10:15, Richard Biener wrote: > > On Thu, 22 Sep 2016, Thomas Preudhomme wrote: > > > > > Hi, > > > > > > This patch is part of a patch series to add support for ARMv8-M[1] to GCC. > > > This specific patch moves memory model

[PATCH] Remove HIST_TYPE_CONST_DELTA counter type (PR, gcov-profile/23332).

Following patch removes old type of GCOV counter that was used in times when RTL instrumentation was done. Patch is preapproved by Honza. Patch can bootstrap on x86_64-linux-gnu and survives regression tests. Martin >From 75d56f7882d1bc40f7c638462bb6fec3b84c3732 Mon Sep 17 00:00:00 2001 From:

Re: [PATCH, 1/7] Move memory model declarations in memmodel.h

On 26/09/16 10:15, Richard Biener wrote: On Thu, 22 Sep 2016, Thomas Preudhomme wrote: Hi, This patch is part of a patch series to add support for ARMv8-M[1] to GCC. This specific patch moves memory model declarations in memmodel.h. Currently, is_mm_* memory model related functions are

Re: [v3 PATCH] PR libstdc++/77727

On 26/09/16 02:06 +0300, Ville Voutilainen wrote: PR libstdc++/77727 * include/std/optional (optional(const optional<_Up>&)): Default-initialize the base and use emplace. (optional(optional<_Up>&&)): Likewise. * testsuite/20_util/optional/cons/77727.cc: New. OK, thanks.

[C++] fix some nits

In working on PR66443, I encountered a few nits. Fixed thusly: 1) a misaligned } in init.c 2) process_subob_fn used goto...label, when regular if {return} works fine. (I guess the control flow got simplified at some point) 3) implicitly_declare_fn repeats a lambda deleted fn check that

Re: Deprecating Libstdc++ Profile Mode

As discussed on the libstdc++ list (see below) I'm formally deprecating the Profile Mode, and will commit this patch to the wwwdocs. I don't plan to actually remove the code until SystemTap trace points have been added to the rest of the library to make the Profile Mode instrumentation

[wwwdocs] Replace outdated C++ FAQ URL and fix grammar.

Marshall Cline's FAQ at parashift.com has been superseded by the isocpp.org FAQ. I've also replaced "resp.", as https://en.wiktionary.org/wiki/resp.#Usage_notes agrees that this usage isn't correct. Maybe it would be even better at the end of the sentence, but this is OK too. Index:

[PATCH] Remove redefinition of __cpp_lib_array_constexpr

I mistakenly defined this macro before I committed the feature, and then we ended up with two (slightly different) definitions. * include/bits/range_access.h (__cpp_lib_array_constexpr): Do not redefine macro defined in . Tested powerpc64le-linux, committed to trunk. commit

Re: [PATCH] Implement C++17 node extraction and insertion (P0083R5)

On 21/09/16 14:48 +0100, Jonathan Wakely wrote: This implements container node extraction/insertion, and merging. The patch includes Debug Mode support and pretty printers for the node handles. This adds some assertions to check for the mistake of trying to extract the end iterator. Tested

Re: [PATCH] Fix handling of -fsanitize-recover* options.

On Mon, Sep 26, 2016 at 11:56:01AM +0200, Martin Liška wrote: > @item -fsanitize=kernel-address > @opindex fsanitize=kernel-address > @@ -10169,17 +10170,19 @@ details. The run-time behavior can be influenced > using the @env{TSAN_OPTIONS} > environment variable; see >

Re: [PATCH] Fix handling of -fsanitize-recover* options.

On 09/23/2016 02:48 PM, Jakub Jelinek wrote: > On Fri, Sep 23, 2016 at 01:53:48PM +0200, Martin Liška wrote: >> 3) -fsanitize=leak is combinable with -fsanitize=address or >>-fsanitize=thread > > Is it really combinable with -fsanitize=thread? I thought only libasan > or liblsan provides the

Re: [PATCH, GCC] Deal with singular sentences in builtin-sprintf-warn-1.c regex

How about this reworked patch? Best regards, Thomas On 23/09/16 17:17, Martin Sebor wrote: On 09/23/2016 09:42 AM, Thomas Preudhomme wrote: Sorry, forgot the patch. Please find it attached. Best regards, Thomas On 23/09/16 16:40, Thomas Preudhomme wrote: Hi, New builtin-sprintf-warn-1.c

Re: [PATCH 6/17][ARM] Add data processing intrinsics for float16_t.

Hello, On 25/09/16 14:00, Christophe Lyon wrote: This patch adds the new intrinsics: vbsl_f16, vbslq_f16, vdup_n_f16, vdupq_n_f16, vdup_lane_f16, vdupq_lane_f16, vext_f16, vextq_f16, vmov_n_f16, vmovq_n_f16, vrev64_f16, vrev64q_f16, vtrn_f16, vtrnq_f16, vuzp_f16, vuzpq_f16, vzip_f16,

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